A system and method for verifying modular FLASH function

Abstract

The embodiment of the present application provides a system and method for verifying the function of modular FLASH, the system comprising: a modular FLASH to be verified, configured to perform a first type of task and a second type of task; a drive input interface module, configured to define multiple interface signals and define tasks for operating the multiple interface signals; a read-write task configuration module, including a read-write task interface, and configured to define a read data task and a write data task for performing read and write operations on the modular FLASH to be verified; a signal monitoring interface module, configured to define multiple monitoring signals; a test case module, comprising multiple test cases corresponding to the functional points of the modular FLASH to be verified, each test case comprising directional configuration parameters and random configuration parameters. Using the embodiment of the present application, each test case comprises parameters for directional configuration and random configuration to ensure the completeness of the function.

Description

Technical Field

[0001] The present application relates to the field of digital chip verification, and specifically, embodiments of the present application relate to a system and method for verifying modular FLASH functions. Background Art

[0002] FLASH is a non-volatile memory, which is usually used to store systems, applications and data in embedded systems. Modern SOC chips all use embedded FLASH, but as the functions of SOC chips become more and more complex, the requirements for FLASH are also getting higher and higher. The traditional embedded FLASH has relatively simple functions, with only read, write and erase functions, which can no longer meet the requirements of complex SOCs. Therefore, modular FLASH came into being. Modular FLASH integrates FLASH IP and other special function modules into a whole, which supports both read, write and erase functions and other customized special functions.

[0003] Traditional embedded FLASH verification is to verify the various functions of FLASH by writing different testbenches in Verilog HDL language or to verify the various functions of FLASH by writing test cases in assembly language at the SOC system level, which can meet the verification of traditional FLASH with relatively few functions. However, the inventors of this application found in their research that traditional FLASH verification methods cannot meet the verification requirements of modular FLASH. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a system and method for verifying modular FLASH functions. The embodiments of the present application are used to organize various test cases in a unified configuration manner. Each test case contains parameters of directed configuration and random configuration to ensure the completeness of the function. At the same time, automatic comparison of general FLASH read and write data and automatic comparison of special function identification signals are added to each test case to ensure the reliability of verification.

[0005] In a first aspect, an embodiment of the present application provides a system for verifying the function of a modular FLASH, the system comprising: a modular FLASH to be verified, configured to perform a first type of task and a second type of task, wherein the first type of task comprises: a data reading task and a data writing task, and the second type of task comprises tasks possessed by the modular FLASH other than the first type of task; a test case base class module, configured to create a test case base class; a driver input interface module, configured to define a plurality of interface signals and define tasks for operating the plurality of interface signals, wherein the plurality of interface signals are signals corresponding to interfaces connected to input ports, and the input ports are A data input port of the modular FLASH to be verified except for the read and write data function port; a read and write task configuration module, including a read and write task interface, and configured to define a read data task and a write data task for performing read and write operations on the modular FLASH to be verified; a signal monitoring interface module, configured to define multiple monitoring signals, wherein the monitoring signals are used to at least compare the function identification signals; a test case module, comprising multiple test cases corresponding to the function points of the modular FLASH to be verified, each test case is obtained based on the test case base class of the test case base class module, and each test case includes a directional configuration parameter and a random configuration parameter.

[0006] In some embodiments, the read / write task interface is used to define interface signals related to reading data and writing data.

[0007] In some embodiments, the test case base class module further includes: a system parameter integration module, which includes clock frequency configuration parameters, modular FLASH register configuration parameters and functional operation parameters, and is configured to configure the registers of the modular FLASH to be verified according to the modular FLASH register configuration parameters; a clock generation module, which includes a clock interface, and is configured to generate a corresponding system clock according to the clock frequency configuration parameters, wherein the clock interface is used to define interface signals related to all clocks in the modular FLASH to be verified; a parameter configuration module, which is configured to configure directional parameters and random parameters; and a functional operation module, which is configured to perform corresponding functional operations on the modular FLASH to be verified according to the functional operation parameters, and automatically compare the data and the corresponding functional identification signal.

[0008] In some embodiments, the test case base class module is configured to: create objects of the system parameter integration module and the clock generation module; randomize the system parameter integration module in the parameter configuration module; import them through the handles of the interfaces corresponding to the drive input interface module, the read-write task configuration module and the signal monitoring interface module for use by the test case module; define the empty shell virtual tasks corresponding to the functional operation module so that the test case module can add corresponding operations as needed.

[0009] In some embodiments, the modular FLASH to be verified implements the relevant register configuration function in the modular FLASH to be verified by calling the register configuration task through the system parameter integration module; the modular FLASH to be verified implements the data storage and retrieval function of the modular FLASH to be verified by calling the write data task and the read data task defined by the read and write task configuration module in the functional operation module; the modular FLASH to be verified implements the input port related functions of the modular FLASH to be verified by calling the task defined by the drive input interface module in the functional operation module; the modular FLASH to be verified introduces the relevant function identification signal of the modular FLASH module to be verified into the functional operation module for comparison through the signal monitoring interface module.

[0010] In some embodiments, each test case adopts a combination of directed and random methods in parameter configuration, wherein the combination of directed and random methods includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate random clock configuration parameters, and the random clock configuration parameters are used for the clock generation module to generate a random system clock.

[0011] In some embodiments, the directional and random combination method includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate directional and random function configuration parameters, and the directional and random function configuration parameters can be provided to the system parameter integration module or used for the function operation module to operate the corresponding function.

[0012] In some embodiments, each test case adopts a comprehensive configuration method in functional operation, and the comprehensive configuration method is: calling the read data task or write data task defined by the read and write task configuration module through the functional operation module to perform a first type of functional verification operation on the modular FLASH to be verified, and the first type of functional verification operation is a read and write data operation; or, calling the port operation task defined by the drive input interface module to perform a second type of functional verification operation on the modular FLASH to be verified, and the second type of functional verification operation includes encryption and decryption operations.

[0013] In some embodiments, each test case adopts a combination of data comparison and function identification signal comparison in result verification, and the combination of data comparison and function identification signal comparison includes: simultaneously calling the read data task or write data task defined by the read and write task configuration module in the function operation module, comparing the data written in and the data read out, and referencing the function identification signal defined by the signal monitoring interface module to perform target function comparison, wherein the target function comparison is the comparison result corresponding to the second type of function verification operation.

[0014] In a second aspect, some embodiments of the present application provide a method for verifying a modular FLASH, which runs in a system as described in the first aspect, and the method includes: each test case performs a directional configuration of some parameters of a system parameter integration module in a parameter configuration module according to a function point to be tested, and randomly configures the remaining parameters except the some parameters; generates a random system clock through a clock generation module according to the configured parameters, and connects it to the clock port of the modular FLASH to be verified; configures the register of the modular FLASH to be verified through the system parameter integration module, and transmits the function signal value corresponding to the second type of function verification operation to the modular FLASH to be verified through the function operation module. On the input port of LASH, wherein the second type of function verification operation is the function of the modular FLASH in addition to the first type of function verification operation, and the first type of function verification operation includes a read data function verification operation and a write data function verification operation; calling the write data task defined by the read-write task configuration module to write the data to the storage area of ​​the modular FLASH to be verified; calling the read data task defined by the read-write task configuration module to read the data to be read from the storage area of ​​the modular FLASH to be verified to the function operation module, and compare it with the written data; transmitting part of the function identification signal of the modular FLASH to be verified to the function operation module by referencing the interface signal defined by the signal monitoring interface module for corresponding function comparison to be tested. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 One of the component block diagrams of the system for verifying the modular FLASH function provided in the embodiment of the present application;

[0017] Figure 2 A block diagram of the composition of the test case base class module provided in the embodiment of the present application;

[0018] Figure 3 This is a system for verifying modular FLASH according to an embodiment of the present application. DETAILED DESCRIPTION

[0019] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0020] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0021] The inventor of this application found in the research that the test cases written for traditional embedded FLASH are relatively scattered and lack of systematicity, and these test cases are relatively obvious direct cases, which cannot cover some unpredictable application scenarios and lack completeness in terms of functional coverage. At the same time, these test cases lack the simultaneous comparison of the results of the basic functions of reading, writing and erasing and other special functions, and lack reliability in the verification results. Therefore, traditional FLASH verification cannot meet the verification requirements of modular FLASH.

[0022] Different from the related art, the technical problem to be solved by the embodiments of the present application is to provide a modular FLASH verification system based on UVM, which organizes various test cases in a unified configuration manner. Each test case contains parameters of directed configuration and random configuration to ensure the completeness of the functions. At the same time, automatic comparison of general FLASH read and write data and automatic comparison of special function identification signals are added to each test case to ensure the reliability of verification.

[0023] For example, in some embodiments of the present application, a system for verifying modular FLASH functions includes: a test case module, a test case base class module, a driver input interface module, a read / write task configuration module, a signal monitoring interface module, and a modular FLASH to be verified.

[0024] Please see Figure 1 , Figure 1A system for verifying modular FLASH functions is provided for an embodiment of the present application, the system comprising: a test case module 100, a test case base class module 110, a drive input interface module 120, a read / write task configuration module 130, a signal monitoring interface module 140 and a modular FLASH to be verified 150.

[0025] The modular FLASH to be verified is configured to execute a first type of tasks and a second type of tasks, wherein the first type of tasks includes: data reading tasks and data writing tasks, and the second type of tasks includes tasks that the modular FLASH has except the first type of tasks.

[0026] The test case base class module is configured to create the test case base class.

[0027] The driving input interface module is configured to define multiple interface signals and define tasks for operating the multiple interface signals, wherein the multiple interface signals are signals corresponding to the interfaces connected to the input ports, and the input ports are data input ports other than the read and write data function ports of the modular FLASH to be verified.

[0028] That is to say, the driver input interface module flash_interface of some embodiments of the present application defines some interface signals connected to other input ports of the design under test except for reading and writing data, and tasks for operating these interface signals. By calling the tasks of this module elsewhere, the input ports associated with this module can be operated.

[0029] The read / write task configuration module includes a read / write task interface and is configured to define a read data task and a write data task for performing read / write operations on the modular FLASH to be verified.

[0030] That is, the read and write task configuration module ahb_package of some embodiments of the present application includes an interface ahb_interface, and defines a read data task ahb_read() and a write data task ahb_write() for performing read and write operations on the design under test. The interface ahb_interface defines interface signals related to read data and write data, and calling the read and write data tasks of this module in other places can perform read and write data operations on the interface signals associated with this module.

[0031] The signal monitoring interface module is configured to define a plurality of monitoring signals, wherein the monitoring signals are used to at least compare the function identification signals.

[0032] That is to say, the signal monitoring interface module debug_interface of some embodiments of the present application defines some monitoring signals, and referencing these monitoring signals in other places can facilitate debugging of the verification system and comparison of certain function identification signals.

[0033] The test case module includes multiple test cases corresponding to the functional points of the modular FLASH to be verified, each test case is obtained based on the test case base class of the test case base class module, and each test case includes directional configuration parameters and random configuration parameters.

[0034] That is to say, in some embodiments of the present application, the test case module includes a series of test cases corresponding to the design functional points to be tested, and each test case is extended from the test case base class test_base and includes all parts of the test case base class test_base.

[0035] The above-mentioned related modules and verification process are described below as examples.

[0036] It should be noted that, in some embodiments of the present application, the read / write task interface is used to define interface signals related to reading data and writing data.

[0037] In some embodiments of the present application, the test case base class module is configured to: create objects of a system parameter integration module and a clock generation module; randomize the system parameter integration module in the parameter configuration module; import it through the handle of the interface corresponding to the drive input interface module, the read-write task configuration module and the signal monitoring interface module for use by the test case module; define the empty shell virtual task corresponding to the functional operation module so that the test case module can add corresponding operations as needed; wherein the system parameter integration module includes clock frequency configuration parameters, modular FLASH register configuration parameters and functional operation parameters, and is configured to configure the registers of the modular FLASH to be verified according to the modular FLASH register configuration parameters; the clock generation module includes a clock interface, and is configured to generate a corresponding system clock according to the clock frequency configuration parameters, wherein the clock interface is used to define interface signals related to all clocks in the modular FLASH to be verified.

[0038] In some embodiments of the present application, the test case base class module further includes: a parameter configuration module, configured to configure directional parameters and random parameters; and a functional operation module, configured to perform corresponding functional operations on the modular FLASH to be verified according to the functional operation parameters, and automatically compare the data (the data is the data read and written by the modular FLASH) and the corresponding functional identification signal.

[0039] That is to say, Figure 2 As shown, the test case base class module test_base of some embodiments of the present application includes: a system parameter integration module 111, a clock generation module 112, a parameter configuration module 113 and a functional operation module 114, wherein the system parameter integration module flash_cfg includes clock frequency configuration parameters, test design register configuration parameters and functional operation parameters, and configures the registers of the design to be tested; the clock generation module clk_generator includes an interface clock_interface, and generates a corresponding system clock according to the clock frequency configuration parameters, and the interface clock_interface defines interface signals related to all clocks of the design to be tested; the parameter configuration module flash_para_gen configures directional parameters and random parameters, and the functional operation module flash_operation performs corresponding functional operations on the design to be tested according to the functional operation parameters, and automatically compares the data and the corresponding functional identification signals.

[0040] The following is an example of the interaction process between the modular FLASH to be verified and the other modules.

[0041] In some embodiments of the present application, the modular FLASH to be verified implements the relevant register configuration function in the modular FLASH to be verified by calling the register configuration task through the system parameter integration module; the modular FLASH to be verified implements the data storage and retrieval function of the modular FLASH to be verified by calling the write data task and the read data task defined by the read and write task configuration module in the functional operation module; the modular FLASH to be verified implements the input port related functions of the modular FLASH to be verified by calling the task defined by the drive input interface module in the functional operation module; the modular FLASH to be verified introduces the relevant function identification signal of the modular FLASH module to be verified into the functional operation module for comparison through the signal monitoring interface module.

[0042] The following describes a system for verifying modular FLASH functions in some embodiments of the present application in three stages.

[0043] In some embodiments of the present application, each test case adopts a combination of directed and random methods in parameter configuration, wherein the combination of directed and random methods includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate random clock configuration parameters, and the random clock configuration parameters are used for the clock generation module to generate a random system clock.

[0044] In some embodiments of the present application, the directional and random combination method includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate directional and random function configuration parameters, and the directional and random function configuration parameters can be provided to the system parameter integration module or used for the function operation module to operate the corresponding function.

[0045] That is to say, in some embodiments of the present application, each test case adopts a combination of directional and random methods in parameter configuration, and configures the parameters of the system parameter integration module flash_cfg in the parameter configuration module flash_para_gen, such as generating random clock configuration parameters, sending them to the clock generation module to generate a random system clock, generating directional and random function configuration parameters, and sending them to the system parameter integration module flash_cfg and the function operation module flash_operation to operate the corresponding functions.

[0046] In some embodiments of the present application, each test case adopts a comprehensive configuration method in functional operation, and the comprehensive configuration method is: calling the read data task or write data task defined by the read and write task configuration module through the functional operation module to perform a first type of functional verification operation on the modular FLASH to be verified, and the first type of functional verification operation is a read and write data operation; or, calling the port operation task defined by the drive input interface module to perform a second type of functional verification operation on the modular FLASH to be verified, and the second type of functional verification operation includes encryption and decryption operations.

[0047] That is to say, in some embodiments of the present application, each test case adopts a configuration method combining general and special functions in terms of functional operation, and the functional operation module flash_operation calls the read and write data tasks defined in the read and write task configuration module ahb_package to perform general functional operations (i.e., first-class functional verification operations) of the modular FLASH, i.e., read and write data operations. The port operation tasks defined in the driver input interface module flash_interface are called to perform some special functional operations (i.e., second-class functional verification operations) of the modular FLASH, such as encryption and decryption operations.

[0048] In some embodiments of the present application, each test case adopts a combination of data comparison and function identification signal comparison in result verification, and the combination of data comparison and function identification signal comparison includes: simultaneously calling the read data task or write data task defined by the read and write task configuration module in the function operation module, comparing the data written in and the data read out, and referencing the function identification signal defined by the signal monitoring interface module to perform target function comparison, wherein the target function comparison is the comparison result corresponding to the second type of function verification operation.

[0049] That is to say, in some embodiments of the present application, each test case adopts a combination of data comparison and function identification signal comparison in result verification, and simultaneously calls the read and write data tasks defined by the read and write task configuration module ahb_package module in the function operation module flash_operation module to compare the written and read data, and references some function identification signals defined by the signal monitoring interface module debug_interface for special function comparison.

[0050] It is not difficult to understand that the system for verifying modular FLASH provided by the above embodiment of the present application effectively organizes each test case, and each application scenario of the design to be tested is covered as much as possible, and the results of each test case are more reliable after automatic comparison. Moreover, compared with the traditional debug method of viewing waveforms, the debug efficiency of the automatic comparison method is higher.

[0051] The following takes the UVM-based modular FLASH verification system as an example to exemplarily illustrate the system for verifying modular FLASH in an embodiment of the present application.

[0052] For example, Figure 3 As shown, the system for verifying modular FLASH in the embodiment of the present application exemplarily includes: test case (as Figure 1 An example of a test case module), the test case base class module test_base (as Figure 1 An example of a test case base class module), driving the input interface module flash_interface (as Figure 1 An example of a driver input interface module), read and write task configuration module ahb_package (as Figure 1 An example of a read and write task configuration module), signal monitoring interface module debug_interface (as Figure 1The test case base class module test_base includes: UVM-based system parameter integration module flash_cfg (as an example of the signal monitoring interface module of the test case base class module) and the design to be tested flash dut module (as an example of the modular FLASH to be verified), wherein the ... Figure 2 An example of a system parameter integration module), clock generation module clk_generator (as Figure 2 An example of a clock generation module), parameter configuration module flash_para_gen (as Figure 2 An example of a parameter configuration module) and a function operation module flash_operation (as Figure 2 An example of a functional operation module).

[0053] The system parameter integration module flash_cfg includes clock frequency configuration parameters, design register configuration parameters and function operation parameters. It defines a parameter calculation function to calculate individual parameters according to specific needs and defines a register configuration task to write the final configured register configuration parameters into the register of the design module under test.

[0054] The clock generation module clk_generator includes an interface clock_interface and a parameter integration module flash_cfg. The interface clock_interface defines all clock signals related to the design under test, and assigns these interface signals to the clock input port signals corresponding to the design under test through continuous assignment statements. The corresponding system clock is generated according to the clock frequency configuration parameters in the system parameter integration module flash_cfg, and then sent to the design under test module through the interface clock_interface.

[0055] The parameter configuration module flash_para_gen first randomizes the system parameter integration module flash_cfg, then adjusts the values ​​of some parameters in the system parameter integration module flash_cfg to the target values, and finally calls the parameter calculation function of the system parameter integration module flash_cfg to process the parameters that need to be calculated.

[0056] The function operation module flash_operation calls the corresponding tasks in the driver input interface module flash_interface according to the function operation parameters of the system parameter integration module flash_cfg to configure the values ​​of some input ports of the design under test. The read and write data tasks in the read and write task configuration module ahb_package are called to write and read data to the storage area of ​​the design under test, and the read and written data are automatically compared. Some function identification signals of the signal monitoring interface module debug_interface are referenced to automatically compare special function points of some function points of the design under test.

[0057] The driver input interface module flash_interface defines some interface signals connected to other input ports of the design under test except for reading and writing data, and the tasks to operate these interface signals. These interface signals are assigned to the input port signals corresponding to the design under test through continuous assignment statements, and then the corresponding tasks of this module are called in the functional operation module flash_operation according to the specific configuration to perform numerical configuration on the relevant input ports of the design under test.

[0058] The read-write task configuration module ahb_package declares an interface ahb_interface and defines a read data task ahb_read(), which is used to read data from the storage area of ​​the design under test. It defines a write data task ahb_write(), which is used to write data to the storage area of ​​the design under test. The interface ahb_interface defines interface signals related to read and write data, and assigns these interface signals to the read and write input port signals corresponding to the design under test through continuous assignment statements. Then, according to the specific configuration, the read and write data tasks of this module are called in the functional operation module flash_operation to perform read and write data operations on the read and write related input ports of the design under test.

[0059] The signal monitoring interface module debug_interface module defines some monitoring signals. The corresponding signals in the design to be tested are assigned to these monitoring signals through continuous assignment statements. Then, these monitoring signals are referenced in the functional operation module flash_operation to facilitate the verification system debugging and comparison of certain functional identification signals.

[0060] The test case base class module test_base brings together the system parameter integration module flash_cfg, the clock generation module clk_generator, the parameter configuration module flash_para_gen and the functional operation module flash_operation for unified scheduling. It first creates the entities of the system parameter integration module flash_cfg and the clock generation module clk_generator, and then calls the parameter configuration module flash_para_gen in the function build_phase() built based on UVM, and calls the register configuration task of the system parameter integration module flash_cfg in the task config_phase() built based on UVM, and finally calls the functional operation module flash_operation in the task main_phase() built based on UVM.

[0061] The test case base class module is configured to: create objects of the system parameter integration module flash_cfg and the clock generation module clk_generator. Randomize the system parameter integration module flash_cfg in the parameter configuration module flash_para_gen, and then fine-tune individual parameters. Import the interface handles corresponding to the driver input interface module flash_interface, the read / write task configuration module ahb_package, and the signal monitoring interface module debug_interface for use by the test case module. Define the empty shell virtual task corresponding to the function operation module flash_operation so that the test case module can add operation details according to specific needs.

[0062] The test case module contains a series of test cases corresponding to the functional points of the design to be tested. Each test case is extended from the test case base class module test_base and contains all parts of the test case base class module test_base. Each test case performs targeted configuration of individual parameters of the system parameter integration module flash_cfg in the parameter configuration module flash_para_gen module according to the functional point to be tested, and the remaining parameters are randomly configured. Then a random system clock is generated through the clock generation module and connected to the clock port of the design to be tested. The registers of the design to be tested are configured through the system parameter integration module flash_cfg. The port operation task defined in the driver input interface module flash_interface is called through the function operation module flash_operation to pass the special function signal value to the corresponding input port of the modular FLASH. The write data task defined in the read-write task configuration module ahb_package is called to write data to the storage area of ​​the modular FLASH. The read data task defined in the read-write task configuration module ahb_package is called to read data from the storage area of ​​the modular FLASH. The area is read to the function operation module flash_operation, and compared with the written data (that is, the data that conforms to the FLASH storage area format is randomly generated in each test case, first written to the FLASH storage area, and then read out. The specific form is: the written data is assigned to a variable, and the read data is assigned to another variable. Comparing the values ​​of these two variables is to compare the written and read data. This process is to verify whether there is a problem with the storage area, and whether there is a problem with the internal data of the design to be tested during the storage and reading process. In theory, the written data should be the same as the read data. If not, there is a problem with the design to be tested, and then it is necessary to find out what the specific problem is). By referencing the interface signal defined by the signal monitoring interface module debug_interface, some function identification signals of the design to be tested are transmitted to the function operation module flash_operation for special function comparison.

[0063] The design module to be tested, flash dut, mainly includes the functions of data storage and retrieval, functions related to the input port, such as encryption and decryption, and some functions configured by registers, such as instruction cache and data cache. The register configuration functions related to the design module to be tested, flash dut, are implemented by calling the register configuration tasks defined in the system parameter integration module flash_cfg. The data storage and retrieval functions of the design module to be tested, flash dut, are implemented by calling the write data tasks and read data tasks defined in the read-write task configuration module ahb_package in the functional operation module flash_operation, and the special functions related to the input port of the design module to be tested, flash dut, are implemented by calling the tasks defined in the driver input interface module flash_interface. Some function identification signals of the design module to be tested, flash dut, are introduced into the functional operation module flash_operation for comparison through the signal monitoring interface module debug_interface.

[0064] based on Figure 3 The specific verification process of the verification system is as follows:

[0065] Step 1: Create a class flash_cfg, add system clock parameters such as clock frequency clk_freq in the class flash_cfg; add register parameters of the design to be tested, such as write enable register, erase data register, prefetch instruction enable register, etc.; add input port configuration parameters, such as parameters for dividing different encryption areas for FLASH sectors. Define a function set_cfg() in the class flash_cfg, and calculate some of the above parameters in this function as needed. Define a task init_cfg(). After the parameters are completely set, call the write data task ahb_write() defined in the read-write task configuration module ahb_package in this task to match the set parameters to the registers of the design to be tested.

[0066] Step 2: Create an interface clock_interface and define all the clock signals required for modular FLASH in the interface clock_interface.

[0067] Step 3: Create an interface flash_interface. In the interface flash_interface, define some interface signals connected to other input ports of the design under test except for reading and writing data, and tasks for operating these interface signals. Assign these interface signals to the input port signals corresponding to the design under test through continuous assignment statements, and then call the tasks of this module in other places to operate the relevant input ports of the design under test.

[0068] Step 4: Create an interface ahb_interface. The interface ahb_interface defines interface signals related to reading and writing data. These interface signals are assigned to the read and write input port signals corresponding to the design under test through continuous assignment statements.

[0069] Step 5: Create an interface debug_interface, and define some monitoring signals in the interface debug_interface, such as interrupt signals, etc. Use continuous assignment statements to assign the corresponding signals in the design to be tested to these monitoring signals, and then reference these monitoring signals in other places to facilitate debugging of the verification system and comparison of certain function identification signals.

[0070] Step 6: Create a class clk_generator, declare a virtual interface clock_interface and class flash_cfg in the class clk_generator, generate the corresponding clock according to the clock parameters in the class flash_cfg, and then send the clock signal to the clock port of the design under test through the interface clock_interface.

[0071] Step 7: Create a package ahb_package, declare a virtual interface ahb_interface in the package ahb_package, and define the read data task ahb_read() and write data task ahb_write() for reading and writing the design under test. Calling the read and write data tasks of this module in other places can perform read and write data operations on the design under test. Specifically, the interface signals related to read and write data in the interface ahb_interface are defined according to the port format of the AHB protocol of AMBA 2.0, and the read and write data tasks are defined according to the read and write operation timing requirements specified in the AHB protocol of AMBA 2.0.

[0072] Step 8: Create a top-level module dut_top, declare the interfaces clock_interface, flash_interface, debug_interface and ahb_interface in the top-level module dut_top, import the package ahb_package, connect the virtual interface ahb_interface in the package ahb_package with the interface ahb_interface of the top-level module dut_top, and then pass the remaining interfaces to the class test_base through the config_db mechanism of the UVM methodology. Instantiate the design under test flash dut, and finally call the task of the interface flash_interface in an initial block to initialize the input port of the design under test.

[0073] Step 9: Create a class test_base, declare classes flash_cfg and clk_generator in the test_base class, and then create functions flash_para_gen(), flash_para_adj(), and flash_operation(). In the UVM built-in function build_phase, receive the interface sent in step 8 through the config_db mechanism of the UVM methodology, create objects for classes flash_cfg and clk_generator, and then call the function flash_para_gen(). In the function flash_para_gen(), first randomize the class flash_cfg, then call the function flash_para_adj(), and finally call the function set_cfg() in the flash_cfg class to calculate certain parameters. In the UVM built-in task config_phase, call the task init_cfg() of the flash_cfg class to configure the registers of the design to be tested. Call the task flash_operation() in the UVM built-in task main_phase. Specifically, the function flash_para_adj() is an empty virtual function and the task flash_operation() is an empty virtual task, and entities need to be added in the test case to implement specific functions.

[0074] Step 10: Create a test case. The test case is extended from the class test_base and includes all parts of the class test_base. In the function flash_para_adj() of the test case, adjust the system parameters of the random post-processing and configure them to the desired parameter values, such as specifying a specific clock frequency, specifying the value of a certain register, etc. In the task flash_operation(), call the write data task defined in the package ahb_package to write data to the storage area of ​​the modular FLASH, call the read data task defined in the package ahb_package to read data from the storage area of ​​the modular FLASH, and compare the read data with the written data. Call the port operation task defined in the interface flash_interface to configure the input port values ​​related to some special functions of the modular FLASH. Reference some function identification signals defined in the interface debug_interface to compare special functions.

[0075] The traditional modular FLASH verification is based on the testbench built with Verilog language at the module level. A corresponding testbench is built for each functional point. Each testbench is relatively independent and uses the idea of ​​hardware logic to write verification functions or tasks. The parameters cannot be randomized and can only be configured in a directional manner. In this way, some unpredictable scenarios cannot be covered; each testbench must rewrite some common configurations, which lacks reusability; each testbench lacks structure and has unclear levels when processing different data. For example, clock configuration, register reading and writing, input port signal configuration of the design to be tested, data processing and comparison are all placed in one testbench. Each testbench manually arranges the calls to various functions and tasks. Since the same testbench contains multiple data processing functions and tasks, the calls to functions and tasks are often improperly arranged, resulting in errors in the verification platform itself and affecting the efficiency of verification. The modular FLASH verification system based on UVM adopts object-oriented programming ideas to create different types of components, and then adds corresponding functions and tasks in each component to realize the processing of different types of data. For example, the system parameter component created is used to manage the system parameters, the clock generation component created is used to generate the system clock, and the various interface components created are used to transfer data between the verification platform and the design to be tested. The test case component created uniformly schedules the above components, realizing the directional and random configuration of parameters, good reusability and hierarchical structure. Moreover, due to the automatic execution characteristics of the UVM methodology itself, it is only necessary to put different types of processing in different functions and tasks built by the UVM methodology, which greatly reduces the error rate of the verification platform itself.

[0076] The existing UVM-based verification system includes a data generation component uvm_sequence, a data transmission component uvm_sequencer, a data drive component uvm_driver, an input data acquisition component uvm_monitor, a reference model component uvm_reference, an output data acquisition component uvm_monitor and a data comparison component uvm_scoreboard because the design to be tested needs to process the input data and then output it. The data generation component uvm_sequence generates the data packet required by the design to be tested, and then the data transmission component uvm_sequencer transmits the data packet to the data drive component uvm_driver, the data drive component uvm_driver drives the received data packet to the design to be tested, the input data acquisition component uvm_monitor sends the data collected from the input end of the design to be tested to the reference model component uvm_reference for processing and then sends it to the data comparison component uvm_scoreboard, the output data acquisition component uvm_monitor sends the data collected from the output end of the design to be tested to the data comparison component uvm_scoreboard, and the data comparison component uvm_scoreboard compares the two sets of received data. The core of modular FLASH is data storage and reading, and some auxiliary functions are added, which does not involve data processing. Therefore, the modular FLASH verification system based on UVM does not include the above common components, but builds a suitable verification system according to the characteristics of modular FLASH. The system includes system parameter configuration component flash_cfg, clock generation component clk_generator, various interface components, and base class component test_base. The system parameter configuration component flash_cfg generates the configuration of various auxiliary functions of modular FLASH, the clock generation component clk_generator generates a system clock, and the various interface components transmit data. The base class component test_base uniformly schedules the system parameter configuration component flash_cfg, the clock generation component clk_generator and various interface components, and configures directional and random parameters, compares the stored and read data, and checks the identification signal of the auxiliary function. Compared with the existing UVM-based verification system, the modular FLASH verification system based on UVM is generally more streamlined and complete.

[0077] Compared with the traditional FLASH verification system, the modular FLASH verification system based on UVM has clear layers, better balances systematization and reliability, and is more streamlined and complete than the existing UVM-based verification system. In addition, the above verification system also has good scalability and reusability, which can meet the needs of related verification system upgrades brought about by future modular FLASH upgrades.

[0078] That is, some embodiments of the present application provide a method for verifying a modular FLASH, which runs in the system as described in the first aspect, and the method includes: each test case performs a directional configuration of some parameters of a system parameter integration module in a parameter configuration module according to a function point to be tested, and randomly configures the remaining parameters except the some parameters; generates a random system clock through a clock generation module according to the configured parameters, and connects it to the clock port of the modular FLASH to be verified; configures the register of the modular FLASH to be verified through the system parameter integration module, and transmits the function signal value corresponding to the second type of function verification operation to the modular FLASH to be verified through the function operation module. On the input port of LASH, wherein the second type of function verification operation is the function of the modular FLASH in addition to the first type of function verification operation, and the first type of function verification operation includes a read data function verification operation and a write data function verification operation; calling the write data task defined by the read-write task configuration module to write the data to the storage area of ​​the modular FLASH to be verified; calling the read data task defined by the read-write task configuration module to read the data to be read from the storage area of ​​the modular FLASH to be verified to the function operation module, and compare it with the written data; transmitting part of the function identification signal of the modular FLASH to be verified to the function operation module by referencing the interface signal defined by the signal monitoring interface module for corresponding function comparison to be tested.

[0079] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0080] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0081] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0082] The above description is only an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0083] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0084] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

Claims

1. A system for verifying modular FLASH functions, characterized in that: The system comprises: The modular FLASH to be verified is configured to execute a first type of task and a second type of task, wherein the first type of task includes: a data reading task and a data writing task, and the second type of task includes tasks that the modular FLASH has except the first type of tasks; The test case base class module is configured to create a test case base class; A driver input interface module is configured to define a plurality of interface signals and define tasks for operating the plurality of interface signals, wherein the plurality of interface signals are signals corresponding to interfaces connected to input ports, and the input ports are data input ports other than read and write data function ports of the modular FLASH to be verified; A read / write task configuration module, including a read / write task interface, and configured to define a read data task and a write data task for performing read / write operations on the modular FLASH to be verified; the read / write task interface is used to define interface signals related to read data and write data; A signal monitoring interface module, configured to define a plurality of monitoring signals, wherein the monitoring signals are used to at least compare the function identification signal; The test case module includes multiple test cases corresponding to the functional points of the modular FLASH to be verified, each test case is obtained based on the test case base class of the test case base class module, and each test case includes directional configuration parameters and random configuration parameters.

2. The system according to claim 1, characterized in that The test case base class module further includes: A system parameter integration module, comprising clock frequency configuration parameters, modular FLASH register configuration parameters and functional operation parameters, and configured to configure the registers of the modular FLASH to be verified according to the modular FLASH register configuration parameters; A clock generation module, comprising a clock interface, and configured to generate a corresponding system clock according to the clock frequency configuration parameters, wherein the clock interface is used to define interface signals related to all clocks in the modular FLASH to be verified; A parameter configuration module, configured to configure directional parameters and random parameters; and The function operation module is configured to perform corresponding function operations on the modular FLASH to be verified according to the function operation parameters, and automatically compare the data with the corresponding function identification signal.

3. The system according to claim 2, characterized in that The test case base class module is configured as: Creating objects of the system parameter integration module and the clock generation module; Randomizing the system parameter integration module in the parameter configuration module; The handles of the interfaces corresponding to the drive input interface module, the read / write task configuration module and the signal monitoring interface module are introduced for use by the test case module; Define the empty shell virtual tasks corresponding to the functional operation module so that the test case module can add corresponding operations as needed.

4. The system according to claim 3, characterized in that The modular FLASH to be verified calls the register configuration task through the system parameter integration module to implement the configuration function of the relevant registers in the modular FLASH to be verified; The modular FLASH to be verified implements the data storage and retrieval functions of the modular FLASH to be verified by calling the write data task and the read data task defined by the read / write task configuration module in the functional operation module; The modular FLASH to be verified implements the functions related to the input port of the modular FLASH to be verified by calling the tasks defined by the driving input interface module in the functional operation module; The modular FLASH to be verified introduces the relevant function identification signal of the modular FLASH module to be verified into the functional operation module for comparison through the signal monitoring interface module.

5. The system according to claim 3, characterized in that Each test case adopts a combination of directional and random configuration in parameter configuration, where: The directional and random combination method includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate random clock configuration parameters, and the random clock configuration parameters are used by the clock generation module to generate a random system clock.

6. The system according to claim 5, characterized in that The method of combining directional and random includes configuring the parameters of the system parameter integration module through the parameter configuration module to generate directional and random function configuration parameters, and the directional and random function configuration parameters can be provided to the system parameter integration module or used for the function operation module to operate the corresponding function.

7. The system according to claim 3, characterized in that Each test case adopts a comprehensive configuration method in functional operation, and the comprehensive configuration method is: calling the read data task or write data task defined by the read and write task configuration module through the functional operation module to perform the first type of functional verification operation on the modular FLASH to be verified, and the first type of functional verification operation is the read and write data operation; or, calling the port operation task defined by the drive input interface module to perform the second type of functional verification operation on the modular FLASH to be verified, and the second type of functional verification operation includes encryption and decryption operations.

8. The system according to claim 7, characterized in that Each test case adopts a combination of data comparison and function identification signal comparison in result verification, and the combination of data comparison and function identification signal comparison includes: simultaneously calling the read data task or write data task defined by the read and write task configuration module in the function operation module, comparing the data written in and the data read out, and referencing the function identification signal defined by the signal monitoring interface module to perform target function comparison, wherein the target function comparison is the comparison result corresponding to the second type of function verification operation.

9. A method for verifying modular FLASH, running in a system as claimed in any one of claims 1 to 8, the method comprising: Each test case performs a targeted configuration of some parameters of the system parameter integration module in the parameter configuration module according to the function point to be tested, and the remaining parameters except the said some parameters are randomly configured; Generate a random system clock through the clock generation module according to the configured parameters and connect it to the clock port of the modular FLASH to be verified; The register of the modular FLASH to be verified is configured through the system parameter integration module, and the function signal value corresponding to the second type of function verification operation is transmitted to the input port of the modular FLASH to be verified through the function operation module calling the port operation task defined by the driver input interface module, wherein the second type of function verification operation is a function of the modular FLASH in addition to the first type of function verification operation, and the first type of function verification operation includes a read data function verification operation and a write data function verification operation; Calling the data writing task defined by the read-write task configuration module to write the data to the storage area of ​​the modular FLASH to be verified; Calling the data reading task defined by the read-write task configuration module to read the data to be read from the storage area of ​​the modular FLASH to be verified to the functional operation module, and comparing it with the written data; By referencing the interface signal defined by the signal monitoring interface module, part of the function identification signal of the modular FLASH to be verified is transmitted to the function operation module for comparison with the corresponding function to be tested.

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