A bridgeless CRM mode PFC inductor current zero-crossing detection circuit
By designing a circuit structure for the PFC inductor current zero-crossing detection circuit without bridge CRM mode, the problem of inability to accurately detect the voltage at both ends of the switch MOS tube in the prior art is zero or the lowest point, and the switching loss is reduced and improved The effect of conversion efficiency.
Patent Information
- Application Number
- CN202411201692.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-29
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2044-08-29
AI Technical Summary
The prior art cannot accurately detect that the voltage across the switch MOS tube in the totem pole bridgeless PFC circuit is zero or the lowest point, resulting in the failure to achieve the best soft switching effect, increasing switching losses.
A circuit for zero-crossing detection of PFC inductor current for bridgeless CRM mode is designed. Through signal processing circuit, comparator circuit, voltage divider circuit and driving circuit, it accurately detects when the inductor current of PFC inductor L is zero, and the switch MOS tube is switched. The voltage VDS between the source and drain opens the switch MOS tube at the lowest voltage or zero voltage.
Accurate detection of voltages at both ends of the switch MOS tube is achieved, ensuring that the MOS tube is turned on at zero voltage or the lowest voltage, reducing switching losses and improving the conversion efficiency of the PFC circuit.
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Figure CN118713462B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of zero voltage switching circuits, and in particular to a zero-crossing detection circuit for a PFC inductor current in a bridgeless CRM mode. Background Art
[0002] Totem pole bridgeless PFC has the advantages of low common mode interference noise, fewer components, and high efficiency. With the development of power electronics technology, the demand for high-power converters is becoming more and more widespread, and the requirements for converter efficiency and power density are also getting higher and higher. Totem pole bridgeless PFC has become the first choice for AC-DC conversion in high-efficiency high-power converters. As we all know, the inductor charging circuit of the totem pole bridgeless PFC topology has one less diode in the rectifier bridge than the bridge PFC topology. The MOS tube is used in the inductor discharge circuit to replace the discharge rectifier diode of the bridge PFC, and there is also one less diode in the rectifier bridge in the circuit. The circuit diagram of the bridge PFC is as follows: Figure 1 As shown, the totem pole bridgeless PFC circuit is as follows Figure 2 As shown. In the discharge circuit, the conduction loss of the MOS tube is lower than that of the diode. Therefore, in summary, the conversion efficiency of the totem pole bridgeless PFC is higher than that of the bridge PFC. However, whether the MOS tube is used as a switch tube or a freewheeling tube, there are still switching losses during the turn-on and turn-off process. In order to further improve the conversion efficiency of the PFC circuit, it is usually chosen to let the PFC circuit work in CRM mode, that is, the inductor current works in critical continuous mode. This mode can effectively reduce the switching loss of the switch tube and improve the conversion efficiency. The MOS tube of the totem pole bridgeless PFC working in CRM mode can only better reduce the loss by achieving zero voltage turn-on, such as Figure 3 As shown in the figure, a common practice is to add an auxiliary winding to the PFC inductor and use this auxiliary winding to monitor the change of the inductor voltage. For example, when the inductor current i L When the discharge reaches zero, the discharge MOS tube Q1 is turned off, and the auxiliary winding voltage will follow the switch MOS tube Q2 voltage. Fluctuates and then by setting a threshold voltage V th To determine the auxiliary winding voltage zero point, generate voltage zero V ZCD signal, and then through a T delay After the delay, the switch tube Q2 is turned on, and the waveform is as follows Figure 4 This method cannot accurately find the voltage V across the switch tube. DS When the voltage is zero or at the lowest point, the best soft switching effect cannot be achieved. Summary of the invention
[0003] In view of this, it is necessary to provide a bridgeless CRM mode PFC inductor current zero-crossing detection circuit that can accurately detect when the inductor current in the PFC circuit is zero and the voltage across the switch MOS tube is zero or at the lowest point.
[0004] A bridgeless CRM mode PFC inductor current zero-crossing detection circuit is used for detecting the zero point or the lowest point of the voltage across the switch MOS tube when the totem pole bridgeless PFC circuit works in the CRM mode, and controlling the switch MOS tube to be turned on, comprising a totem pole bridgeless PFC circuit and an inductor current detection circuit, wherein the totem pole bridgeless PFC circuit comprises an AC input terminal, a PFC inductor L, two switch MOS tubes, two low-frequency diodes and an output terminal capacitor C1, wherein the inductor current detection circuit comprises two inductor current detection circuits, and each inductor current detection circuit comprises a circuit according to The signal processing circuit, comparator circuit, voltage divider circuit and drive circuit are connected to each other, the input end of the signal processing circuit is connected to the input voltage Vin of the AC input end and the output voltage Vout of the output end capacitor C1, the output end voltage of the signal processing circuit is respectively connected to the two comparator circuits, and the output voltage of the comparator circuit controls the on and off of the two switch MOS tubes respectively through the drive circuit; the inductor current detection circuit is used to detect that the inductor current of the PFC inductor L is zero, and the voltage V between the source and the drain of the switch MOS tube is DS The switch MOS tube is turned on at the lowest voltage or zero voltage to reduce the switching loss of the switch MOS tube.
[0005] Preferably, the PFC inductor L is connected in series to the AC input end, the two switch MOS transistors include a first switch MOS transistor Q1 and a second switch MOS transistor Q2, and the two low-frequency diodes include a third diode D3 and a fourth diode D4; a connection point between the source of the first switch MOS transistor Q1, the drain of the second switch MOS transistor Q2 and the PFC inductor L is point A, a connection point between the drain of the first switch MOS transistor Q1 and the cathode of the third diode D3 is point B, a connection point between the source of the second switch MOS transistor Q2 and the anode of the fourth diode D4 is point C, a connection point between the anode of the third diode D3 and the cathode of the fourth diode D4 is connected to the AC input end, and two ends of the output-end capacitor C1 are connected to point B and point C respectively, and point C is grounded.
[0006] Preferably, the inductor current detection circuit includes a first detection drive circuit and a second detection drive circuit, the first detection drive circuit includes a first signal processor, a first comparator, a first voltage divider circuit and a first drive control circuit, the second detection drive circuit includes a second signal processor, a second comparator, a second voltage divider circuit and a second drive control circuit, the first detection drive circuit and the second detection drive circuit are respectively used to drive the first switch MOS tube Q1 and the second switch MOS tube Q2 to be turned on and off.
[0007] Preferably, the input end of the first signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the first signal processor is connected to the inverting input end of the first comparator, the input signal of the first signal processor is the input voltage signal Vin of the AC input end and the output signal Vout of the output end capacitor C1, and the output end signal of the first signal processor is The input voltage of the first voltage divider circuit is V CA , the output signal of the first voltage divider circuit is KV CA , the output end of the first voltage divider circuit is connected to the non-inverting input end of the first comparator; the output end signal of the first comparator is V ZCD1 , the output end of the first comparator is connected to the input end of the first drive control circuit, and the output end of the first drive control circuit is connected to the gate of the first switch MOS tube Q1;
[0008] The input end of the second signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the second signal processor is connected to the non-inverting input end of the second comparator, the input signal of the second signal processor is the input voltage Vin of the AC input end and the output signal Vout of the output end capacitor C1, and the output end signal of the second signal processor is ; The input voltage of the second voltage divider circuit is V CA , the output signal of the second voltage divider circuit is KV CA The output end of the second voltage divider circuit is connected to the inverting input end of the second comparator, and the output end signal of the second comparator is V ZCD2 , the output end of the second comparator is connected to the input end of the second drive control circuit, and the output end of the second drive control circuit is connected to the gate of the second switch MOS tube Q2;
[0009] Wherein, K is the voltage division coefficient of the first voltage division circuit and the second voltage division circuit, V CA is the voltage between point C and point A in the totem pole bridgeless PFC circuit.
[0010] Preferably, the first signal processor and the second signal processor are both powered by a single positive voltage, the voltage is VCC1; the first comparator and the second comparator are both powered by a positive and negative dual power supply, the supply voltage is ±VCC2, and VCC2>VCC1.
[0011] Preferably, the AC input positive half cycle of the totem pole bridgeless PFC circuit, The second switch MOS tube Q2 is a switch tube, the first switch MOS tube Q1 is a freewheeling tube, and the output voltage signal KV of the second voltage divider circuit is CA is less than the output signal of the second signal processor When the output signal of the second comparator V ZCD2 Change from low level to high level, so that the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage;
[0012] The totem pole bridgeless PFC circuit has a negative half cycle of AC input. The first switch MOS tube Q1 is a switch tube, the second switch MOS tube Q2 is a freewheeling tube, and the output voltage signal KV of the first voltage divider circuit is CA is greater than the output signal of the first signal processor When the output signal V ZCD1 The voltage level changes from low to high, so that the first switch MOS tube Q1 is turned on at zero voltage or the lowest voltage.
[0013] Preferably, the inductor current detection circuit includes a third signal processor, a third detection drive circuit and a fourth detection drive circuit, the third detection drive circuit and the fourth detection drive circuit are connected to the output end of the third signal processor, the third detection drive circuit includes a third comparator, a differential amplifier and a third drive control circuit, the fourth detection drive circuit includes a fourth comparator, a fourth voltage divider circuit and a fourth drive control circuit, and the third detection drive circuit and the fourth detection drive circuit are respectively used to drive the first switch MOS tube Q1 and the second switch MOS tube Q2 to be turned on and off.
[0014] Preferably, the input end of the third signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the third signal processor is connected to the non-inverting input end of the third comparator and the non-inverting input end of the fourth comparator, the input signal of the third signal processor is the input voltage Vin of the AC input end and the output end Vout of the output end capacitor C1, and the output end signal of the third signal processor is ;
[0015] The non-inverting input terminal of the differential amplifier is connected to point B in the totem pole bridgeless PFC circuit, the inverting input terminal of the differential amplifier is connected to point A in the totem pole bridgeless PFC circuit, the output terminal of the differential amplifier is connected to the inverting input terminal of the third comparator, and the input signal of the non-inverting input terminal of the differential amplifier is a voltage signal V B , the input signal of the inverting input terminal of the differential amplifier is a voltage signal V A , the output signal of the differential amplifier is KV AB ; The output signal of the third comparator is V ZCD1 ', the output end of the third comparator is connected to the input end of the third drive control circuit, and the output end of the third drive control circuit is connected to the gate of the first switch MOS tube Q1;
[0016] The input voltage of the fourth voltage divider circuit is V CA , the output signal of the fourth voltage divider circuit is KV CA The output end of the fourth voltage divider circuit is connected to the inverting input end of the fourth comparator, and the output end signal of the fourth comparator is V ZCD2 ', the output end of the fourth comparator is connected to the input end of the fourth drive control circuit, and the output end of the fourth drive control circuit is connected to the gate of the second switch MOS tube Q2.
[0017] Preferably, the AC input positive half cycle of the totem pole bridgeless PFC circuit, The second switch MOS tube Q2 is a switch tube, the first switch MOS tube Q1 is a freewheeling tube, and the output voltage signal KV of the fourth voltage divider circuit is CA is less than the output signal of the third signal processor When the output signal V ZCD2 'Changes from low level to high level, so that the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage;
[0018] The totem pole bridgeless PFC circuit has a negative half cycle of AC input. , the first switch MOS tube Q1 is a switch tube, the second switch MOS tube Q2 is a freewheeling tube, and the voltage V between point A and point B AB is less than the output signal of the third signal processor When the output signal V ZCD1 'Changes from a low level to a high level, so that the first switch MOS tube Q1 is turned on at zero voltage or the lowest voltage.
[0019] Preferably, the third signal processor is powered by a single positive voltage, the voltage is VCC1; the third comparator and the fourth comparator are both powered by a positive and negative dual power supply, the supply voltage is ±VCC2, and VCC2>VCC1.
[0020] The above is used in the bridgeless CRM mode PFC inductor current zero-crossing detection circuit, the positive half cycle of the AC Right now When the PFC inductor L of the totem pole bridgeless PFC circuit is charged, after the second switch MOS tube Q2 is turned off, the PFC inductor L starts to discharge, and after the inductor current returns to zero, the totem pole midpoint voltage VCA oscillates to zero or the lowest point; the negative half cycle of the AC power Right now When the totem pole midpoint voltage VCA oscillates to Vout or the highest point. When it is at the lowest or highest point, the driving voltage signal of the switch MOS tube By changing from a low level to a high level, the switching MOS tube is controlled to be turned on, so that the MOS tube can be turned on at zero voltage or the lowest voltage, thereby reducing the turn-on loss of the MOS tube. The totem pole bridgeless PFC topology circuit in the present invention works in the CRM mode, and can accurately detect that the voltage across the switch MOS tube is zero or the lowest point, so as to achieve the effect of reducing the turn-on loss. The circuit structure of the present invention is simple, easy to implement, low cost, and easy to promote. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 It is a structural schematic diagram of a bridge PFC circuit in the prior art.
[0022] Figure 2 It is a structural schematic diagram of a totem pole bridgeless PFC circuit in the prior art.
[0023] Figure 3 It is a structural schematic diagram of a circuit in the prior art in which an auxiliary winding is added to a totem pole bridgeless PFC circuit.
[0024] Figure 4 It is a waveform diagram of a ZCD signal after an auxiliary winding is added to a totem pole bridgeless PFC circuit in the prior art.
[0025] Figure 5 It is a structural schematic diagram of a bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to a first embodiment of the present invention.
[0026] Figure 6 (a) to Figure 6 (d) is a waveform diagram of a ZCD signal of a bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to the first embodiment of the present invention.
[0027] Figure 7 It is a structural schematic diagram of a bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to a second embodiment of the present invention.
[0028] Figure 8 (a) to Figure 8 (d) is a waveform diagram of a ZCD signal of a bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to the second embodiment of the present invention. DETAILED DESCRIPTION
[0029] This embodiment takes a bridgeless CRM mode PFC inductor current zero-crossing detection circuit as an example, and the present invention will be described in detail below in conjunction with specific embodiments and drawings.
[0030] Embodiment 1
[0031] See also Figure 5 , showing a bridgeless CRM mode PFC inductor current zero-crossing detection circuit provided by the first embodiment of the present invention, in the positive half cycle of the AC ,Right now When the second switch MOS tube Q2 is used as a switch tube, the first switch MOS tube Q1 is used as a freewheeling tube, and the AC voltage at the AC input end is = and the output voltage of the output capacitor C1 is input to the input terminal of the second signal processor, and the second signal processor outputs a signal , and send this signal to the non-inverting input terminal of the second comparator as the reference voltage of the second comparator, and then divide the totem pole midpoint voltage VCA into KVCA according to the ratio K and send it to the reverse input terminal of the second comparator, where K is the voltage division coefficient of the voltage division circuit, which is used to divide the input high voltage according to the ratio K into the voltage range that the signal processor can handle, usually dividing the high voltage of hundreds of volts into a few volts. The second signal processor adopts a single positive voltage power supply, the voltage is VCC1, and the output signal of the second signal processor is The second comparator is powered by a positive and negative dual power supply, and the power supply voltage is VCC2, where VCC2>VCC1, so as to ensure that when the totem pole midpoint voltage VCA oscillates to less than zero (lower than the zero voltage by the body diode voltage drop of the switching MOS tube), the second comparator can still handle When the second switch MOS tube Q2 is turned on, V CA =0, the PFC inductor L is charged, and the second comparator outputs a signal V ZCD2 is high level, and when the second switch MOS tube Q2 is turned off, the charging of the PFC inductor L is completed, V CA =V out +VD1 (V D1 is the body diode voltage of the first switch MOS tube Q1), the current flows through the body diode of the first switch MOS tube Q1, and then the first switch MOS tube Q1 is turned on. At this time, the output signal V ZCD2 When the freewheeling current drops to zero (before the current drops to zero, the first switch MOS tube Q1 is turned off), due to the parasitic parameters of the PFC inductor L, the parasitic capacitance of the MOS tube and the PCB board, V CA Voltage damping oscillation, when V CA When the voltage drops below the voltage at the non-inverting input terminal of the second comparator, the output signal V ZCD2 From low level to high level, the MCU of the second drive control circuit detects that V ZCD2 When the signal changes from low level to high level, the second switch MOS tube Q2 is turned on, and the PFC inductor L starts to charge. Thus, the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage. The waveform reference is as follows: Figure 6 (a) and Figure 6 As shown in (b) in .
[0032] In the negative half cycle of AC, When the first switch MOS tube Q1 is used as a switch tube, the second switch MOS tube Q2 is used as a freewheeling tube, and the AC voltage at the AC input end is = and the output voltage of the output capacitor C1 The first signal processor outputs a signal after processing. , and send this signal to the inverting input terminal of the first comparator as the reference voltage of the first comparator, and then convert the totem pole midpoint voltage V CA The proportional voltage K is KV CA Then sent to the non-inverting input terminal of the first comparator, where K is the voltage division coefficient of the voltage division circuit. The first signal processor uses a single positive voltage supply voltage, the voltage is VCC1, and the output signal of the first signal processor The first comparator is powered by a positive and negative dual power supply, and the low voltage of the power supply is ±VCC2, wherein VCC2>VCC1, thereby ensuring that when the totem pole midpoint voltage V CA Oscillates to greater than V out (than the maximum voltage V out high MOS tube body diode voltage drop), the first comparator can still handle When the first switch MOS tube Q1 is turned on, V CA =V out, the PFC inductor L is charged, the output signal V ZCD1 is high level, when the first switch MOS tube Q1 is turned off, the charging of the PFC inductor L is completed, V CA =V D2 (V D2 = Q2 body diode voltage), the current flows through the body diode of the second switch MOS tube Q2, and then the second switch MOS tube Q2 is turned on. At this time, the output signal V ZCD1 When the freewheeling current drops to zero (before the current drops to zero, the second switch MOS tube Q2 is turned off), due to the parasitic parameters of the PFC inductor L, the parasitic capacitance of the MOS tube and the PCB board, V CA Voltage damped oscillation, when the voltage rises to a value higher than the voltage at the inverting input terminal of the first comparator, the output signal V ZCD1 From low level to high level, the MCU of the first drive control circuit detects that V ZCD1 When the signal changes from low level to high level, the first switch MOS tube Q1 is turned on, and the PFC inductor L starts to charge. Thus, the first switch MOS tube Q1 is turned on at zero voltage or minimum voltage. The waveform reference is as follows: Figure 6 (c) and Figure 6 As shown in (d) in .
[0033] Embodiment 2
[0034] See also Figure 7 , showing a bridgeless CRM mode PFC inductor current zero-crossing detection circuit provided by the second embodiment of the present invention, the AC input terminal V L 、V N And the output voltage V of the output capacitor C1 out The signal is input into the third signal processor, and the output signal of the third processor is ,in, In the positive half cycle of AC, that is When the second switch MOS tube Q2 is used as a switch tube, the first switch MOS tube Q1 is used as a freewheeling tube. The signal is transmitted to the non-inverting input terminal of the fourth comparator as the reference voltage of the fourth comparator, and then the totem pole midpoint voltage V CA The proportional voltage K is KV CA The third signal processor is powered by a single positive voltage, the voltage is VCC1, and the output signal of the third signal processor is The fourth comparator is powered by a positive and negative dual power supply, the power supply voltage is VCC2, wherein VCC2>VCC1, thereby ensuring that when the totem pole midpoint voltage V CA When the voltage oscillates to less than zero (lower than the body diode voltage drop of the MOS tube than zero voltage), the fourth comparator can still handle When the second switch MOS tube Q2 is turned on, V CA =0, the PFC inductor L is charged, and the output signal V ZCD2 ' is high level, when the second switch MOS tube Q2 is turned off, the charging of the PFC inductor L is completed, and the totem pole midpoint voltage V CA Starts to rise when V CA =V out +V D1 (V D1 is the body diode voltage of the first switch MOS tube Q1), the current continues to flow through the body diode of the first switch MOS tube Q1, and the current decreases. Then the first switch MOS tube Q1 is turned on. At this time, the fourth comparator outputs a signal V ZCD2 ' is low level. When the freewheeling current drops to zero (before the current drops to zero, the first switch MOS tube Q1 is turned off), due to the parasitic parameters of the PFC inductor L, the parasitic capacitance of the MOS tube and the PCB board, V CA The voltage damping oscillation occurs when the voltage drops below the voltage at the non-inverting input terminal of the fourth comparator. When the output signal V ZCD2 ' changes from low level to high level, the MCU of the fourth drive control circuit detects V ZCD2 When the signal changes from low level to high level, the second switch MOS tube Q2 is turned on, and the PFC inductor L starts to charge. Thus, the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage. The waveform reference is as follows: Figure 8 (a) and Figure 8 As shown in (b) in .
[0035] In the negative half cycle of AC, When the first switch MOS tube Q1 is used as a switch tube, the second switch MOS tube Q2 is used as a freewheeling tube, and the output signal of the third signal processor is is sent to the non-inverting input terminal of the third comparator as the reference voltage of the third comparator. A and V B The output signal KV of the differential amplifier is respectively transmitted to the inverting input and the non-inverting input of the differential amplifier powered by the positive and negative power supplies ±VCC2. ABThe third signal processor is powered by a single positive voltage, the voltage is VCC1, and the output signal of the third signal processor is The third comparator is powered by a positive and negative dual power supply, and the power supply low voltage is ±VCC2, where VCC2>VCC1, thereby ensuring that when the voltage V AB When the voltage oscillates to less than 0 (lower than the body diode voltage drop of the MOS tube than the zero voltage), the third comparator can still handle When the first switch MOS tube Q1 is turned on, V AB =0, the PFC inductor L is charged, and the output signal V ZCD1 ' is high level, when the first switch MOS tube Q1 is turned off, the charging of the PFC inductor L is completed, V AB =V out -V D2 (V D2 is the body diode of the MOS tube Q2), the current flows through the body diode of the second switch MOS tube Q2, and then the second switch MOS tube Q2 is turned on. At this time, the output signal V ZCD1 ' is low level. When the freewheeling current drops to zero (before the current drops to zero, the second switch MOS tube Q2 is turned off), due to the parasitic parameters of the PFC inductor L, the parasitic capacitance of the MOS tube and the PCB board, V AB Voltage damped oscillation, when the voltage drops below the input voltage of the non-inverting input terminal of the third comparator, the output signal V ZCD1 ' changes from low level to high level, the MCU of the third drive control circuit detects V ZCD1 When the signal changes from low level to high level, the first switch MOS tube Q1 is turned on, and the PFC inductor L starts to charge. Thus, the first switch MOS tube Q1 is turned on at zero voltage or minimum voltage. The waveform reference is as follows: Figure 8 (c) and Figure 8 As shown in (d) in .
[0036] The present invention can realize the upper and lower tubes of the totem pole bridgeless PFC circuit through a simple and effective circuit. The voltage is accurately detected to determine when the inductor current is discharged to zero. The change of the oscillation valley voltage is reflected in the reference voltage of the comparator, making the reference voltage and It changes with the change, thereby ensuring that the switch tube can always be turned on when the voltage across the switch tube oscillates to the lowest or zero, thereby reducing the switching loss of the switch tube.
[0037] The above is used in the bridgeless CRM mode PFC inductor current zero-crossing detection circuit, the positive half cycle of the AC Right now When the PFC inductor L of the totem pole bridgeless PFC circuit is charged, after the second switch MOS tube Q2 is turned off, the PFC inductor L starts to discharge, and after the inductor current returns to zero, the totem pole midpoint voltage VCA oscillates to zero or the lowest point; the negative half cycle of the AC power Right now When the totem pole midpoint voltage VCA oscillates to Vout or the highest point. When it is at the lowest or highest point, the driving voltage signal of the switch MOS tube By changing from a low level to a high level, the switching MOS tube is controlled to be turned on, so that the MOS tube can be turned on at zero voltage or the lowest voltage, thereby reducing the turn-on loss of the MOS tube. The totem pole bridgeless PFC topology circuit in the present invention works in the CRM mode, and can accurately detect that the voltage across the switch MOS tube is zero or the lowest point, so as to achieve the effect of reducing the turn-on loss. The circuit structure of the present invention is simple, easy to implement, low cost, and easy to promote.
[0038] It should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A bridgeless CRM mode PFC inductor current zero-crossing detection circuit, used for detecting the zero point or the lowest point of the voltage across the switch MOS tube when the totem pole bridgeless PFC circuit works in the CRM mode, and controlling the switch MOS tube to be turned on, characterized in that: The invention comprises a totem pole bridgeless PFC circuit and an inductor current detection circuit. The totem pole bridgeless PFC circuit comprises an AC input terminal, a PFC inductor L, two switch MOS tubes, two low-frequency diodes and an output terminal capacitor C1. The inductor current detection circuit comprises two inductor current detection circuits. Each of the inductor current detection circuits comprises a signal processing circuit, a comparator circuit, a voltage divider circuit and a drive circuit connected in sequence. The input terminal of the signal processing circuit is connected to an input voltage Vin of the AC input terminal and an output voltage Vout of the output terminal capacitor C1. The output terminal voltage of the signal processing circuit is respectively connected to the two comparator circuits. The output voltage of the comparator circuit controls the conduction and closing of the two switch MOS tubes respectively through the drive circuit. The inductor current detection circuit is used to detect that the inductor current of the PFC inductor L is zero and the voltage V between the source and the drain of the switch MOS tube is zero. DS Turning on the switch MOS tube at the lowest voltage or zero voltage to reduce the switching loss of the switch MOS tube; Wherein, the PFC inductor L is connected in series to the AC input end, the two switch MOS transistors include a first switch MOS transistor Q1 and a second switch MOS transistor Q2, and the two low-frequency diodes include a third diode D3 and a fourth diode D4; the connection point between the source of the first switch MOS transistor Q1, the drain of the second switch MOS transistor Q2 and the PFC inductor L is point A, the connection point between the drain of the first switch MOS transistor Q1 and the cathode of the third diode D3 is point B, the connection point between the source of the second switch MOS transistor Q2 and the anode of the fourth diode D4 is point C, the connection point between the anode of the third diode D3 and the cathode of the fourth diode D4 is connected to the AC input end, and the two ends of the output capacitor C1 are connected to point B and point C respectively, and point C is grounded; The inductor current detection circuit includes a first detection drive circuit and a second detection drive circuit, the first detection drive circuit includes a first signal processor, a first comparator, a first voltage divider circuit and a first drive control circuit, the second detection drive circuit includes a second signal processor, a second comparator, a second voltage divider circuit and a second drive control circuit, the first detection drive circuit and the second detection drive circuit are respectively used to drive the first switch MOS tube Q1 and the second switch MOS tube Q2 to turn on and off; The input end of the first signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the first signal processor is connected to the inverting input end of the first comparator, the input signal of the first signal processor is the input voltage signal Vin of the AC input end and the output signal Vout of the output end capacitor C1, and the output end signal of the first signal processor is The input voltage of the first voltage divider circuit is V CA , the output signal of the first voltage divider circuit is KV CA , the output end of the first voltage divider circuit is connected to the non-inverting input end of the first comparator; the output end signal of the first comparator is V ZCD1 , the output end of the first comparator is connected to the input end of the first drive control circuit, and the output end of the first drive control circuit is connected to the gate of the first switch MOS tube Q1; The input end of the second signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the second signal processor is connected to the non-inverting input end of the second comparator, the input signal of the second signal processor is the input voltage Vin of the AC input end and the output signal Vout of the output end capacitor C1, and the output end signal of the second signal processor is ; The input voltage of the second voltage divider circuit is V CA , the output signal of the second voltage divider circuit is KV CA The output end of the second voltage divider circuit is connected to the inverting input end of the second comparator, and the output end signal of the second comparator is V ZCD2 , the output end of the second comparator is connected to the input end of the second drive control circuit, and the output end of the second drive control circuit is connected to the gate of the second switch MOS tube Q2; Wherein, K is the voltage division coefficient of the first voltage division circuit and the second voltage division circuit, V CA is the voltage between point C and point A in the totem pole bridgeless PFC circuit.
2. The bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to claim 1, characterized in that: The first signal processor and the second signal processor are both powered by a single positive voltage, the voltage is VCC1; the first comparator and the second comparator are both powered by a positive and negative dual power supply, the supply voltage is ±VCC2, and VCC2>VCC1.
3. The bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to claim 1, characterized in that: The totem pole bridgeless PFC circuit has an AC input positive half cycle. The second switch MOS tube Q2 is a switch tube, the first switch MOS tube Q1 is a freewheeling tube, and the output voltage signal KV of the second voltage divider circuit is CA is less than the output signal of the second signal processor When the output signal of the second comparator V ZCD2 Change from low level to high level, so that the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage; The totem pole bridgeless PFC circuit has a negative half cycle of AC input. The first switch MOS tube Q1 is a switch tube, the second switch MOS tube Q2 is a freewheeling tube, and the output voltage signal KV of the first voltage divider circuit is CA is greater than the output signal of the first signal processor When the output signal V ZCD1 The voltage level changes from low to high, so that the first switch MOS tube Q1 is turned on at zero voltage or the lowest voltage.
4. A bridgeless CRM mode PFC inductor current zero-crossing detection circuit, used for detecting the zero point or the lowest point of the voltage across the switch MOS tube when the totem pole bridgeless PFC circuit works in the CRM mode, and controlling the switch MOS tube to be turned on, characterized in that: The invention comprises a totem pole bridgeless PFC circuit and an inductor current detection circuit. The totem pole bridgeless PFC circuit comprises an AC input terminal, a PFC inductor L, two switch MOS tubes, two low-frequency diodes and an output terminal capacitor C1. The inductor current detection circuit comprises two inductor current detection circuits. Each of the inductor current detection circuits comprises a signal processing circuit, a comparator circuit, a voltage divider circuit and a drive circuit connected in sequence. The input terminal of the signal processing circuit is connected to an input voltage Vin of the AC input terminal and an output voltage Vout of the output terminal capacitor C1. The output terminal voltage of the signal processing circuit is respectively connected to the two comparator circuits. The output voltage of the comparator circuit controls the conduction and closing of the two switch MOS tubes respectively through the drive circuit. The inductor current detection circuit is used to detect that the inductor current of the PFC inductor L is zero and the voltage V between the source and the drain of the switch MOS tube is zero. DS Turning on the switch MOS tube at the lowest voltage or zero voltage to reduce the switching loss of the switch MOS tube; Wherein, the PFC inductor L is connected in series to the AC input end, the two switch MOS transistors include a first switch MOS transistor Q1 and a second switch MOS transistor Q2, and the two low-frequency diodes include a third diode D3 and a fourth diode D4; the connection point between the source of the first switch MOS transistor Q1, the drain of the second switch MOS transistor Q2 and the PFC inductor L is point A, the connection point between the drain of the first switch MOS transistor Q1 and the cathode of the third diode D3 is point B, the connection point between the source of the second switch MOS transistor Q2 and the anode of the fourth diode D4 is point C, the connection point between the anode of the third diode D3 and the cathode of the fourth diode D4 is connected to the AC input end, and the two ends of the output capacitor C1 are connected to point B and point C respectively, and point C is grounded; The inductor current detection circuit includes a third signal processor, a third detection drive circuit and a fourth detection drive circuit, wherein the third detection drive circuit and the fourth detection drive circuit are connected to the output end of the third signal processor, the third detection drive circuit includes a third comparator, a differential amplifier and a third drive control circuit, the fourth detection drive circuit includes a fourth comparator, a fourth voltage divider circuit and a fourth drive control circuit, and the third detection drive circuit and the fourth detection drive circuit are used to drive the first switch MOS tube Q1 and the second switch MOS tube Q2 to be turned on and off respectively; The input end of the third signal processor is connected to the AC input end and the output end of the output end capacitor C1, the output end of the third signal processor is connected to the non-inverting input end of the third comparator and the non-inverting input end of the fourth comparator, the input signal of the third signal processor is the input voltage Vin of the AC input end and the output end Vout of the output end capacitor C1, and the output end signal of the third signal processor is ; The non-inverting input terminal of the differential amplifier is connected to point B in the totem pole bridgeless PFC circuit, the inverting input terminal of the differential amplifier is connected to point A in the totem pole bridgeless PFC circuit, the output terminal of the differential amplifier is connected to the inverting input terminal of the third comparator, and the input signal of the non-inverting input terminal of the differential amplifier is a voltage signal V B , the input signal of the inverting input terminal of the differential amplifier is a voltage signal V A , the output signal of the differential amplifier is KV AB ; The output signal of the third comparator is V ZCD1 ', the output end of the third comparator is connected to the input end of the third drive control circuit, and the output end of the third drive control circuit is connected to the gate of the first switch MOS tube Q1; The input voltage of the fourth voltage divider circuit is V CA , the output signal of the fourth voltage divider circuit is KV CA The output end of the fourth voltage divider circuit is connected to the inverting input end of the fourth comparator, and the output end signal of the fourth comparator is V ZCD2 ', the output end of the fourth comparator is connected to the input end of the fourth drive control circuit, and the output end of the fourth drive control circuit is connected to the gate of the second switch MOS tube Q2.
5. The bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to claim 4, characterized in that: The totem pole bridgeless PFC circuit has an AC input positive half cycle. The second switch MOS tube Q2 is a switch tube, the first switch MOS tube Q1 is a freewheeling tube, and the output voltage signal KV of the fourth voltage divider circuit is CA is less than the output signal of the third signal processor When the output signal V ZCD2 'Changes from low level to high level, so that the second switch MOS tube Q2 is turned on at zero voltage or minimum voltage; The totem pole bridgeless PFC circuit has a negative half cycle of AC input. , the first switch MOS tube Q1 is a switch tube, the second switch MOS tube Q2 is a freewheeling tube, and the voltage V between point A and point B AB is less than the output signal of the third signal processor When the output signal V ZCD1 'Changes from a low level to a high level, so that the first switch MOS tube Q1 is turned on at zero voltage or the lowest voltage.
6. The bridgeless CRM mode PFC inductor current zero-crossing detection circuit according to claim 4, characterized in that: The third signal processor is powered by a single positive voltage, the voltage is VCC1; the third comparator and the fourth comparator are both powered by a positive and negative dual power supply, the power supply voltage is ±VCC2, and VCC2>VCC1.
Citation Information
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Inductive current zero-cross detection circuit of CRM mode PFC (Power Factor Correction)
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