Vibration control method and system based on multi-core heterogeneous architecture
Through the division of labor and parallel processing of multi-core heterogeneous architecture, the problems of low real-time and efficiency in the existing vibration control system are solved, and more efficient vibration control effects are achieved.
Patent Information
- Application Number
- CN202411231882.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-04
- Publication Date
- 2024-12-06
AI Technical Summary
When the existing vibration control system uses single CPU and multi-task forms, the vibration control core data algorithm and data acquisition cycle cannot meet the real-time requirements, and the real-time and effect of the control instructions are not ideal.
Adopting a multi-core heterogeneous architecture, the bus processing module, core computing module and data recording module are clearly divided into labor, and the functions of each module are decoupled and parallelized, and the acceleration signals and speed signals of the carrier system are collected, and control instructions are generated based on these signals. To suppress vibration.
It improves the real-time and effectiveness of the vibration control system, avoids task preemption issues, and greatly improves control efficiency and integration.
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Figure CN119088103A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to the technical field of multi-core heterogeneous architecture, and specifically relates to a vibration control method and system based on a multi-core heterogeneous architecture. Background Art
[0002] In the vibration control system, the vibration information of the carrier body is obtained mainly by collecting sensor signals and discrete quantity signals, and then the vibration control algorithm is used to solve the collected signals and output control instructions to apply opposite forces, thereby achieving the effect of suppressing the vibration of the carrier.
[0003] At present, in the existing vibration control system, the above functions are realized by adopting a single CPU and multi-tasking. Although this method is multi-task parallel execution at the macro level, it is still serial processing at the micro level. For embedded operating systems such as VxWorks that use preemptive scheduling, key tasks such as vibration control core data algorithms or data acquisition may be preempted by other tasks, resulting in the algorithm or data acquisition cycle failing to meet the requirements, the real-time performance of control instructions failing to meet the use requirements, and the control effect being unsatisfactory. Summary of the invention
[0004] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a vibration control method and system based on a multi-core heterogeneous architecture to solve the above-mentioned problems.
[0005] The first aspect of the present application provides a vibration control method based on a multi-core heterogeneous architecture, comprising:
[0006] Acquire the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than a preset collection period, collect the acceleration signal and the rotation speed signal of the carrier system at the current moment;
[0007] The acceleration signal and the rotational speed signal are sent to the core computing module through the data recording module, so that the core computing module generates a control instruction according to the vibration state signal, the vibration state signal at least includes the acceleration signal and the rotational speed signal, and the control instruction is used to control the carrier system to output an opposite force.
[0008] According to the technical solution provided in the embodiment of the present application, the method further includes:
[0009] The control instruction is received from the core computing module through the data recording module, and the control instruction is forwarded to the carrier system.
[0010] A second aspect of the present application provides a vibration control method based on a multi-core heterogeneous architecture, the method comprising:
[0011] The acceleration signal and the rotation speed signal of the carrier system collected by the bus processing module are received by the data recording module;
[0012] generating a control instruction according to a vibration state signal, wherein the vibration state signal at least includes the acceleration signal and the rotation speed signal, and the control instruction is used to instruct the carrier system to output an opposite force;
[0013] The control instruction and the intermediate data generated by generating the control instruction are sent to the data recording module, so that the data recording module stores the intermediate data and forwards the control instruction to the carrier system via the bus processing module.
[0014] According to the technical solution provided in the embodiment of the present application, the method further includes:
[0015] The bus processing module collects the acceleration signal and the speed signal of the carrier system and collects the discrete quantity signal of the carrier system at the same time. Accordingly, the generating of the control instruction according to the vibration state signal includes:
[0016] The control instruction is generated according to the discrete quantity signal, the acceleration signal and the rotation speed signal.
[0017] A third aspect of the present embodiment provides a vibration control system based on a multi-core heterogeneous architecture, comprising a bus processing module, a core computing module and a data processing module, wherein the data recording module is electrically connected to the bus processing module and the core computing module, and the bus processing module is also electrically connected to a carrier system;
[0018] The core computing module is used to generate a control instruction according to a vibration state signal, wherein the vibration state signal includes an acceleration signal and a rotation speed signal of the carrier system, and the control instruction is used to instruct the carrier system to output an opposite force;
[0019] The bus processing module is used to obtain the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than the preset collection period, then collect the acceleration signal and the rotation speed signal of the carrier system at the current moment;
[0020] The data recording module is used to send the acceleration signal and the rotational speed signal to the core computing module, and is also used to receive the control instruction and generate intermediate data generated by the control instruction, store the intermediate data, and forward the control instruction to the carrier system via the bus processing module.
[0021] According to the technical solution provided in the embodiment of the present application, the core computing module is formed in the FT-2000 / 4 processor, the bus processing module and the data recording module are formed in the FMQL45T900 programmable fusion chip, the bus processing module is formed at the PL end of the programmable fusion chip, and the data recording module is formed at the PS end of the programmable fusion chip.
[0022] According to the technical solution provided in the embodiment of the present application, it is characterized in that the core computing module includes:
[0023] A multi-core processor, wherein the multi-core processor is used to generate the control instruction according to the vibration state signal;
[0024] A first high-speed interface communication unit, wherein the first high-speed interface communication unit is electrically connected to the data recording module and is used to realize communication between the core computing module and the data recording module.
[0025] According to the technical solution provided in the embodiment of the present application, the core computing module further includes:
[0026] A discrete quantity acquisition unit, which is electrically connected to the carrier system and is used to acquire discrete quantity signals of the carrier system so that the multi-core processor generates the control instruction according to the discrete quantity signal, the acceleration signal and the speed signal.
[0027] According to the technical solution provided in the embodiment of the present application, the bus processing module includes:
[0028] An external bus interface unit, the external bus interface unit is used to feed back the working status of the vibration control system to the outside;
[0029] An acceleration signal acquisition unit, the acceleration signal acquisition unit is electrically connected to the acceleration sensor on the carrier system, and is used to acquire the acceleration signal;
[0030] A speed signal acquisition unit, the speed signal acquisition unit is electrically connected to the speed sensor on the carrier system and is used to acquire the speed signal;
[0031] A field bus interface unit, the field bus interface unit is electrically connected to the carrier system and is used to output the control instruction;
[0032] The first internal bus interface unit is electrically connected to the data recording module and is used to realize communication between the bus processing module and the data recording module.
[0033] According to the technical solution provided in the embodiment of the present application, the acceleration signal acquisition unit includes an acceleration signal processing subunit and an acceleration signal acquisition subunit, the acceleration signal processing subunit includes a high-pass filter, a proportional amplifier and a low-pass filter, and the acceleration signal acquisition subunit includes an acceleration signal AD acquisition subunit and a first FPGA logic processing subunit;
[0034] The speed signal acquisition unit includes a speed signal processing subunit and a speed signal acquisition subunit. The speed signal processing subunit includes a limiter, a signal driver and a hysteresis comparator. The speed signal acquisition subunit includes a speed signal AD acquisition subunit and a second FPGA logic processing subunit.
[0035] Compared with the prior art, the beneficial effects of the present application are: through the setting of a multi-core heterogeneous architecture, multiple modules are divided according to functions, the functional boundaries of each module in the system are logically clarified, the functions of each module are decoupled, and each module efficiently completes the relevant tasks of vibration control in parallel, avoiding the situation where a module is occupied by one of the tasks at different stages of vibration control. The real-time and effectiveness of the system operation are greatly improved, while the integration of the vibration control system is improved, and the vibration control efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:
[0037] Figure 1 A flowchart of the steps of the vibration control method based on a multi-core heterogeneous architecture provided in Example 1;
[0038] Figure 2 A flowchart of the steps of the vibration control method based on a multi-core heterogeneous architecture provided in Example 2;
[0039] Figure 3 A schematic diagram of the structure of a vibration control system based on a multi-core heterogeneous architecture provided in Example 3;
[0040] Figure 4 This is the flow chart of the acquisition of acceleration signals;
[0041] Figure 5 This is the flow chart of the speed signal acquisition.
[0042] Figure numbers: 100, bus processing module; 110, external bus interface unit; 120, acceleration signal acquisition unit; 121, acceleration signal processing subunit; 122, acceleration signal acquisition subunit; 130, speed signal acquisition unit; 131, speed signal processing subunit; 132, speed signal acquisition subunit; 140, field bus interface unit; 150, first internal bus interface unit; 160, secondary power conversion unit; 200, core computing module; 210, discrete quantity acquisition unit; 220, multi-core processor; 230, first high-speed interface communication unit; 240, storage unit; 250, power supply monitoring unit; 260, Ethernet interface unit; 300, data recording module; 310, second high-speed interface communication unit; 320, second internal bus interface unit; 330, recording unit. DETAILED DESCRIPTION
[0043] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.
[0044] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0045] Example 1
[0046] Please refer to Figure 1 This embodiment provides a vibration control method based on a multi-core heterogeneous architecture, the method comprising:
[0047] S11, acquiring the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than a preset collection period, collecting the acceleration signal and the rotation speed signal of the carrier system at the current moment;
[0048] S12. Send the acceleration signal and the rotational speed signal to the core computing module 200 through the data recording module 300, so that the core computing module 200 generates a control instruction according to the vibration state signal, wherein the vibration state signal at least includes the acceleration signal and the rotational speed signal, and the control instruction is used to control the carrier system to output an opposite force.
[0049] The method execution subject provided in this embodiment is a bus processing unit 100, which is electrically connected to the carrier system and electrically connected to the core computing module 200 through the data recording module 300. The bus processing unit 100 is used to collect the acceleration signal and the speed signal of the carrier system, and implement the vibration control of the carrier system by executing the above steps S11-S12. Specifically, the bus processing module 100 collects the acceleration signal and the speed signal of the carrier system at the current moment once every collection cycle, and after the collection, sends the acceleration signal and the speed signal to the core computing module 200 through the data recording module, and the core computing module 200 calculates the acceleration signal and the speed signal at the current moment, and then generates a control instruction corresponding to the current collection cycle, and the control instruction is used to control the carrier system to output the opposite force, overcome the system vibration caused by the acceleration fluctuation and the speed fluctuation, and reduce the vibration of the carrier system by the force offsetting each other.
[0050] Furthermore, the method further comprises:
[0051] Receive the control instruction forwarded by the core computing module 200 through the data recording module 300, and forward the control instruction to the carrier system.
[0052] Specifically, after the core computing module 200 calculates and generates the control instruction, the core computing module 200 sends the control instruction to the data recording module 300, which is forwarded to the bus processing module 100 by the data recording module 300, and finally the bus processing module 100 forwards the control instruction to the carrier system. The process of the bus processing module 100 collecting the acceleration signal and the speed signal is processed in parallel with the process of forwarding the control instruction, and they do not affect each other. It should be noted that the acquisition cycle is only used to instruct the bus processing module 100 to perform sampling, and does not have a direct indication effect on the calculation of the core computing module 200. The control instruction calculated by the core computing module 200 may be generated within the acquisition cycle, or it may be generated in the next acquisition cycle.
[0053] Specifically, the above steps S21-S22 are executed in a loop.
[0054] The method provided in this embodiment can enable the bus processing module 100 to collect the acceleration signal and the speed signal of the next acquisition cycle while the core computing module 200 calculates the acceleration signal and the speed signal of the previous acquisition cycle, and can also forward the control instruction. Each module works independently and executes different tasks in parallel, thus avoiding the problem of task preemption and improving the real-time and effectiveness of the control process.
[0055] Example 2
[0056] Please refer to Figure 2 This embodiment provides a vibration control method based on a multi-core heterogeneous architecture, the method comprising:
[0057] S21, receiving the acceleration signal and the speed signal of the carrier system collected by the bus processing module 100 through the data recording module 300;
[0058] S22, generating a control instruction according to the vibration state signal, wherein the vibration state signal at least includes the acceleration signal and the rotation speed signal, and the control instruction is used to instruct the carrier system to output an opposite force;
[0059] S23, sending the control instruction and the intermediate data generated by generating the control instruction to the data recording module 300, so that the data recording module 300 stores the intermediate data and forwards the control instruction to the carrier system via the bus processing module 100.
[0060] The method execution subject provided in this embodiment is a core computing module 200, and the core computing module 200 is electrically connected to the bus processing module 100 through the data recording module 300. Specifically, the bus processing module 100 collects the acceleration signal and the speed signal of the carrier system, and forwards the acceleration signal and the speed signal to the core computing module 200 through the data recording module 300, and the data recording module 300 records and stores the forwarded acceleration signal and the speed signal. After receiving the acceleration signal and the speed signal, the core computing module 200 calculates and generates a control instruction according to the acceleration signal and the speed signal, and obtains intermediate data of the calculation process. The core computing module 200 sends the obtained control instruction and the intermediate data to the data recording module 300, and the data recording module 300 records and stores the intermediate data, in order to record the working status of the core computing module 200. At the same time, the data recording module 300 sends the control instruction to the bus processing module 100, and the bus processing module 100 sends the control instruction to the carrier system after receiving the control instruction.
[0061] The bus processing module 100, the core computing module 200 and the data recording module 300 process different tasks in parallel without affecting each other, thereby improving control efficiency.
[0062] Furthermore, the method further comprises:
[0063] The bus processing module 100 collects the acceleration signal and the speed signal of the carrier system and collects the discrete quantity signal of the carrier system. Accordingly, the generating of the control instruction according to the vibration state signal includes:
[0064] The control instruction is generated according to the discrete quantity signal, the acceleration signal and the rotation speed signal.
[0065] Specifically, the core computing module 200 is also electrically connected to the carrier system, and is used to collect discrete quantity signals of the carrier system. The discrete quantity signals are collected as part of the vibration state signals while collecting the acceleration signal and the speed signal. The core computing module 200 can also generate the control instructions according to the discrete quantity signals, the acceleration signal and the speed signal. The control instructions generated can also control the discrete quantity modules of the carrier system, and the discrete quantity modules include switches, indicator lights and other modules that can generate discrete quantity signals.
[0066] Example 3
[0067] Please refer to Figure 3 This embodiment provides a vibration control system based on a multi-core heterogeneous architecture, including a bus processing module 100, a core computing module 200 and a data processing module 300, wherein the data recording module 300 is electrically connected to the bus processing module 100 and the core computing module 200, and the bus processing module 100 is also electrically connected to a carrier system;
[0068] The core computing module 200 is used to generate a control instruction according to a vibration state signal, wherein the vibration state signal at least includes an acceleration signal and a rotation speed signal of the carrier system, and the control instruction is used to instruct the carrier system to output an opposite force;
[0069] The bus processing module 100 is used to obtain the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than a preset collection period, then the acceleration signal and the rotation speed signal of the carrier system at the current moment are collected;
[0070] The data recording module 300 is used to send the acceleration signal and the rotational speed signal to the core computing module 200, and is also used to receive the control instruction and generate intermediate data generated by the control instruction, store the intermediate data, and forward the control instruction to the carrier system via the bus processing module 100.
[0071] Specifically, the system provided in this embodiment is composed of the bus processing module 100, the core computing module 200 and the data recording module 300 to form a multi-core heterogeneous architecture. The three modules are interconnected and perform different tasks respectively without affecting each other. In particular, the bus processing module 100 can perform the next acquisition after the acquisition period after completing an acquisition task, without waiting for the core computing module 200 to complete the calculation of the vibration state signal acquired last time, thereby avoiding the problem of reduced control efficiency caused by task occupancy.
[0072] Furthermore, the core computing module 200 is formed in the FT-2000 / 4 processor, the bus processing module 100 and the data recording module 300 are formed in the FMQL45T900 programmable fusion chip, the bus processing module 100 is formed at the PL end of the programmable fusion chip, and the data recording module 300 is formed at the PS end of the programmable fusion chip.
[0073] Specifically, the vibration control system provided in this embodiment is composed of two chips, and three modules are formed on the two chips, wherein the core computing module 200 selects the high-performance quad-core processor FT-2000 / 4, and the bus processing module 100 and the data recording module 300 select the programmable fusion chip FMQL45T900. The programmable fusion chip FMQL45T900 is selected in consideration of the fact that the data recording module 300 and the bus processing module 100 are functionally independent but interrelated, so the PS end of the programmable fusion chip FMQL45T900 is used as the data recording module 300, and the PL end of the programmable fusion chip FMQL45T900 is used as the bus processing module 100.
[0074] Furthermore, the core computing module 200 includes:
[0075] A multi-core processor 220, wherein the multi-core processor 220 is used to generate a control instruction according to the vibration state signal;
[0076] The first high-speed interface communication unit 230 is electrically connected to the data recording module 300 and is used to realize communication between the core computing module 200 and the data recording module 300.
[0077] The multi-core processor 220 is responsible for running the upper layer application software of the vibration control system, which is mainly used for data calculation, specifically including: obtaining the vibration state signal of the carrier system according to the acceleration signal and the speed signal, and judging the vibration state of the carrier system according to the vibration state signal, and then generating the control instruction according to the calculation of the vibration state signal. The first high-speed interface communication unit 230 is a PCIE bus interface, which is used to realize the communication between the core computing module 200 and the data recording module 300.
[0078] Furthermore, the core computing module 200 further includes:
[0079] The discrete quantity acquisition unit 210 is electrically connected to the carrier system and is used to acquire discrete quantity signals of the carrier system so that the multi-core processor 220 generates the control instruction according to the discrete quantity signal, the acceleration signal and the speed signal.
[0080] Specifically, the discrete quantity acquisition unit 210 is connected to the modules on the carrier system that can output discrete quantity signals, such as switches and indicator lights. The functions of the discrete quantity acquisition unit 210 include discrete quantity acquisition, discrete quantity output and CPLD logic control.
[0081] Furthermore, the bus processing module 100 includes:
[0082] An external bus interface unit 110, the external bus interface unit 110 is used to feed back the working status of the vibration control system to the outside;
[0083] An acceleration signal acquisition unit 120, the acceleration signal acquisition unit 120 is electrically connected to the acceleration sensor on the carrier system, and is used to acquire the acceleration signal;
[0084] A speed signal acquisition unit 130, the speed signal acquisition unit 130 is electrically connected to the speed sensor on the carrier system and is used to acquire the speed signal;
[0085] A field bus interface unit 140, the field bus interface unit 140 is electrically connected to the carrier system and is used to output the control instruction;
[0086] The first internal bus interface unit 150 is electrically connected to the data recording module 300 and is used to implement communication between the bus processing module 100 and the data recording module 300.
[0087] Specifically, the external bus interface unit 110 is used to connect to an external monitoring device, and is used to output the working status of the vibration control system to the external monitoring device, so as to facilitate the operator to monitor the vibration control system. The acceleration signal acquisition unit 120 acquires the acceleration signal through the acceleration sensor, and the acceleration signal acquisition unit 120 is also used to process the acquired acceleration signal. The speed signal acquisition unit 130 acquires the speed signal through the speed sensor, and the speed signal acquisition unit 130 is also used to process the acquired speed signal. The field bus interface unit 140 is used for the central processing module 100 to output signals to the outside, and in this application it is mainly used to output the control instructions. The first internal bus interface unit 150 is an AXI_HP bus port, which is used for internal communication with the data recording module 300.
[0088] Furthermore, the data recording module 300 includes:
[0089] A second high-speed interface communication unit 310, wherein the second high-speed interface communication unit 310 is electrically connected to the first high-speed interface communication unit 230 and communicates via PCIE;
[0090] A second internal bus interface unit 320, the second internal bus interface unit 320 is electrically connected to the first internal central interface unit and communicates via internal AXI_HP;
[0091] The recording unit 330 is used to record and store the acceleration signal, the rotation speed signal and the intermediate data generated by the core computing module 200 when generating the control instruction.
[0092] Specifically, the second high-speed interface communication unit 310 is a PCIE bus interface, which is used to communicate with the first high-speed interface communication unit 230. The second internal bus interface unit 320 is an AXI_HP bus port, which is used to communicate with the first internal bus interface unit 150. The recording unit 330 includes a large-capacity storage chip, which is used to implement data EMMC storage.
[0093] Furthermore, the core computing module 200 further includes:
[0094] A storage unit 240, the storage unit 240 is used to store program data of the multi-core processor 220;
[0095] The power supply monitoring unit 250 is used to detect the internal voltage of the high-performance quad-core processor and the programmable fusion chip.
[0096] Specifically, the storage unit 240 is responsible for storing the program data of the multi-core processor 220, so as to reduce the memory usage of the multi-core processor 220. 2 The C bus monitors the internal voltage of the high-performance quad-core processor and the programmable fusion chip. In addition, the core computing module 200 also includes an Ethernet interface unit 260, which is used to modify parameter configuration and upgrade software of the core computing module 200.
[0097] Further, the acceleration signal acquisition unit 120 includes an acceleration signal processing subunit 121 and an acceleration signal acquisition subunit 122, the acceleration signal processing subunit 121 includes a high-pass filter, a proportional amplifier and a low-pass filter, and the acceleration signal acquisition subunit 122 includes an acceleration signal AD acquisition subunit and a first FPGA logic processing subunit;
[0098] The speed signal acquisition unit 130 includes a speed signal processing subunit 131 and a speed signal acquisition subunit 132. The speed signal processing subunit 131 includes a limiter, a signal driver and a hysteresis comparator. The speed signal acquisition subunit 132 includes a speed signal AD acquisition subunit and a second FPGA logic processing subunit.
[0099] Specifically, refer to Figure 4 The processing process of the acceleration signal acquisition unit 120 is as follows: the original acceleration signal generated by the acceleration sensor is sequentially filtered through a high-pass filter, amplified through a proportional amplifier, and filtered out unnecessary high-frequency signals through a low-pass filter, and then forms a digital signal through an acceleration signal AD acquisition subunit, and then logically processed through the first FPGA logic processing subunit to obtain the acceleration signal, and finally sent to the multi-core processor 220 through the first internal bus interface unit 150.
[0100] Specifically, refer to Figure 5 The processing process of the speed signal acquisition unit 130 is as follows: the original speed signal generated by the speed sensor is sequentially limited by the limiter, driven by the signal driver, and shaped by the hysteresis comparator, and then forms a digital signal through the speed signal AD acquisition subunit, and then the second PGA logic processing subunit performs logic processing to obtain the speed signal, and finally sends it to the multi-core processor 220 through the first first internal bus interface unit 150.
[0101] Furthermore, the bus processing module 100 also includes a secondary power conversion unit 160, which is electrically connected to an external power supply and is used to convert the voltage of the external power supply input to a voltage that meets the high-performance quad-core processor and the programmable fusion chip.
[0102] Furthermore, the external bus interface unit 110 includes an RS422 bus protocol chip and an RS422 bus interface chip; and the field bus interface unit 140 includes a CAN bus protocol chip and a CAN bus interface chip.
[0103] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.
Claims
1. A vibration control method based on a multi-core heterogeneous architecture, characterized in that: The method comprises: Acquire the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than a preset collection period, collect the acceleration signal and the rotation speed signal of the carrier system at the current moment; The acceleration signal and the rotation speed signal are sent to a core computing module (200) via a data recording module (300), so that the core computing module (200) generates a control instruction according to the vibration state signal, wherein the vibration state signal at least includes the acceleration signal and the rotation speed signal, and the control instruction is used to control the carrier system to output an opposite force.
2. The vibration control method based on multi-core heterogeneous architecture according to claim 1, characterized in that: The method further comprises: The control instruction forwarded by the core computing module (200) through the data recording module (300) is received, and the control instruction is forwarded to the carrier system.
3. A vibration control method based on a multi-core heterogeneous architecture, characterized in that: The method comprises: Receiving the acceleration signal and the rotation speed signal of the carrier system collected by the bus processing module (100) through the data recording module (300); generating a control instruction according to a vibration state signal, wherein the vibration state signal at least includes the acceleration signal and the rotation speed signal, and the control instruction is used to instruct the carrier system to output an opposite force; The control instruction and the intermediate data generated by generating the control instruction are sent to the data recording module (300), so that the data recording module (300) stores the intermediate data and forwards the control instruction to the carrier system via the bus processing module (100).
4. The vibration control method based on multi-core heterogeneous architecture according to claim 3, characterized in that: The method further comprises: The bus processing module (100) collects the acceleration signal and the rotation speed signal of the carrier system and collects the discrete quantity signal of the carrier system. Accordingly, the generating of the control instruction according to the vibration state signal comprises: The control instruction is generated according to the discrete quantity signal, the acceleration signal and the rotation speed signal.
5. A vibration control system based on a multi-core heterogeneous architecture, characterized in that: The system comprises a bus processing module (100), a core computing module (200) and a data processing module (300), wherein the data recording module (300) is electrically connected to the bus processing module (100) and the core computing module (200), and the bus processing module (100) is also electrically connected to a carrier system; The core computing module (200) is used to generate a control instruction according to a vibration state signal, wherein the vibration state signal at least includes an acceleration signal and a rotation speed signal of the carrier system, and the control instruction is used to instruct the carrier system to output an opposite force; The bus processing module (100) is used to obtain the current moment, and if it is determined that the time interval between the current moment and the moment when the acceleration signal and the rotation speed signal of the carrier system were collected last time is greater than a preset collection period, then collect the acceleration signal and the rotation speed signal of the carrier system at the current moment; The data recording module (300) is used to send the acceleration signal and the rotation speed signal to the core computing module (200), and is also used to receive the control instruction and generate intermediate data generated by the control instruction, store the intermediate data, and forward the control instruction to the carrier system via the bus processing module (100).
6. The vibration control system based on multi-core heterogeneous architecture according to claim 5, characterized in that: The core computing module (200) is formed in an FT-2000 / 4 processor, the bus processing module (100) and the data recording module (300) are formed in an FMQL45T900 programmable fusion chip, the bus processing module (100) is formed in a PL end of the programmable fusion chip, and the data recording module (300) is formed in a PS end of the programmable fusion chip.
7. The vibration control system based on multi-core heterogeneous architecture according to claim 5, characterized in that: The core computing module (200) comprises: A multi-core processor (220), the multi-core processor (220) being used to generate a control instruction according to the vibration state signal; A first high-speed interface communication unit (230), the first high-speed interface communication unit (230) is electrically connected to the data recording module (300), and is used to realize communication between the core computing module (200) and the data recording module (300).
8. The vibration control system based on multi-core heterogeneous architecture according to claim 7, characterized in that: The core computing module (200) further comprises: A discrete quantity acquisition unit (210), the discrete quantity acquisition unit (210) being electrically connected to the carrier system and used for acquiring discrete quantity signals of the carrier system, so that the multi-core processor (220) generates the control instruction according to the discrete quantity signals, the acceleration signal and the rotation speed signal.
9. The vibration control system based on multi-core heterogeneous architecture according to claim 5, characterized in that: The bus processing module (100) comprises: An external bus interface unit (110), the external bus interface unit (110) being used to feed back the working state of the vibration control system to the outside; An acceleration signal acquisition unit (120), the acceleration signal acquisition unit (120) being electrically connected to the acceleration sensor on the carrier system and used for acquiring the acceleration signal; A rotation speed signal acquisition unit (130), the rotation speed signal acquisition unit (130) being electrically connected to a rotation speed sensor on the carrier system and being used to acquire the rotation speed signal; A field bus interface unit (140), the field bus interface unit (140) being electrically connected to the carrier system and used for outputting the control instruction; A first internal bus interface unit (150), the first internal bus interface unit (150) is electrically connected to the data recording module (300) and is used to realize communication between the bus processing module (100) and the data recording module (300).
10. The vibration control system based on multi-core heterogeneous architecture according to claim 9, characterized in that: The acceleration signal acquisition unit (120) comprises an acceleration signal processing subunit (121) and an acceleration signal acquisition subunit (122); the acceleration signal processing subunit (121) comprises a high-pass filter, a proportional amplifier and a low-pass filter; the acceleration signal acquisition subunit (122) comprises an acceleration signal AD acquisition subunit and a first FPGA logic processing subunit; The speed signal acquisition unit (130) comprises a speed signal processing subunit (131) and a speed signal acquisition subunit (132); the speed signal processing subunit (131) comprises a limiter, a signal driver and a hysteresis comparator; the speed signal acquisition subunit (132) comprises a speed signal AD acquisition subunit and a second FPGA logic processing subunit.
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