Trench etching method

Abstract

The invention provides a trench etching method, which comprises the following steps: when a deep trench is etched by adopting a BOSCH etching process, in a first etching treatment stage, simultaneously introducing an etching gas SF6 and a passivation gas C4F8, taking the SF6 as the etching gas, enabling the C4F8 to react with an epitaxial layer and form an nCF2 polymer passivation film for protecting the surface of the epitaxial layer / trench, enabling the SF6 to react with the nCF2 polymer passivation film firstly and then react with the epitaxial layer, and enabling the epitaxial layer to form a passivation film for protecting the surface of the trench; therefore, the plasma participating in the etching reaction of the epitaxial layer is reduced, the purpose of etching the epitaxial layer while protecting the epitaxial layer is achieved, the generation of reactants and reaction byproducts in unit time is reduced, the etching rate of the edge area of the wafer is reduced, the etching rate difference between the middle area and the edge area of the wafer is reduced, and the yield of the wafer is improved. Therefore, the groove etching depth difference between the middle area and the edge area of the wafer is reduced, the subsequent groove filling is ensured to be smoothly carried out, and the electrical property result of the device is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a trench etching method. Background Art

[0002] In order to meet the market demands of inverters / photovoltaic / power supplies, it is necessary to develop super junction products with higher voltage resistance. As the voltage resistance increases, the trench depth of the trench gate structure of the super junction product has increased from 60μm to 100μm, and the trench aspect ratio has increased from 12 to 20, which increases the difficulty of etching.

[0003] When etching a 100μm deep trench, if the traditional etching process with an etching depth of 60μm is continued to be used, it is difficult to avoid the problem of insufficient trench sidewall protection and easy side digging due to the long etching time and insufficient blocking of the hard mask layer, making it difficult to achieve the ideal trench morphology. Therefore, the industry usually considers using the Bosch etching process to etch to form a 100μm deep trench.

[0004] However, when etching is performed using the traditional Bosch etching process, since the etching equipment extracts air from the edge of the wafer, the residence time of the polymer at the edge of the wafer is short. During etching, the etching rate in the edge area of ​​the wafer is greater than the etching rate in the middle area of ​​the wafer, resulting in the thickness of the epitaxial layer etched away in the edge area of ​​the wafer being greater than the thickness of the epitaxial layer etched away in the middle area of ​​the wafer, resulting in a difference in etching depth between the middle area of ​​the wafer and the edge area. Due to the deep etching depth, the difference in the final etching depth between the middle area of ​​the wafer and the edge area of ​​the wafer is greater than 10μm, affecting the subsequent trench filling and the electrical properties of the device. Summary of the invention

[0005] The present application provides a groove etching method, which can solve the problem that when etching deep grooves using the traditional Bosch etching process, there is a large difference in etching depth between the middle area and the edge area of ​​the wafer, which affects the subsequent trench filling and the electrical properties of the device.

[0006] The embodiment of the present application provides a trench etching method, comprising:

[0007] Providing a substrate, on which an epitaxial layer and a hard mask layer are formed;

[0008] etching the hard mask layer to form an opening in the hard mask layer;

[0009] According to the opening, a BOSCH etching process is used to etch a partial thickness of the epitaxial layer to form a groove in the epitaxial layer, wherein the BOSCH etching process is a cyclic process of a first etching treatment-passivation treatment-second etching treatment, and in the stage of the first etching treatment, the gases involved in the etching treatment include: SF6 and C4F8.

[0010] Optionally, in the trench etching method, the step of etching a portion of the epitaxial layer by a BOSCH etching process according to the opening to form a trench in the epitaxial layer includes:

[0011] Step 1: first etching treatment: introducing SF6 and C4F8, and etching the epitaxial layer of the mth thickness by an isotropic etching process to form a trench in the epitaxial layer, and at the same time forming a first passivation layer on the sidewall and bottom wall of the trench, wherein during the first etching treatment process, the first passivation layer is continuously formed and etched away at the same time;

[0012] Step 2: Passivation treatment: C4F8 is introduced to form a second passivation layer on the sidewalls and bottom walls of the trench;

[0013] Step 3: second etching treatment: introducing SF6 to remove the second passivation layer on the bottom wall of the trench by a physical sputtering bombardment process;

[0014] Step 4: cyclically execute step 1 to step 3 at least m times until a trench of a certain depth is formed in the epitaxial layer, wherein m is an integer greater than or equal to 2.

[0015] Optionally, in the trench etching method, during the first etching process, the flow rate of SF6 is 400 sccm to 500 sccm; the flow rate of C4F8 is 50 sccm to 100 sccm.

[0016] Optionally, in the trench etching method, during the passivation treatment, the flow rate of C4F8 is 350 sccm to 400 sccm.

[0017] Optionally, in the trench etching method, during the second etching process, a flow rate of SF6 is 400 sccm to 500 sccm.

[0018] Optionally, in the groove etching method, the duration of each execution of step 1 to step 3 is 5s to 10s.

[0019] Optionally, in the trench etching method, when m≥2, in the process of executing steps 1 to 3 from the second to the mth cycle, in the first etching treatment, while etching the epitaxial layer of the mth thickness and etching the first passivation layer using an isotropic etching process, a certain thickness of the second passivation layer on the side wall of the trench is etched away.

[0020] Optionally, in the trench etching method, the thickness of the hard mask layer is at least

[0021] Optionally, in the trench etching method, the material of the hard mask layer is silicon nitride.

[0022] Optionally, in the trench etching method, the aspect ratio of the trench is at least 20:1.

[0023] The technical solution of this application has at least the following advantages:

[0024] The present application etches deep grooves through a BOSCH etching process, wherein the BOSCH etching process is a cyclic process of a first etching process-a passivation process-a second etching process. When the deep grooves are etched using the BOSCH etching process (the BOSCH etching process is a cyclic process of a first etching process-a passivation process-a second etching process), in the first etching process stage, etching gas SF6 and passivation gas C4F8 are introduced simultaneously. SF6 is used as an etching gas, and C4F8 reacts with the epitaxial layer and forms a nCF2 polymer passivation film that protects the epitaxial layer / groove surface. SF6 first reacts with the nCF2 polymer passivation film and then reacts with the epitaxial layer. , which reduces the amount of plasma involved in the epitaxial layer etching reaction, thereby achieving the purpose of etching the epitaxial layer while protecting the epitaxial layer, reducing the generation of reactants and reaction by-products per unit time, and reducing the etching rate in the wafer edge area. This compensates for the problem that the etching equipment pumps air from the wafer edge, causing the polymer in the wafer edge area to stay for a shorter time, resulting in the etching rate in the wafer edge area being faster than that in the middle area, thereby reducing the difference in etching rate between the middle area and the edge area of ​​the wafer, thereby reducing the difference in trench etching depth between the middle area and the edge area of ​​the wafer, ensuring the smooth progress of subsequent trench filling, and improving the electrical properties of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0026] Figure 1 is a flow chart of a trench etching method according to an embodiment of the present invention;

[0027] Figure 2-Figure 8 is a schematic diagram of a semiconductor structure in each process step of etching a groove according to an embodiment of the present invention;

[0028] The reference numerals are described as follows:

[0029] 10 - substrate, 20 - epitaxial layer, 30 - hard mask layer, 31 - opening, 40 - photoresist layer, 41 - trench. DETAILED DESCRIPTION

[0030] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0031] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0032] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0033] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0034] The present application provides a trench etching method, referring to Figure 1 , Figure 1 : is a flow chart of a groove etching method according to an embodiment of the present invention, wherein the groove etching method comprises:

[0035] Step S10: Reference Figure 2 , Figure 2 It is a schematic diagram of a semiconductor structure after a photoresist layer is formed on a hard mask layer according to an embodiment of the present application. A substrate 10 is provided, on which an epitaxial layer 20 and a hard mask layer 30 are formed.

[0036] In this embodiment, the material of the hard mask layer 30 is silicon nitride.

[0037] Preferably, the thickness of the hard mask layer 30 is at least

[0038] It is worth noting that the thickness of the hard mask layer 30 can be determined according to the depth of the subsequent groove, and the hard mask layer of appropriate thickness can be selected according to the etching selectivity ratio of the etching gas for etching the groove to the epitaxial layer and the hard mask layer, to ensure that the hard mask layer can play a blocking role in the subsequent trench etching process and protect the epitaxial layer under the hard mask layer from being etched.

[0039] In this embodiment, the substrate 10 is a silicon substrate, and the epitaxial layer 20 is silicon epitaxial.

[0040] Step S20: Continue to refer to Figure 2 , and references Figure 3 and Figure 4 , Figure 3 is a schematic diagram of a semiconductor structure after a groove pattern is defined on a photoresist layer according to an embodiment of the present application, Figure 4 It is a schematic diagram of the semiconductor structure after the opening is formed in an embodiment of the present application. First, a photoresist layer 40 is coated on the hard mask layer 30, and then a groove pattern is defined on the photoresist layer 40 through photolithography processes such as exposure and development. Then, the hard mask layer 30 is etched using the patterned photoresist layer 40 as a mask to form an opening 31 in the hard mask layer 30.

[0041] In this embodiment, the hard mask layer 30 is etched by a dry etching process to form an opening 31 in the hard mask layer 30 .

[0042] Step S30: Reference Figure 5-Figure 8 , Figure 5 is a schematic diagram of a semiconductor structure after the first etching process in an embodiment of the present application, Figure 6 is a schematic diagram of a semiconductor structure after passivation treatment in an embodiment of the present application, Figure 7 is a schematic diagram of a semiconductor structure after the second etching process in an embodiment of the present application, Figure 8It is a schematic diagram of the semiconductor structure after the final groove is formed in an embodiment of the present application. According to the opening 31, the BOSCH etching process is used to etch the partial thickness of the epitaxial layer 20 to form a groove 21 in the epitaxial layer 20, wherein the BOSCH etching process is a cyclic process of first etching treatment-passivation treatment-second etching treatment, and in the stage of the first etching treatment, the gases involved in the etching treatment include: SF6 and C4F8.

[0043] Preferably, according to the opening 31, the step S30 of etching a part of the thickness of the epitaxial layer 20 by using a BOSCH etching process to form a trench 21 in the epitaxial layer may specifically include:

[0044] Step 1: Reference Figure 5 , first etching treatment: introducing SF6 and C4F8, and etching the epitaxial layer 20 of a first thickness by an isotropic etching process to form a trench 21 in the epitaxial layer 20, and forming a first passivation layer on the sidewall and bottom wall of the trench 21, wherein during the first etching process, the first passivation layer is continuously formed and etched away at the same time;

[0045] Specifically, during the first etching process, the flow rate of SF6 is 400 sccm to 500 sccm; the flow rate of C4F8 is 50 sccm to 100 sccm.

[0046] In the first etching process, etching gas SF6 and passivation gas C4F8 are introduced at the same time. SF6 is used as etching gas, and C4F8 is decomposed into ionized CF X + Base and CF X - Base, CF X + Base and CF X - The base reacts with the epitaxial layer 20 to form a nCF2 polymer passivation film (i.e., the first passivation film), and the F generated by SF6 ionization - Base and S X F X The plasma first reacts with the nCF2 polymer passivation film, reducing the amount of plasma involved in the epitaxial layer etching reaction, thereby etching the epitaxial layer while protecting the epitaxial layer.

[0047] Step 2: Reference Figure 6 , passivation treatment: introducing C4F8 to form a second passivation layer 22 on the sidewalls and bottom wall of the trench 21;

[0048] Specifically, during the passivation treatment, the flow rate of C4F8 is 350 sccm to 400 sccm.

[0049] Step 3: Reference Figure 7 , second etching treatment: introducing SF6 to remove the second passivation layer 22 on the bottom wall of the trench by a physical sputtering bombardment process;

[0050] Specifically, during the second etching process, the flow rate of SF6 is 400 sccm to 500 sccm.

[0051] Preferably, in each cycle, the thickness of the second passivation layer 22 formed by deposition is

[0052] Step 4: Reference Figure 8 , step 1 to step 3 are executed repeatedly at least m times until a trench 21 of a certain depth is formed in the epitaxial layer, wherein m is an integer greater than or equal to 2.

[0053] In this embodiment, taking m=3 as an example, step 1 to step 3 are cyclically executed three times until a trench 21 with a certain depth is formed in the epitaxial layer 20 .

[0054] Wherein, the steps 1 to 3 are performed for the second time, specifically:

[0055] Step 1: First etching treatment: SF6 and C4F8 are introduced, and the epitaxial layer 20 of the second thickness at the bottom of the trench 21 is etched by an isotropic etching process, and a first passivation layer is formed on the sidewall and bottom wall of the trench 21, and the first passivation layer is continuously formed and removed by etching;

[0056] Step 2: Passivation treatment: C4F8 is introduced to form a second passivation layer 22 on the sidewalls and bottom wall of the trench 21;

[0057] Step 3: Reference Figure 7 , second etching treatment: introducing SF6 and removing the second passivation layer 22 on the bottom wall of the trench by a physical sputtering bombardment process.

[0058] Further, the steps 1 to 3 are performed for the third time, specifically:

[0059] Step 1: First etching treatment: SF6 and C4F8 are introduced, and the epitaxial layer 20 with a third thickness at the bottom of the trench 21 is etched by an isotropic etching process, and a first passivation layer is formed on the sidewall and bottom wall of the trench 21, and the first passivation layer is continuously formed and removed by etching;

[0060] Step 2: Passivation treatment: C4F8 is introduced to form a second passivation layer 22 on the sidewalls and bottom wall of the trench 21;

[0061] Step 3: Reference Figure 7, second etching treatment: introducing SF6 and removing the second passivation layer 22 on the bottom wall of the trench by a physical sputtering bombardment process.

[0062] Preferably, each execution of step 1 to step 3 lasts for 5s to 10s.

[0063] It is worth noting that when m≥2, in the process of executing steps 1 to 3 for the second to mth cycles, in the first etching treatment, while etching the epitaxial layer 20 of the mth thickness and etching the first passivation layer using an isotropic etching process, a certain thickness of the second passivation layer 22 on the side wall of the groove 21 is etched away.

[0064] Preferably, the aspect ratio of the finally formed trench 21 is at least 20:1.

[0065] Furthermore, after performing step 1 to step 3 for the third time, the second passivation layer 22 on the sidewall of the trench 21 may be removed by etching through a selective etching process, so as to finally form a trench 21 of a certain depth in the epitaxial layer 20 .

[0066] In the present application, when a deep trench is etched using a BOSCH etching process, in the first etching process, etching gas SF6 and passivation gas C4F8 are introduced simultaneously, SF6 is used as the etching gas, and C4F8 is decomposed into ionized CF in a plasma state. X + Base and CF X - Base, CF X + Base and CF X - The base reacts with the epitaxial layer to form a nCF2 polymer passivation film, and the F generated by SF6 ionization - Base and S X F X The plasma first reacts with the nCF2 polymer passivation film, so that the plasma participating in the epitaxial layer etching reaction becomes less, thereby etching the epitaxial layer while protecting the epitaxial layer, reducing the generation of reactants and reaction by-products per unit time, and reducing the etching rate of the wafer edge area. This compensates for the problem that the etching equipment pumps air from the wafer edge, causing the polymer in the wafer edge area to have a shorter residence time, resulting in the etching rate of the wafer edge area being faster than that of the middle area, thereby reducing the difference in etching rate between the middle area and the edge area of ​​the wafer, thereby reducing the difference in trench etching depth between the middle area and the edge area of ​​the wafer, ensuring the smooth progress of subsequent trench filling, and improving the electrical properties of the device.

[0067] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A trench etching method, characterized in that: include: Providing a substrate, on which an epitaxial layer and a hard mask layer are formed; etching the hard mask layer to form an opening in the hard mask layer; According to the opening, a BOSCH etching process is used to etch a partial thickness of the epitaxial layer to form a groove in the epitaxial layer, wherein the BOSCH etching process is a cyclic process of a first etching treatment-passivation treatment-second etching treatment, and in the stage of the first etching treatment, the gases involved in the etching treatment include: SF6 and C4F8.

2. The trench etching method according to claim 1, characterized in that: According to the opening, the step of etching a portion of the epitaxial layer by a BOSCH etching process to form a trench in the epitaxial layer comprises: Step 1: first etching treatment: introducing SF6 and C4F8, and etching the epitaxial layer of the mth thickness by an isotropic etching process to form a trench in the epitaxial layer, and at the same time forming a first passivation layer on the sidewall and bottom wall of the trench, wherein during the first etching treatment process, the first passivation layer is continuously formed and etched away at the same time; Step 2: Passivation treatment: C4F8 is introduced to form a second passivation layer on the sidewalls and bottom walls of the trench; Step 3: second etching treatment: introducing SF6 to remove the second passivation layer on the bottom wall of the trench by a physical sputtering bombardment process; Step 4: cyclically execute step 1 to step 3 at least m times until a trench of a certain depth is formed in the epitaxial layer, wherein m is an integer greater than or equal to 2.

3. The trench etching method according to claim 1 or 2, characterized in that: During the first etching process, the flow rate of SF6 is 400 sccm to 500 sccm; the flow rate of C4F8 is 50 sccm to 100 sccm.

4. The trench etching method according to claim 2, characterized in that: During the passivation treatment, the flow rate of C4F8 is 350 sccm to 400 sccm.

5. The trench etching method according to claim 2, characterized in that: During the second etching process, the flow rate of SF6 is 400 sccm to 500 sccm.

6. The trench etching method according to claim 2, characterized in that: Each execution of step 1 to step 3 lasts for 5s to 10s.

7. The trench etching method according to claim 2, characterized in that: When m≥2, in the process of executing steps 1 to 3 for the second to mth cycles, in the first etching treatment, while etching the epitaxial layer of the mth thickness and etching the first passivation layer using an isotropic etching process, a certain thickness of the second passivation layer on the side wall of the groove is etched away.

8. The trench etching method according to claim 1, characterized in that: The thickness of the hard mask layer is at least 9. The trench etching method according to claim 1, characterized in that: The material of the hard mask layer is silicon nitride.

10. The trench etching method according to claim 1, characterized in that: The aspect ratio of the trench is at least 20:1.

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