Low-warping-degree ceramic circuit board and processing method thereof

Abstract

The invention discloses a low-warping-degree ceramic circuit board, which comprises a plurality of groups of heat dissipation layers, ceramic layers and circuit layers, the heat dissipation layers, the ceramic layers and the circuit layers are fixedly connected from bottom to top to form a group of circuit board bodies, the heat dissipation layers, the ceramic layers and the circuit layers are arc-shaped, and the plurality of groups of circuit board bodies are sequentially superposed. The circuit layer of the first group of circuit board bodies is in contact with the circuit layer of the second group of circuit board bodies, the heat dissipation layer of the second group of circuit board bodies is in contact with the heat dissipation layer of the third group of circuit board bodies, and a balancing weight is placed above the heat dissipation layer at the top of the uppermost circuit board body. According to the invention, the product is heated and pressurized in the vacuum environment to deform towards the heat dissipation layer, so that the heat dissipation layer, the ceramic layer and the circuit layer which are originally arranged in an arc shape can be recovered to be in a flat state, the warping degree can be reduced, and the circuit board after the product processing can be ensured to be flat as much as possible.

Description

Technical Field

[0001] The invention relates to the technical field of circuit board processing, and in particular to a low-warpage ceramic circuit board and a processing method thereof. Background Art

[0002] Ceramic circuit boards are the most widely used substrate materials in the field of power electronics. They have the functions of supporting chips, connecting circuits, conducting heat and dissipating heat, and withstanding voltage and insulation. Due to the difference in thermal expansion coefficient between copper and ceramics, residual stress is generated at the ceramic / metal interface during the cooling process after brazing. As the circuit pattern is processed, the difference in stress on both sides causes product warping. Excessive warping will affect the packaging of the product and increase the risk during use.

[0003] Therefore, solving the warping becomes a technical difficulty in the existing ceramic circuit board production process. For example, a Chinese patent (publication number CN112652541B) proposes a method for improving the warping of an AMB substrate, by designing a groove on the non-graphic surface of the AMB substrate to release its thermal stress, so as to balance the stress on the graphic surface and reduce the degree of warping (depression) of the substrate toward the copper foil graphic surface. It can be seen from the above content that the above technical solution will affect the contact with the heat sink, sacrificing the heat transfer performance, and as the circuit layer of the product is etched, the circuit side stress is reduced, and the ceramic layer will shrink toward the heat dissipation layer, thereby causing warping. In addition, after the circuit layer is etched, it is necessary to apply pressure to the product in a vacuum high temperature environment to deform the product to a flat state. For this reason, we propose a low-warping ceramic circuit board and a processing method thereof. Summary of the invention

[0004] The object of the present invention is to provide a low-warpage ceramic circuit board and a processing method thereof, so as to solve the problems that need to be solved in the background technology.

[0005] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a low-warpage ceramic circuit board, comprising multiple groups of heat dissipation layers, ceramic layers and circuit layers, wherein the heat dissipation layers, ceramic layers and circuit layers are fixedly connected from bottom to top to form a group of circuit board bodies, wherein the heat dissipation layers, ceramic layers and circuit layers are all arranged in an arc shape, and multiple groups of circuit board bodies are stacked in sequence, wherein the circuit layer of the first group of circuit board bodies contacts the circuit layer of the second group of circuit board bodies, and the heat dissipation layer of the second group of circuit board bodies contacts the heat dissipation layer of the third group of circuit board bodies, and a counterweight is placed above the heat dissipation layer at the top of the topmost circuit board body.

[0006] In the prior art, the processing of circuit boards is carried out by etching. Such a traditional etching method will affect the contact with the heat sink and sacrifice the heat transfer performance. In addition, as the circuit layer etching is completed, the circuit side stress of the product is reduced, and the ceramic layer will shrink toward the heat dissipation layer, thereby causing warping. In addition, after the circuit layer etching is completed, it is necessary to apply pressure to the product in a vacuum and high temperature environment to deform the product to a flat state. The present invention heats and pressurizes the product in a vacuum environment to deform the product toward the heat dissipation layer, so that the heat dissipation layer, ceramic layer and circuit layer originally arranged in an arc shape can be restored to a flat state. Such an arrangement can reduce the degree of warping, thereby shrinking the circuit layer and the ceramic layer toward the heat dissipation layer. Such an arrangement can ensure that the circuit board after the product processing is completed is as flat as possible and reduce the overall warping; the non-pattern surface of the circuit board manufactured by the present method is flat and has no grooves, and has good thermal conductivity; and the upper layer manufacturing of the circuit board of the present invention is carried out in a vacuum environment, the product will not be oxidized, and no surface treatment is required, which improves the production efficiency of the product to a certain extent.

[0007] Preferably, the metal grain size of the circuit layer is smaller than that of the heat dissipation layer, and the metal expansion coefficient of the circuit layer is smaller than that of the heat dissipation layer.

[0008] Preferably, the weight of the counterweight is 3 kg.

[0009] Preferably, the heat dissipation layer, the ceramic layer and the circuit layer are fixedly connected by active metal brazing or eutectic welding.

[0010] Preferably, the method for processing a low-warpage ceramic circuit board comprises the following steps:

[0011] Step 1: Use active metal brazing or eutectic welding to fix the heat dissipation layer, the ceramic layer and the circuit layer to form a set of circuit board bodies;

[0012] Step 2: Place the heat dissipation layer of the first group of circuit board bodies on the workbench, place the circuit layer of the second group of circuit board bodies on top of the circuit layer of the first group of circuit board bodies, and place the heat dissipation layer of the third group of circuit board bodies on top of the heat dissipation layer of the second group of circuit board bodies. Stack the circuit board bodies in sequence up to 20 layers according to the above placement method;

[0013] Step 3: Place the counterweight on the heat dissipation layer of the topmost circuit board body, then evacuate the processing environment and heat it. After heating, cool it to room temperature to obtain a low warpage ceramic circuit board.

[0014] Preferably, in step three, the heating temperature is 200° C. and the heating time is 20 min.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] 1. The present invention heats and pressurizes the product in a vacuum environment to deform the product toward the heat dissipation layer, so that the heat dissipation layer, ceramic layer and circuit layer originally arranged in an arc shape can be restored to a flat state. Such a setting can reduce the degree of warping, thereby shrinking the circuit layer and the ceramic layer toward the heat dissipation layer. Such a setting can ensure that the circuit board is as flat as possible after the product is processed, and reduce the overall warpage;

[0017] 2. The non-patterned surface of the circuit board manufactured by this method is flat and has no grooves, and has good thermal conductivity;

[0018] 3. Moreover, the manufacturing of the circuit board of the present invention is carried out in a vacuum environment, the product will not be oxidized, and no surface treatment is required, which improves the production efficiency of the product to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of the front view structure of the present invention before hot pressing;

[0020] Figure 2 This is a schematic diagram of the front view structure after hot pressing of the present invention;

[0021] Figure 3 It is a schematic diagram of the front view structure before etching in the prior art of the present invention;

[0022] Figure 4 It is a schematic diagram of the front view structure after etching in the prior art of the present invention.

[0023] In the figure: 1 counterweight, 2 heat dissipation layer, 3 ceramic layer, 4 circuit layer. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] Embodiment 1:

[0026] See also Figure 1-4The present invention provides a technical solution: a low-warpage ceramic circuit board, comprising multiple groups of heat dissipation layers 2, ceramic layers 3 and circuit layers 4, the heat dissipation layers 2, ceramic layers 3 and circuit layers 4 are fixedly connected from bottom to top to form a group of circuit board bodies, the heat dissipation layers 2, ceramic layers 3 and circuit layers 4 are all arranged in an arc shape, and multiple groups of circuit board bodies are stacked in sequence, the circuit layer 4 of the first group of circuit board bodies contacts the circuit layer 4 of the second group of circuit board bodies, the heat dissipation layer 2 of the second group of circuit board bodies contacts the heat dissipation layer 2 of the third group of circuit board bodies, and a counterweight 1 is placed above the heat dissipation layer 2 at the top of the topmost circuit board body.

[0027] Among them, by heating and pressurizing the product in a vacuum environment to deform the product toward the heat dissipation layer 2, the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 that were originally arranged in an arc shape can be restored to a flat state. Such a setting can reduce the degree of warping, thereby shrinking the circuit layer 4 and the ceramic layer 3 toward the heat dissipation layer 2. Such a setting can ensure that the circuit board is as flat as possible after the product processing is completed, and reduce the overall warping.

[0028] See also Figure 1 and Figure 2 The metal grain size of the circuit layer 4 is smaller than the metal grain size of the heat dissipation layer 2 , and the metal expansion coefficient of the circuit layer 4 is smaller than the metal expansion coefficient of the heat dissipation layer 2 .

[0029] Among them, there are differences in the grains and thermal expansion coefficients on both sides of the ceramic layer 3, and the metal grain size of the circuit layer 4 is smaller than the metal grain size of the heat dissipation layer 2, and the metal expansion coefficient of the circuit layer 4 is smaller than the metal expansion coefficient of the heat dissipation layer 32. Therefore, after the sintering connection is completed, the circuit board will shrink to the side of the circuit layer 4, and when the circuit layer 4 is hot-pressed, a part of the residual stress on the side of the circuit layer 4 will be released, thereby reducing the degree of warping.

[0030] See also Figure 1 , the weight of the counterweight 1 is 3kg.

[0031] Among them, the weight setting of the counterweight block 1 can apply pressure on the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4. Such a setting can facilitate reducing the warping of the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 during hot pressing.

[0032] See also Figure 1 and Figure 2 The heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 are fixedly connected by active metal brazing or eutectic welding.

[0033] Among them, the heat dissipation layer 2, ceramic layer 3 and circuit layer 4 connected by active metal brazing or eutectic welding are welded more firmly and no welding gaps will appear. The heat dissipation layer 2, ceramic layer 3 and circuit layer 4 after welding have good sealing, strong corrosion resistance and conductivity, and active metal brazing or eutectic welding can be performed at a relatively low temperature.

[0034] Embodiment 2:

[0035] A method for processing a low-warpage ceramic circuit board, the method comprising the following steps:

[0036] Step 1: Use active metal brazing or eutectic welding to fix the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 to form a set of circuit board bodies;

[0037] Step 2: Place the heat dissipation layer 2 of the first group of circuit board bodies on a workbench, place the circuit layer 4 of the second group of circuit board bodies on top of the circuit layer 4 of the first group of circuit board bodies, place the heat dissipation layer 2 of the third group of circuit board bodies on top of the heat dissipation layer 2 of the second group of circuit board bodies, and stack the circuit board bodies in sequence up to 20 layers according to the above placement method;

[0038] Step three: Place the counterweight 1 on the heat dissipation layer 2 of the topmost circuit board body, then evacuate the processing environment and heat it. After heating, cool it to room temperature to obtain a low warpage ceramic circuit board. The heating temperature in step three is 200°C and the heating time is 20 minutes.

[0039] Among them, the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 with a certain arc are stacked in sequence, and the circuit board body to which the heat dissipation layer 2, the ceramic layer 3 and the circuit layer 4 are fixedly connected can present a curved platform. Then the actual working environment is in a vacuum state, and a counterweight block with a certain weight is added to the topmost circuit board body, so that the product can be deformed toward the heat dissipation layer, so that the heat dissipation layer, ceramic layer and circuit layer originally arranged in an arc shape can be restored to a flat state, thereby reducing the degree of warping of the product.

[0040] Table 1 below is a comparison of the flatness of the circuit board product before and after hot pressing;

[0041] Before hot pressing (warpage) After hot pressing (warpage) Example 1: 0.184 0.032 Example 2: 0.176 0.02 Example three: 0.173 0.027 Example 4: 0.144 0.013 Example five: 0.181 0.025

[0042] Table 1

[0043] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A low-warpage ceramic circuit board, comprising a plurality of heat dissipation layers (2), a ceramic layer (3) and a circuit layer (4), characterized in that: The heat dissipation layer (2), the ceramic layer (3) and the circuit layer (4) are fixedly connected from bottom to top to form a group of circuit board bodies; the heat dissipation layer (2), the ceramic layer (3) and the circuit layer (4) are all arranged in an arc shape; a plurality of groups of circuit board bodies are stacked in sequence; the circuit layer (4) of the first group of circuit board bodies contacts the circuit layer (4) of the second group of circuit board bodies; the heat dissipation layer (2) of the second group of circuit board bodies contacts the heat dissipation layer (2) of the third group of circuit board bodies; and a counterweight (1) is placed above the heat dissipation layer (2) at the top of the uppermost circuit board body.

2. The low warpage ceramic circuit board according to claim 1, characterized in that: The metal grain size of the circuit layer (4) is smaller than the metal grain size of the heat dissipation layer (2), and the metal expansion coefficient of the circuit layer (4) is smaller than the metal expansion coefficient of the heat dissipation layer (2).

3. The low warpage ceramic circuit board according to claim 2, characterized in that: The weight of the counterweight (1) is 3 kg.

4. The low warpage ceramic circuit board according to claim 3, characterized in that: The heat dissipation layer (2), the ceramic layer (3) and the circuit layer (4) are fixedly connected by active metal brazing or eutectic welding.

5. A method for processing a low-warpage ceramic circuit board, applicable to a low-warpage ceramic circuit board as claimed in any one of claims 1 to 4, characterized in that: The method for processing a low-warpage ceramic circuit board comprises the following steps: Step 1: using active metal brazing or eutectic welding to fix the heat dissipation layer (2), the ceramic layer (3) and the circuit layer (4) to form a set of circuit board bodies; Step 2: placing the heat dissipation layer (2) of the first group of circuit board bodies on a workbench, placing the circuit layer (4) of the second group of circuit board bodies on top of the circuit layer (4) of the first group of circuit board bodies, placing the heat dissipation layer (2) of the third group of circuit board bodies on top of the heat dissipation layer (2) of the second group of circuit board bodies, and stacking the circuit board bodies in sequence according to the above placement method until 20 layers are placed; Step 3: Place the counterweight (1) on the heat dissipation layer (2) of the uppermost circuit board body, then evacuate the processing environment and heat it. After heating, cool it to room temperature to obtain a low warpage ceramic circuit board.

6. The method for processing a low warpage ceramic circuit board according to claim 5, characterized in that: In the step 3, the heating temperature is 200° C. and the heating time is 20 min.

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