Preparation process method for MIM capacitor dielectric layer deposition and capacitor structure

Abstract

The invention provides a deposition preparation process method for an MIM capacitor dielectric layer. The method comprises the following steps: S1, preparing a SiNx: Hy thin film by adopting PECVD (Plasma Enhanced Chemical Vapor Deposition); s2, performing high-temperature annealing treatment on the SiNx: Hy thin film prepared in the step S1; s3, TiN adhesion layers are manufactured on the two sides of the SiNx: Hy thin film subjected to high-temperature annealing treatment in the step S2; in addition, the invention also provides an MIM capacitor structure and a preparation process method thereof. The MIM capacitor structure has the beneficial effects that the stability, the breakdown voltage, the capacitance uniformity and the yield of the MIM capacitor structure can be remarkably improved.

Description

[0001] The invention relates to the field of semiconductor process technology, and in particular to the field of MIM capacitor dielectric layer deposition preparation technology. Background Art

[0002] As a major passive device, capacitors are increasingly used in integrated circuit design applications. MIM (Metal Insulator Metal) capacitors are widely used in integrated circuit technology due to their low parasitic capacitance, low contact resistance, and excellent frequency characteristics.

[0003] MIM capacitors are capacitors that use metal as the upper and lower plates and a dielectric layer in the middle. The properties of the dielectric layer directly determine the performance of the MIM capacitor. 2 In the range, SiN is often used x :H y The film serves as the intermediate dielectric layer.

[0004] However, conventional PECVD deposited SiN x :H y The film deposition rate is fast, resulting in poor uniformity, loose film, and H + The high content will easily lead to voids in the film, resulting in low breakdown voltage, thus affecting the yield and service life. Conventional MIM capacitor structures have no TiN adhesion layer and are prone to forming voids, thus affecting the subsequent dry etching yield and wafer yield. Summary of the invention

[0005] For the conventional PECVD deposited SiN in the prior art x :H y The film deposition rate is fast, resulting in poor uniformity, loose film, and H + The content is high, and voids are likely to exist in the film, resulting in a low breakdown voltage, thereby affecting the yield and service life; and the conventional MIM capacitor structure has no TiN adhesion layer, which is prone to form voids, thereby affecting a series of technical problems such as the subsequent dry etching yield and wafer yield. The present invention provides a deposition preparation process for a MIM capacitor dielectric layer and a MIM capacitor structure.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0007] On the one hand, the present invention provides a method for depositing a dielectric layer of a MIM capacitor, comprising:

[0008] S1: SiN deposition by PECVD x :H y film;

[0009] S2: SiN prepared in step S1 x :H y The film is subjected to high temperature annealing treatment;

[0010] S3: After the high temperature annealing treatment in step S2, the SiN x :H y A TiN adhesion layer is made on both sides of the film.

[0011] Furthermore, the step S1 controls the SiN deposition by adjusting the flow ratio of SiH4, NH3 and N2 gases in the PECVD deposition. x :H y The refractive index, deposition rate and compactness of the film. In step S1, the uniformity of the film thickness is adjusted by controlling the ratio of high frequency power to low frequency power in PECVD deposition.

[0012] Furthermore, in step S2, N2 and O2 are used for high temperature annealing to x :H y Thin film for H removal + deal with.

[0013] As an optimized process selection, in step S3, Ar and N2 are introduced through a Ti target, and Ti and N2 are reacted and deposited using radio frequency power to form a TiN adhesion layer.

[0014] On the other hand, the present invention also provides a MIM capacitor preparation process method, comprising:

[0015] The lower composite layer metal plate is prepared by PVD deposition;

[0016] The SiN x :H y film;

[0017] In the lower composite layer, metal plate and SiN x :H y A superior composite layer metal plate is made on the film.

[0018] In another aspect, the present invention provides a MIM capacitor structure, comprising: a lower metal plate, a dielectric layer and an upper metal plate; the dielectric layer is disposed between the lower metal plate and the upper metal plate;

[0019] The dielectric layer is prepared by the steps of the above-mentioned MIM capacitor dielectric layer deposition preparation process;

[0020] The lower metal plate is composed of titanium, aluminum and titanium nitride from bottom to top;

[0021] The upper metal plate is composed of titanium nitride, aluminum and titanium nitride in order from top to bottom.

[0022] Furthermore, the lower composite layer metal plate structure is: Ti Al and TiN adhesion layer; the upper composite layer metal plate structure is: TiN adhesion layer, Al and TiN.

[0023] Compared with the prior art, (1) the present invention adopts PECVD to deposit SiN x :H y The SiN film can be controlled by adjusting the gas flow rate (SiH4, NH3, N2) ratio x :H y The film has a low refractive index, a low deposition rate and good compactness. By adjusting the ratio of high-frequency power to low-frequency power, the film thickness uniformity is good, which significantly improves the breakdown voltage, capacitance uniformity and yield of the MIM capacitor structure. (2) The present invention uses high temperature, N2, O2 to deposit SiN x :H y The film is annealed to reduce its H + The content of SiN increases the service life of the MIM capacitor structure. (3) The present invention uses PVD to add a TiN adhesion layer to the upper and lower plates, and increases the SiN x :H y The film has good adhesion to the Al layer, reduces sputtering voids, and improves the dry etching yield and the yield of the MIM capacitor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of the process flow of the present invention;

[0025] Figure 2 It is a schematic diagram of the MIM capacitor structure of the present invention;

[0026] Figure 3 It is a schematic diagram of a specific process implementation of the MIM capacitor of the present invention. DETAILED DESCRIPTION

[0027] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further explained below with reference to specific diagrams.

[0028] The MIM capacitor is composed of a lower metal plate, an intermediate dielectric layer, and an upper metal plate. The properties of the dielectric layer directly determine the performance of the MIM capacitor. The present invention provides a preparation process for the dielectric layer, and the preparation process of the present invention is described in detail below.

[0029] 1. Process steps and process principles

[0030] The dielectric layer preparation process of the present invention includes three steps: S1: using PECVD deposition to prepare SiN x :H y S2: SiN prepared in step S1 x :H y The film is subjected to high temperature annealing treatment; S3: After the high temperature annealing treatment in step S2, the SiN x :H y A TiN adhesion layer is made on both sides of the film.

[0031] The following is a detailed description of the process details and basic process principles involved in each process step.

[0032] S1. Preparation of SiN by PECVD deposition x :H y film.

[0033] The dielectric layer is SiN prepared by plasma enhanced chemical vapor deposition (PECVD). x :H y The main deposition thickness of the film is SiN deposition by PECVD x :H y The SiN film can be controlled by adjusting the gas flow rate (SiH4, NH3, N2) ratio x :H y The refractive index, deposition rate and density of the thin film can be adjusted by controlling the ratio of high-frequency power to low-frequency power to adjust the uniformity of the film thickness.

[0034] The menu parameters of deposition are set as follows: temperature is 350~420℃, deposition time is 20.0~110.0s, pressure is 1.5~3.0Torr, SiH4 is 100~400sccm, NH3 is 1000~5000sccm, N2 is 1000~14000sccm, high frequency power (13.56M Hz) is 600~1000W, low frequency power (400~800k Hz) is 100~200W, deposition rate is The spacing distance is 500-600 mils, the refractive index can be adjusted from 1.90 to 2.10, and the film thickness is

[0035] SiN prepared by PECVD in the present invention x :H yThe advantages of the film are: 1. Good uniformity of film thickness (≤2.5%) and high density; 2. Low process temperature (350-420°C); 3. The refractive index (RI) of the prepared silicon nitride can be adjusted according to the gas source ratio, and the adjustment range is 1.90-2.10; 4. Low deposition rate: 5. Significantly improved the breakdown voltage, capacitance uniformity and yield of capacitors.

[0036] S2, the SiN prepared in step S1 x :H y The film is subjected to high temperature annealing treatment.

[0037] SiH4, NH3, N2 are used as gas raw materials and SiN is prepared by PECVD. x :H y The film contains a lot of H + (H + The H content of the film is about 20-25%, which will affect the service life of the MIM capacitor. This patent uses high temperature, N2, O2 annealing to remove H from the film. + deal with.

[0038] The high temperature annealing method uses a horizontal furnace tube, and the process conditions are 435°C, 30 minutes, and the atmosphere is N2 and O2. The specific process menu settings are shown in Table 1:

[0039] Table 1. SiN x :H y Table of process menu settings for high temperature annealing of thin films

[0040]

[0041] S3, after the high temperature annealing treatment in step S2, the SiN x :H y A TiN adhesion layer is formed on the film.

[0042] S N x :H y Direct contact between the film and the metal Al layer of the upper and lower boards will lead to poor contact and easy existence of voids. For example, a TiN adhesion layer is deposited by PVD to increase the adhesion of the upper and lower boards, which is beneficial to the subsequent dry etching and thus improves the yield. The general thickness of the TiN adhesion layer is: the lower board is The upper board is

[0043] Specifically, the PVD deposition method is: using a Ti target to introduce Ar and N2, using RF power to react and deposit Ti and N2, thereby forming a TiN adhesion layer. The process conditions for PVD deposition of the TiN adhesion layer are shown in Table 2: Table 2, TiN adhesion layer process conditions table

[0044]

[0045] MIM capacitors are composed of a lower metal plate, an intermediate dielectric layer, and an upper metal plate. The metal layer is deposited by physical vapor deposition (PVD). The intermediate dielectric layer is deposited by PECVD and is a key layer that directly determines the performance of MIM capacitors. It follows the parallel plate capacitor formula.

[0046] The PECVD of the present invention adopts an appropriate ratio of SiH4, NH3 and N2 to obtain a very low deposition rate and an adjustable RI value, so that a thinner and denser film can be prepared. By adjusting the ratio of high-frequency power to low-frequency power, a very good film thickness uniformity can be obtained. The present invention adopts high-temperature annealing to SiN x :H y Thin film for H removal + The present invention adds a TiN adhesion layer to the upper and lower plates, increases the adhesion between the dielectric layer and Al, reduces voids, and improves the yield of dry etching and the yield of the MIM structure. 2. Specific embodiments

[0048] Embodiment 1:

[0049] (I) Process conditions:

[0050] 1. PECVD deposition of SiN x :H y Film conditions.

[0051] Process conditions: temperature 400°C, deposition time 31.0s, pressure 2.2Torr, SiH4 flow 300sccm, NH3 flow 3500sccm, N2 flow 4500sccm, high frequency power (13.56MHz) 700W, low frequency power (700KHz) 150W, deposition rate Spacing distance is 550mils.

[0052] 2. High temperature annealing method adopts horizontal furnace tube, and its process conditions are 435℃, time is 30min, atmosphere is N2 plus O2. The specific process menu setting is the same as Table 1.

[0053] 3. The PVD deposition method is: using a Ti target to introduce Ar and N2, using radio frequency power to react and deposit Ti and N2, thereby forming a TiN adhesion layer. The process conditions for PVD deposition of the TiN adhesion layer are the same as those in Table 2.

[0054] (II) Film parameters:

[0055] 1. SiN x :H y Film thickness Thickness uniformity 2.21%, refractive index 1.93.

[0056] 2. The thickness of TiN metal in the lower board adhesion layer is Thickness uniformity 1.49%.

[0057] 3. The thickness of TiN metal in the upper plate adhesion layer is Thickness uniformity 1.87%.

[0058] (III) Electrical parameters: Capacitance density 2.01fF / μm 2 , capacitance density uniformity is 2.11%, breakdown voltage is 15.2V, and MIM capacitor structure yield is 99%.

[0059] Embodiment 2:

[0060] (I) Process conditions:

[0061] 1. PECVD deposition of SiN x :H y Film conditions.

[0062] Process conditions: temperature 400°C, deposition time 48.0s, pressure 2.2Torr, SiH4 flow 300sccm, NH3 flow 4500sccm, N2 flow 4500sccm, high frequency power (13.56MHz) 800W, low frequency power (700KHz) 100W, deposition rate Spacing distance is 550mils.

[0063] 2. High temperature annealing method adopts horizontal furnace tube, and its process conditions are 435℃, time is 30min, atmosphere is N2 and O2. The specific process menu setting is the same as Table 1.

[0064] 3. The PVD deposition method is: using a Ti target to introduce Ar and N2, using RF power to react and deposit Ti and N2 to form a TiN adhesion layer. The process conditions for PVD deposition of the TiN adhesion layer are the same as those in Table 1.

[0065] (II) Film parameters:

[0066] 1. SiN x :Hy Film thickness Thickness uniformity 2.31%, refractive index 1.90.

[0067] 2. The thickness of TiN metal in the lower board adhesion layer is Thickness uniformity 1.24%.

[0068] 3. The thickness of TiN metal in the upper plate adhesion layer is Thickness uniformity 1.62%.

[0069] (III) Electrical parameters: Capacitance density 1.17fF / μm 2 , capacitance density uniformity 1.05%, breakdown voltage 28V, MIM capacitor structure yield 100%.

[0070] 3. Summary of key processes

[0071] In summary, the present invention adopts three key processes to solve the technical problems raised by the present invention.

[0072] (1) In SiN x :H y In the film preparation, the present invention uses PECVD to deposit SiN x :H y The SiN film can be controlled by adjusting the gas flow rate (SiH4, NH3, N2) ratio x :H y The refractive index, deposition rate and density of the film can be controlled; on the other hand, the uniformity of the film thickness can be adjusted by controlling the ratio of high-frequency power to low-frequency power. x :H y The refractive index of the film is controllable, the thickness deposition rate is low, the uniformity is good, and the density is high, which significantly improves the breakdown voltage, capacitance uniformity and yield of the capacitor.

[0073] The deposition rate of the silicon nitride film deposited by PECVD of the present invention is extremely low The refractive index of the film can be controlled (1.90~2.10).

[0074] For example, when the RI value of silicon nitride in the present invention is 1.93, the total thickness is Its capacitance uniformity is 1.04% and its breakdown voltage is 28V. This is much higher than the capacitance uniformity of 3.79% and its breakdown voltage is 18V of ordinary PECVD. The measured data of each parameter are shown in the following table:

[0075]

[0076]

[0077] (2)SiNx :H y During the high temperature annealing of the film, the present invention uses high temperature, N2, O2 to anneal the SiN x :H y The film is annealed to reduce its H + content, thereby increasing the service life of the MIM capacitor structure.

[0078] (3) In addition, the present invention uses PVD to add a TiN adhesion layer on the upper and lower plates and an SiN x :H y The film has good adhesion to the Al layer, reduces sputtering voids, and improves the dry etching yield and the yield of the MIM capacitor structure.

[0079] The process of the present invention is described in detail above from the aspects of preparation process steps, process principles, specific embodiments and key processes.

[0080] 4. MIM capacitor structure

[0081] At the same time, it is obvious that the unique dielectric layer structure of the present invention obtained by the unique dielectric layer preparation process of the present invention introduced above also forms the unique MIM capacitor structure of the present invention, such as Figure 2 shown.

[0082] The MIM capacitor consists of a lower metal plate, an intermediate dielectric layer, and an upper metal plate.

[0083] For example, the following structure can be adopted: The lower metal plate structure is: titanium (Ti) Aluminum (Al) Titanium Nitride (TiN)

[0084] The intermediate dielectric layer is: hydrogenated silicon nitride (SiN x :H y )

[0085] The upper metal plate structure is: Titanium nitride (TiN) Aluminum (Al) Titanium Nitride (TiN) The capacitance follows the law of parallel plate capacitors. The upper and lower metal plates are formed by physical vapor deposition (PVD). In short, the dielectric layer is set between the lower composite layer metal plate and the upper composite layer metal plate to improve the stability of the MIM capacitor structure.

[0086] It should be pointed out that one of the significant differences in the structure of the intermediate dielectric layer of the present invention compared with other dielectric layers in the prior art is that upper and lower TiN adhesion layers are made. The thickness of the TiN adhesion layer in the present invention can be set as follows: the thickness of the lower plate TiN adhesion layer is The thickness of the TiN adhesion layer on the upper plate is

[0087] like Figure 3 As shown, in a specific process implementation, the above capacitor structure can be manufactured by the following process steps:

[0088] S1: preparing the lower composite layer metal plate by PVD deposition;

[0089] S2: SiN is deposited on the lower composite layer metal plate using PECVD x :H y film;

[0090] S3: The lower composite layer metal plate and SiN prepared in steps S1 and S2 are x :H y The film is subjected to high temperature annealing treatment;

[0091] S4: After the high temperature annealing treatment in step S3, the lower composite layer metal plate, SiN x :H y A superior composite layer metal plate is made on the film.

[0092] In steps S1 and S4, Ar and N2 are introduced into a Ti target, and Ti and N2 are reacted and deposited by radio frequency power, thereby forming a TiN adhesion layer.

[0093] MIM capacitors are a common method for manufacturing capacitors, but the lower and upper metal plates of MIM capacitors manufactured by various fabs (integrated circuit manufacturing plants) have different preparation methods and metal thicknesses. A reasonable upper and lower metal plate structure will bring higher MIM capacitor structural stability. The metal substrates of the present invention are all prepared by the PVD method, and the metal thickness is also different from that of other fabs. The deposition rate (deposition rate) in the present invention is ), far lower than other inventions, high temperature removal of H + , a TiN adhesion layer is added to the upper and lower metal plates, thereby achieving the advantages of good uniformity and high yield.

[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A method for depositing a dielectric layer of a MIM capacitor, It is characterized in that include: S1: SiN deposition by PECVD x :H y film; S2: SiN prepared in step S1 x :H y The film is subjected to high temperature annealing treatment; S3: After the high temperature annealing treatment in step S2, the SiN x :H y A TiN adhesion layer is made on both sides of the film.

2. A method for depositing a dielectric layer of a MIM capacitor according to claim 1, It is characterized in that The step S1 is to adjust the SiH 4 NH 3 and N 2 Gas flow ratio control SiN x :H y Refractive index, deposition rate and density of thin films.

3. A method for depositing a dielectric layer of a MIM capacitor according to claim 1 or 2, It is characterized in that In the step S1, the uniformity of the film thickness is adjusted by controlling the ratio of high-frequency power to low-frequency power in PECVD deposition.

4. A method for depositing a dielectric layer of a MIM capacitor according to claim 1 or 2, It is characterized in that In step S2, N 2 and O 2 High temperature annealing is performed to x :H y Thin film for H removal + deal with.

5. A method for depositing a dielectric layer of a MIM capacitor according to claim 1 or 2, It is characterized in that In step S3, Ar and N are introduced into the Ti target. 2 , using RF power to 2 Reactive deposition is performed to form a TiN adhesion layer.

6. A MIM capacitor preparation process, It is characterized in that include: The upper and lower composite metal plates are prepared by PVD deposition; Preparation of SiN by any method of claims 1-5 x :H y film; In the lower composite layer, metal plate and SiN x :H y A superior composite layer metal plate is made on the film.

7. A MIM capacitor structure, It is characterized in that include: A lower metal plate, a dielectric layer and an upper metal plate; The dielectric layer is arranged between the lower metal plate and the upper metal plate; The dielectric layer is prepared by any method of claims 1-5; The lower metal plate is composed of titanium, aluminum and titanium nitride from bottom to top; The upper metal plate is composed of titanium nitride, aluminum and titanium nitride in order from top to bottom.

8. A MIM capacitor structure according to claim 7, It is characterized in that The lower composite layer metal plate structure is: Ti Al and TiN adhesion layer; the upper composite layer metal plate structure is: TiN adhesion layer, Al and TiN.

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