Phase selection closing control method and system
By obtaining the historical command time difference and the target closing phase, and calculating the phase selection and closing waiting time with the delay cycle wave, the problem of reducing the phase selection and closing control accuracy caused by loop delay in the prior art is solved, and a higher control accuracy is achieved.
Patent Information
- Application Number
- CN202411212223.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2024-12-13
AI Technical Summary
In the prior art, when the phase selection and closing wait time is calculated using self-learning pre-breakdown time, the phase selection and closing control accuracy is reduced due to the introduced loop delay.
By obtaining the time difference of historical commands, calculating the waiting time for phase selection and delay cycles, dynamically identifying the waiting time, and sending the time selection and closing command based on the time difference of the electrical closing point of the circuit breaker, avoiding pre-breakdown time Use of
The accuracy of phase selection and closing control is improved, the accuracy reduction problem caused by loop delay error is solved, and the control accuracy is enhanced.
Smart Images
Figure CN119132898A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of phase selection and closing control of electric power equipment, and in particular relates to a phase selection and closing control method and system. Background Art
[0002] Phase selection and closing technology refers to controlling the circuit breaker to open and close at the specified phase of the system voltage waveform based on load characteristics, thereby eliminating electromagnetic transient effects such as overvoltage and inrush current generated by the switching process, reducing the impact of switching on and off unloaded transformers, capacitor banks, shunt reactors and unloaded lines and other power equipment on themselves and the power system, extending the life of power equipment and improving the stability of the power system. Among them, the phase selection and closing control method is generally as follows: the processor (CPU) of the phase selection and closing system receives the closing command, starts the phase selection control program, starts the phase selection control program, calculates the phase selection and closing waiting time according to the preset target closing angle, the inherent closing time and pre-breakdown time of the circuit breaker, and then starts timing from the starting reference point of the phase selection reference analog quantity (sampling voltage) (generally the first zero crossing point after receiving the closing command), reaches the phase selection and closing waiting time, and immediately issues the phase selection and closing command. Therefore, the factors affecting the accuracy of phase selection and closing mainly include the phase selection and closing waiting time and the time when the phase selection and closing command is sent.
[0003] The existing methods for improving the accuracy of phase selection and closing mainly focus on improving the waiting time, and improve the accuracy of the pre-breakdown time to improve the accuracy of the phase selection and closing waiting time. For example, the Chinese patent application with application number CN107680853A discloses a pre-breakdown time prediction method based on self-learning of circuit breaker RDDS parameters, which obtains the circuit breaker RDDS parameters based on the phase of the electrical closing point of the circuit breaker and the time difference between the electrical closing point and the main contact closing point, and obtains the RDDS characteristic parameter correction value through multiple live closing operations. On this basis, the pre-breakdown time prediction value is calculated according to the target closing phase. This method needs to obtain the closing time of the main contact. The general method for obtaining the closing time of the main contact is to connect the auxiliary contact of the circuit breaker, indirectly obtain the closing time of the main contact according to the auxiliary contact, and then return the closing time of the main contact to the phase selection and closing system through an additional circuit, which will introduce unknown circuit delays, thereby affecting the accuracy of the phase selection and closing waiting time. Summary of the invention
[0004] The object of the present invention is to provide a phase-selective closing control method and system to solve the problem that the phase-selective closing control accuracy is reduced due to the introduced loop delay when using the self-learning pre-breakdown time to calculate the phase-selective closing waiting time for closing control.
[0005] In order to solve the above technical problems, the present invention provides a phase selection closing control method, which comprises the following steps:
[0006] After receiving the phase selection closing command, the target time is determined according to the target closing phase in the phase selection closing command. The target time refers to the time corresponding to the target closing phase in one cycle.
[0007] Obtain the historical command time difference, which refers to the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker;
[0008] Add the target time and the delay cycle time, so that the added time is greater than the historical instruction time difference, so as to determine the number of delay cycles;
[0009] Determine the phase selection and closing waiting time according to the number of delayed cycles, the target time and the time difference of historical instructions, and perform phase selection and closing control according to the phase selection and closing waiting time.
[0010] Furthermore, the determined number of cycles of the delay makes the phase selection and closing waiting time greater than 0 and less than one cycle.
[0011] Furthermore, the historical instruction time difference is a historical instruction time difference obtained after screening from N historical instruction time differences, and the screening method is: obtain N historical instruction time differences, take each historical instruction time difference as the target value, calculate the mean square difference between the target value and each historical instruction time difference; select the historical instruction time difference corresponding to the target value with the minimum mean square difference value; N≥2.
[0012] Furthermore, when controlling according to the phase selection closing waiting time, the method is based on the most recent zero crossing point of the received phase selection closing instruction as the starting point, and performs phase selection closing control according to the phase selection closing waiting time.
[0013] The beneficial effects of the above technical scheme are as follows: the present invention is an improved invention creation, and the pre-breakdown time is no longer used when calculating the waiting time for phase selection and closing. Instead, the waiting time is dynamically identified by using the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker. The phase selection and closing waiting time is calculated by the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker, the target closing phase and the delay frequency. This solves the problem that when the self-learning pre-breakdown time is used to calculate the phase selection closing waiting time for closing control, the circuit delay error caused by the main contact closing point leads to a decrease in the control accuracy of the phase selection and closing, thereby improving the control accuracy of the phase selection and closing.
[0014] In order to solve the above technical problems, the present invention also provides a phase-selective closing control system, including a phase-selective closing waiting time calculation module and a phase-selective closing instruction sending module, wherein the phase-selective closing waiting time calculation module is used to determine the target time according to the target closing phase in the phase-selective closing instruction after receiving the phase-selective closing instruction, and obtain the historical instruction time difference, add the target time to the delayed cycle time, so that the added time is greater than the historical instruction time difference, so as to determine the number of delayed cycles; determine the phase-selective closing waiting time according to the number of delayed cycles, the target time and the historical instruction time difference; the phase-selective closing instruction sending module is used to send the phase-selective closing instruction to the circuit breaker according to the phase-selective closing waiting time, so as to realize the phase-selective closing control of the circuit breaker; wherein the target time refers to the time corresponding to the target closing phase on one cycle, and the instruction time difference refers to the time difference between the moment when the phase-selective closing instruction is sent to the circuit breaker and the electrical closing point of the circuit breaker.
[0015] Furthermore, the phase selection and closing waiting time calculation module is a CPU board, and the phase selection and closing instruction sending module is an IO board; after the CPU board calculates the phase selection and closing waiting time, it sends the phase selection and closing waiting time to the IO board, and the IO board sends the phase selection and closing instruction to the circuit breaker according to the phase selection and closing waiting time.
[0016] Furthermore, the system also includes a timing module, which is used to send a timestamp. After the CPU board calculates the phase selection and closing waiting time, it also calculates the time difference based on the closing waiting time, the most recent zero-crossing moment after receiving the phase selection and closing instruction, and the most recently sent timestamp, and then sends the time difference to the IO board. The IO board starts timing based on the most recently sent timestamp, and when the time difference is reached, it sends a phase selection and closing instruction.
[0017] Furthermore, the timing module is a GPS timing module, which is used to send timestamps in whole seconds. The CPU board calculates the whole second time difference based on the phase selection and closing waiting time, the most recent zero crossing moment after receiving the phase selection and closing instruction, and the most recently sent whole second moment, and then sends the whole second time difference to the IO board. The IO board is used to start timing based on the most recently sent whole second moment, and when the whole second time difference is reached, the phase selection and closing instruction is issued.
[0018] Furthermore, the whole second time difference is calculated according to the following formula:
[0019] T IO =T wait +(T0-T GPS )
[0020] Among them, T IO T is the whole second time difference sent from the CPU board to the IO board. waitis the phase selection closing waiting time, T0 is the nearest zero crossing time after receiving the phase selection closing command, T GPS The GPS integer second time that was most recently sent.
[0021] Furthermore, the historical instruction time difference is a historical instruction time difference obtained after screening from N historical instruction time differences, and the screening method is: obtain N historical instruction time differences, take each historical instruction time difference as the target value, calculate the mean square error value corresponding to each historical instruction time difference; select the historical instruction time difference corresponding to the minimum mean square error value as the target value; N≥2.
[0022] The beneficial effects of the above technical scheme are as follows: the present invention is an improved invention creation, and the pre-breakdown time is no longer used when calculating the waiting time for phase selection and closing. Instead, the waiting time is dynamically identified by using the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker. The phase selection and closing waiting time is calculated by the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker, the target closing phase and the delay frequency. This solves the problem that when the self-learning pre-breakdown time is used to calculate the phase selection closing waiting time for closing control, the circuit delay error caused by the main contact closing point leads to a decrease in the control accuracy of the phase selection and closing, thereby improving the control accuracy of the phase selection and closing. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a phase selection and closing control flow chart of a system embodiment of the present invention;
[0024] Figure 2 It is a schematic diagram of phase selection and closing control variables of a system embodiment of the present invention. DETAILED DESCRIPTION
[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the specific implementation methods of the present invention are further described below in conjunction with the accompanying drawings.
[0026] The present invention no longer involves the pre-breakdown time when calculating the phase-selection closing waiting time. Instead, the time difference between the moment when the phase-selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker is used to dynamically identify the waiting time, and the phase-selection closing waiting time is calculated in combination with the target closing phase and the delay frequency. This solves the problem that when the self-learned pre-breakdown time is used to calculate the phase-selection closing waiting time for closing control, the circuit delay error caused by the main contact closing point leads to reduced phase-selection closing control accuracy. At the same time, it also avoids the delay error caused by the closing circuit when sending the command, thereby improving the control accuracy of the phase-selection closing.
[0027] System Example
[0028] The present invention provides a phase-selective closing control system, which is applicable to the phase-selective opening and closing control of power equipment in AC stations and DC converter stations. The system includes a phase-selective closing waiting time calculation module and a phase-selective closing instruction sending module. The phase-selective closing waiting time calculation module is used to calculate the phase-selective closing waiting time, and the phase-selective closing instruction sending module is used to send a phase-selective closing instruction to the circuit breaker according to the phase-selective closing waiting time, so as to realize a phase-selective closing control method. The implementation process of the method is as follows: Figure 1 As shown, the following steps are included:
[0029] 1. After the phase selection closing control system receives the phase selection closing command sent by the upper layer, it determines the target closing time T according to the target closing phase in the phase selection closing command. target , target time refers to the time corresponding to the target closing phase in one cycle.
[0030] The time of one cycle is one power frequency cycle. For example, when the voltage frequency is 50HZ, the time of one power frequency cycle is 20ms. If the closing target phase is 90 degrees, the corresponding target time is 5ms.
[0031] 2. Get the time difference of historical instructions.
[0032] like Figure 2 As shown, the command time difference T1 refers to the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker (the moment of electrical breakdown). The present invention dynamically identifies the phase selection closing waiting time based on the command time difference.
[0033] In order to achieve more accurate control, record the time difference T1 of N historical commands corresponding to the N historical phase selection and closing commands sent (1) 、T1 (2) , …, T1 (N) , select the historical instruction time difference T1 used to calculate the phase selection and closing waiting time from the N historical instruction time differences (n) ; N≥2. The screening method is:
[0034] Take each historical instruction time difference as the target value, calculate the mean square error between each historical instruction time difference as the target value and each historical instruction time difference, and record them as M1, M2, …, M N :
[0035]
[0036] Find the minimum mean square error value M n :
[0037] M n =min(M1,M2,...,M N )
[0038] Select the historical instruction time difference T1 corresponding to the minimum mean square error value as the target value (n) , recorded as the effective instruction time difference (1≤n≤N). To reduce the computational burden, when N+1 instruction time differences are obtained, the instruction time difference corresponding to the maximum mean square error among the N historical mean square errors is replaced as the target value, and the replaced mean square errors are screened to ensure that the amount of calculation for each effective instruction time difference is the same, reducing the amount of calculation and thus improving the computational efficiency.
[0039] The closing process is a process from no current to current. The electrical closing point of the circuit breaker is the current mutation point. The current mutation point is obtained according to the current mutation formula. The current mutation formula is:
[0040]
[0041] Among them, k is the sampling number, I [k] is the current sampling point current, I [k-T] is the current at the sampling point of the previous cycle, I [k-2T] is the current at the sampling point in the first two cycles, I set is the threshold current (can be the no-current threshold), K is the coefficient of variation. When the sampling point k satisfies the above formula, the sampling point is the current mutation point, that is, the electrical closing point.
[0042] 3. Add the target time and the delay cycle time, so that the added time is greater than the historical instruction time difference, so as to determine the number of delayed cycles, and determine the phase selection and closing waiting time according to the number of delayed cycles, the target time and the historical instruction time difference, that is, the delay cycle time is greater than the difference between the target time and the instruction time difference, and is an integer multiple of 1 / 2 power frequency cycle. The formula used to determine the phase selection and closing waiting time according to the number of delayed cycles, the target time and the historical instruction time difference is:
[0043] T wait =MT+T target -T1 (n)
[0044] Among them, T wait T is the phase selection closing waiting time; target is the target time; T1 (n) is the effective instruction time difference; T is the power frequency cycle, MT is the delay cycle time, and the value is greater than T target -T1 (n) , and is an integer multiple of 1 / 2 power frequency period, that is, when the zero crossing point is from positive to negative, M takes integer multiples of 1, 2, 3, 4, etc., and when the zero crossing point is from negative to positive, M takes odd multiples of 1 / 2, such as 1 / 2, 3 / 2, 5 / 2, 7 / 2, etc.
[0045] Furthermore, in order to improve the control efficiency, the number of delayed cycles is determined so that the phase-selection closing waiting time is greater than 0 and less than one cycle; further, based on the most recent zero-crossing point after the received phase-selection closing instruction, the phase-selection closing control is performed according to the phase-selection closing waiting time, that is, the starting point of the delay cycle is the zero-crossing point, and the timing is started from the most recent zero-crossing point of the received phase-selection closing instruction, and the phase-selection closing instruction is sent to the circuit breaker when the phase-selection closing waiting time expires.
[0046] 4. Perform phase selection and closing control according to the phase selection and closing waiting time.
[0047] The phase-selection closing waiting time calculation module and the phase-selection closing instruction sending module of the phase-selection closing control system are both CPUs, that is, after the phase-selection closing waiting time is calculated in the CPU of the phase-selection closing control system, the phase-selection closing instruction is sent to the circuit breaker according to the phase-selection closing waiting time.
[0048] After the CPU calculates the phase-selection closing waiting time, the phase-selection closing instruction is not sent immediately, but the command can only be sent when the code segment for sending the phase-selection closing instruction is reached, and since the processing error of the CPU is at the millisecond level, directly performing closing control in the CPU will introduce a program discrete time error at the millisecond level, affecting the closing effect. In order to avoid the error caused by the program discrete time, the phase-selection closing waiting time calculation module of the present invention is a CPU board, and the phase-selection closing instruction sending module is an IO board (containing a chip); after the CPU board calculates the phase-selection closing waiting time, the phase-selection closing waiting time is sent to the IO board in advance, and the IO board sends the phase-selection closing instruction to the circuit breaker according to the phase-selection closing waiting time. For example, the IO board starts timing from the zero point, and when the phase-selection closing waiting time is reached, the phase-selection closing instruction is issued. Since the IO board is only used to send instructions, the program error is only at the microsecond level, so the program discrete error can be reduced and the closing control effect can be improved in this way.
[0049] In order to further improve the control accuracy of instruction sending, the phase selection and closing control system also includes a timing module, which is used to send timestamps. After the CPU board calculates the phase selection and closing waiting time, it also calculates the time difference based on the closing waiting time, the most recent zero-crossing moment after receiving the phase selection and closing instruction, and the most recently sent timestamp, and then sends the time difference to the IO board. The IO board starts timing based on the most recently sent timestamp, and when the time difference is reached, the phase selection and closing instruction is issued. In this embodiment, the timing module is a GPS timing module, and the GPS timing module is used to send timestamps in whole seconds. The CPU board calculates the whole second time difference based on the phase selection and closing waiting time, the most recent zero-crossing moment after receiving the phase selection and closing instruction, and the most recently sent whole second moment, and then sends the whole second time difference to the IO board. The IO board is used to start timing based on the most recently sent whole second moment, and when the whole second time difference is reached, the phase selection and closing instruction is issued. Specifically, the whole second time difference is calculated according to the following formula:
[0050] T IO =T wait +(T0-T GPS )
[0051] Among them, T IO T is the whole second time difference sent from the CPU board to the IO board. wait is the phase selection closing waiting time, T0 is the nearest zero crossing time after receiving the phase selection closing command, T GPS The GPS integer second time that was most recently sent.
[0052] Method Embodiment
[0053] The specific implementation process of the phase selection and closing control method of the present invention has been described in detail in the system embodiment and will not be repeated here.
Claims
1. A phase selection closing control method, characterized in that: The following steps are involved: After receiving the phase selection closing command, the target time is determined according to the target closing phase in the phase selection closing command. The target time refers to the time corresponding to the target closing phase in one cycle. Obtain the historical command time difference, which refers to the time difference between the moment when the phase selection closing command is sent to the circuit breaker and the electrical closing point of the circuit breaker; Add the target time and the delay cycle time, so that the added time is greater than the historical instruction time difference, so as to determine the number of delay cycles; Determine the phase selection and closing waiting time according to the number of delayed cycles, the target time and the time difference of historical instructions, and perform phase selection and closing control according to the phase selection and closing waiting time.
2. The phase selection closing control method according to claim 1, characterized in that: The determined number of cycles of the delay makes the phase selection and closing waiting time greater than 0 and less than one cycle.
3. The phase selection closing control method according to claim 1 or 2, characterized in that: The historical instruction time difference is a historical instruction time difference obtained by screening from N historical instruction time differences, and the screening method is: obtain N historical instruction time differences, take each historical instruction time difference as a target value, calculate the mean square error between the target value and each historical instruction time difference; select the historical instruction time difference corresponding to the target value with the minimum mean square error value; N≥2.
4. The phase selection closing control method according to claim 1, characterized in that: When the method is controlled according to the phase selection closing waiting time, it is based on the nearest zero crossing point after receiving the phase selection closing instruction as the starting point, and the phase selection closing control is performed according to the phase selection closing waiting time.
5. A phase-selective closing control system, comprising a phase-selective closing waiting time calculation module and a phase-selective closing instruction sending module, characterized in that: The phase-selection closing waiting time calculation module is used to determine the target time according to the target closing phase in the phase-selection closing instruction after receiving the phase-selection closing instruction, and obtain the historical instruction time difference, add the target time and the delay cycle time, so that the added time is greater than the historical instruction time difference, so as to determine the number of delayed cycles; determine the phase-selection closing waiting time according to the number of delayed cycles, the target time and the historical instruction time difference; the phase-selection closing instruction sending module is used to send the phase-selection closing instruction to the circuit breaker according to the phase-selection closing waiting time, so as to realize the phase-selection closing control of the circuit breaker; wherein, the target time refers to the time corresponding to the target closing phase on one cycle, and the instruction time difference refers to the time difference between the moment when the phase-selection closing instruction is sent to the circuit breaker and the electrical closing point of the circuit breaker.
6. The phase selection and closing control system according to claim 5, characterized in that: The phase selection and closing waiting time calculation module is a CPU board, and the phase selection and closing instruction sending module is an IO board; After the CPU board calculates the phase selection closing waiting time, it sends the phase selection closing waiting time to the IO board, and the IO board sends the phase selection closing instruction to the circuit breaker according to the phase selection closing waiting time.
7. The phase selection and closing control system according to claim 6, characterized in that: The system also includes a timing module, which is used to send a timestamp. After the CPU board calculates the phase selection and closing waiting time, it also calculates the time difference based on the closing waiting time, the most recent zero-crossing moment after receiving the phase selection and closing instruction, and the most recently sent timestamp, and then sends the time difference to the IO board. The IO board starts timing based on the most recently sent timestamp, and when the time difference is reached, it sends a phase selection and closing instruction.
8. The phase selection and closing control system according to claim 7, characterized in that: The timing module is a GPS timing module, which is used to send timestamps in whole seconds. The CPU board calculates the whole second time difference based on the phase selection and closing waiting time, the most recent zero crossing moment after receiving the phase selection and closing command, and the most recently sent whole second moment, and then sends the whole second time difference to the IO board. The IO board is used to start timing based on the most recently sent whole second moment, and when the whole second time difference is reached, the phase selection and closing command is issued.
9. The phase selection and closing control system according to claim 8, characterized in that: The time difference in whole seconds is calculated according to the following formula: T IO =T wait +(T0-T GPS ) Among them, T IO T is the whole second time difference sent from the CPU board to the IO board. wait is the phase selection closing waiting time, T0 is the nearest zero crossing time after receiving the phase selection closing command, T GPS The GPS integer second time that was most recently sent.
10. The phase selection closing control system according to claim 5, characterized in that: The historical instruction time difference is a historical instruction time difference obtained by screening from N historical instruction time differences, and the screening method is: obtain N historical instruction time differences, take each historical instruction time difference as the target value, calculate the mean square error value corresponding to each historical instruction time difference; select the historical instruction time difference corresponding to the minimum mean square error value as the target value; N≥2.