Semiconductor device and method for manufacturing the same

Abstract

The present invention provides a semiconductor device and a method for manufacturing the same, the method comprising: providing a substrate, sequentially forming an oxide layer and a nitride layer on the substrate; sequentially etching the nitride layer, the oxide layer and a portion of the thickness of the substrate to form a trench; filling the trench with a dielectric material to form a shallow trench isolation structure; and patterning the nitride layer to form a field plate. After forming the shallow trench isolation structure, the present invention does not need to remove the nitride layer, but directly patterns the nitride layer to form a field plate. Compared with the prior art, the present invention reduces two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency. At the same time, the field plate is located above the substrate, and the current can flow directly from the drain to the source without being blocked by the field plate, which can reduce the on-resistance.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a semiconductor device and a manufacturing method thereof. Background Art

[0002] When the integrated circuit is working, all devices work on a very small silicon substrate. Different devices have different working voltages and are prone to mutual interference, so isolation technology is needed for isolation. Existing isolation technologies include LOCOS (Local Oxidation of Silicon) process and STI (Shallow Trench Isolation) process.

[0003] In order to improve the breakdown voltage of the device, a common method is to fine-tune the device structure and add a field plate structure to adjust the electric field distribution on the surface of the device. In the prior art, the Fox (field oxide layer) grown by the LOCOS process is usually used as a field plate to improve the breakdown voltage of LDMOS (Lateral Double-diffused MOSFET, lateral double diffused MOS device).

[0004] However, the entire process of making STI and field plates involves multiple etching, furnace tube, cleaning and other processes. The process is long, time-consuming and costly. In addition, the potential lines are dense at the LOCOS bird's beak position and are prone to breakdown, which reduces the reliability of the device. Summary of the invention

[0005] The object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which can improve the device performance while reducing the process flow.

[0006] In order to solve the above technical problems, the present invention provides a method for manufacturing a semiconductor device, comprising the following steps:

[0007] Providing a substrate, and sequentially forming an oxide layer and a nitride layer on the substrate;

[0008] Sequentially etching the nitride layer, the oxide layer, and a portion of the thickness of the substrate to form a groove;

[0009] Filling the trench with dielectric material to form a shallow trench isolation structure; and

[0010] The nitride layer is patterned to form a field plate.

[0011] Optionally, the method of patterning the nitride layer to form a field plate includes:

[0012] forming a patterned photoresist layer on the nitride layer, wherein the patterned photoresist layer covers an area where a field plate is to be formed;

[0013] Using the patterned photoresist layer as a mask, etching and removing the nitride layer until the oxide layer is exposed; and

[0014] The patterned photoresist layer is removed, and the remaining nitride layer serves as a field plate.

[0015] Optionally, the nitride layer is removed by a wet etching process.

[0016] Optionally, the field plate has a rectangular cross-section.

[0017] Optionally, the material of the oxide layer is silicon oxide, and the material of the nitride layer is silicon nitride.

[0018] Optionally, the groove is formed by a dry etching process.

[0019] Optionally, a HDP process is used to fill the trench with a dielectric material.

[0020] Optionally, after forming the trench and before filling the trench with a dielectric material, the manufacturing method further includes: forming a silicon oxide layer on the sidewall and bottom of the trench by a thermal oxidation process.

[0021] Optionally, after forming the field plate, the manufacturing method further includes: forming a gate, wherein the gate covers a portion of the field plate and a portion of the oxide layer.

[0022] Correspondingly, the present invention also provides a semiconductor device manufactured by the method for manufacturing the semiconductor device as described above.

[0023] In summary, in the semiconductor device and the manufacturing method thereof provided by the present invention, a substrate is first provided, an oxide layer and a nitride layer are sequentially formed on the substrate, and then the nitride layer, the oxide layer and a part of the thickness of the substrate are sequentially etched to form a groove, and then a dielectric material is filled in the groove to form a shallow trench isolation structure, and then the nitride layer is patterned to form a field plate. The unexpected effect of the present invention is that after the shallow trench isolation structure is formed, there is no need to remove the nitride layer, and the nitride layer is directly patterned to form a field plate. Compared with the prior art of removing the nitride layer and the oxide layer after forming the shallow trench isolation structure, and then performing the LOCOS process to form the field plate, the present invention reduces two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency.

[0024] At the same time, the field plate of the present invention is located above the substrate, and the current can flow directly from the drain to the source without being blocked by the field plate, which can reduce the on-resistance. In addition, the field plate has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down, thereby ultimately improving the performance of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of the structure after the first groove is formed in the prior art.

[0026] Figure 2 It is a schematic diagram of the structure after a shallow trench isolation structure is formed in the prior art.

[0027] Figure 3 It is a schematic diagram of the structure after the first nitride layer and the first oxide layer are removed in the prior art.

[0028] Figure 4 It is a schematic diagram of the structure after patterned photoresist is formed in the prior art.

[0029] Figure 5 It is a schematic diagram of the structure after the second groove is formed in the prior art.

[0030] Figure 6 It is a schematic diagram of the structure after the field plate is formed in the prior art.

[0031] Figure 7 It is a schematic diagram of the structure after the second nitride layer and the second oxide layer are removed in the prior art.

[0032] Figure 8 It is a schematic diagram of the structure after the gate is formed in the prior art.

[0033] Fig. 9 It is a flow chart of a method for manufacturing a semiconductor device provided by one embodiment of the present invention.

[0034] Fig.10 It is a schematic diagram of the structure after the groove is formed provided by an embodiment of the present invention.

[0035] Fig.11 It is a schematic diagram of a structure after a shallow trench isolation structure is formed according to an embodiment of the present invention.

[0036] Fig.12 It is a schematic diagram of the structure after forming a patterned photoresist layer provided by one embodiment of the present invention.

[0037] Fig.13 It is a schematic diagram of the structure after the field plate is formed according to an embodiment of the present invention.

[0038] Fig.14It is a schematic diagram of the structure after the gate is formed provided by an embodiment of the present invention.

[0039] Fig.15 It is a simulation diagram of electric field lines of a semiconductor device manufactured using an existing manufacturing method.

[0040] Fig.16 It is a simulation diagram of electric field lines of a semiconductor device manufactured by the manufacturing method provided by the present invention.

[0041] Description of reference numerals:

[0042] Figures 1 to 8 In the figure, 10 is a substrate; 11 is a first oxide layer; 12 is a first nitride layer; 13 is a first trench; 14 is a shallow trench isolation structure; 15 is a second oxide layer; 16 is a second nitride layer; 17 is a patterned photoresist layer; 18 is a second trench; 19 is a field plate; 20 is a gate; and 21 is a third oxide layer.

[0043] Figures 10 to 14 In the figure, 100 is a substrate; 110 is an oxide layer; 120 is a nitride layer; 130 is a trench; 140 is a shallow trench isolation structure; 150 is a patterned photoresist layer; 160 is a field plate; and 170 is a gate. DETAILED DESCRIPTION

[0044] Figures 1 to 9 This is a schematic diagram of the steps of a semiconductor device manufacturing method. First, a shallow trench isolation structure is formed, and then a field plate is formed using a LOCOS process. First, please refer to Figure 1 As shown, a substrate 10 is provided, an oxide layer 11 and a nitride layer 12 are sequentially formed on the substrate 10, and then the nitride layer 12, the oxide layer 11 and a portion of the thickness of the substrate 10 are sequentially etched to form a first trench 13. Then, please refer to Figure 2 As shown, silicon oxide is filled in the first trench 13 and planarized to form a shallow trench isolation structure 14. Figure 3 and Figure 4 As shown, the first nitride layer 12 and the first oxide layer 11 are removed in sequence. Then, please refer to Figure 4 As shown, a second oxide layer 15 and a second nitride layer 16 are sequentially formed on the substrate 10, and then a patterned photoresist layer 17 is formed, wherein the patterned photoresist layer 17 exposes a position where a field plate is to be formed. Figure 4 and Figure 5 As shown, the second nitride layer 16 and the second oxide layer 15 are etched using the patterned photoresist layer 17 as a mask to form a second trench 18 exposing the substrate 10. Figure 6As shown, an oxidation process is performed to form a field plate 19 in the second trench 18. Then, please refer to Figure 7 As shown, the second nitride layer 16 and the second oxide layer 15 are removed, and then, please refer to Figure 8 As shown, a third oxide layer 21 and a gate 20 are formed, and the gate 20 covers a portion of the field plate 19 and a portion of the third oxide layer 21. Of course, the subsequent process also includes forming a source and a drain in the substrate 10 on both sides of the gate 20.

[0045] The above manufacturing method involves multiple etching, furnace, cleaning and other processes, which are long, time-consuming and costly. In addition, the field plate 19 formed by the LOCOS process has a bird's beak structure, and the potential lines are dense at the bird's beak position, which will reduce the reliability of the device.

[0046] The field plate 19 manufactured by the above manufacturing method is partially located in the substrate 10 and is spindle-shaped with bird beaks on both sides. The electric field lines are dense at the bird beak position and the peak electric field is relatively high.

[0047] After research, a method for manufacturing a semiconductor device is provided, comprising the following steps: providing a substrate, and sequentially forming an oxide layer and a nitride layer on the substrate; sequentially etching the nitride layer, the oxide layer and a partial thickness of the substrate to form a trench; filling the trench with a dielectric material to form a shallow trench isolation structure; and patterning the nitride layer to form a field plate.

[0048] Correspondingly, the present invention also provides a semiconductor device manufactured by the method for manufacturing the semiconductor device as described above.

[0049] In the semiconductor device and the manufacturing method thereof provided by the present invention, after forming the shallow trench isolation structure, there is no need to remove the nitride layer, and the nitride layer is directly patterned to form a field plate. Compared with the prior art of forming the shallow trench isolation structure, removing the nitride layer and the oxide layer, and then performing the LOCOS process to form the field plate, the present invention reduces two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency.

[0050] At the same time, the field plate of the present invention is located above the substrate, and the current can flow directly from the drain to the source without being blocked by the field plate, which can reduce the on-resistance. In addition, the field plate has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down, thereby ultimately improving the performance of the device.

[0051] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0052] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, unless the content clearly indicates otherwise. As used in the present invention, the term "or" is generally used in a sense that includes "and / or", unless the content clearly indicates otherwise. As used in the present invention, the term "several" is generally used in a sense that includes "at least one", unless the content clearly indicates otherwise. As used in the present invention, the term "at least two" is generally used in a sense that includes "two or more", unless the content clearly indicates otherwise. In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features.

[0053] Fig. 9 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention. Fig. 9 As shown, the method for manufacturing the semiconductor device comprises the following steps:

[0054] S1: providing a substrate, and sequentially forming an oxide layer and a nitride layer on the substrate;

[0055] S2: etching the nitride layer, the oxide layer and a portion of the thickness of the substrate in sequence to form a groove;

[0056] S3: filling the trench with a dielectric material to form a shallow trench isolation structure; and

[0057] S4: performing patterning on the nitride layer to form a field plate.

[0058] Figures 10 to 14 FIG. 1 is a schematic diagram of the structure of each step of a method for manufacturing a semiconductor device provided by an embodiment of the present invention. Fig. 9 and Figures 10 to 14 The method for manufacturing a semiconductor device provided by an embodiment of the present invention is described in detail.

[0059] In step S1, refer to Fig.10As shown, a substrate 100 is provided, and an oxide layer 110 and a nitride layer 120 are sequentially formed on the substrate 100 .

[0060] The material of the substrate 100 may be silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, indium gallium, etc., or may be silicon on insulator, germanium on insulator; or may be other materials, such as III-V compounds such as gallium arsenide. In this embodiment, the material of the substrate 100 is silicon.

[0061] In one embodiment of the present invention, the material of the oxide layer 110 is preferably silicon oxide, and the material of the nitride layer 120 is preferably silicon nitride. Exemplarily, the oxide layer 110 may be formed by a thermal oxidation process, and the nitride layer 120 may be formed by a chemical vapor deposition process. Of course, in other embodiments, the oxide layer 110 may be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition, or a combination thereof, and the nitride layer 120 may be formed by physical vapor deposition, atomic layer deposition, or a combination thereof.

[0062] In step S2, please continue to refer to Fig.10 As shown, the nitride layer 120 , the oxide layer 110 and a portion of the thickness of the substrate 100 are etched in sequence to form a trench 130 .

[0063] Exemplarily, a photoresist layer (not shown) is first formed, and the photoresist layer covers the nitride layer 120; then, the photoresist layer is exposed and developed to form a patterned photoresist layer, and the patterned photoresist layer exposes the area where the shallow trench isolation structure is to be formed. Then, using the patterned photoresist layer as a mask, the nitride layer 120, the oxide layer 110, and a portion of the thickness of the substrate 100 are etched in sequence to form a trench 130. Then, the patterned photoresist layer is removed to form a structure such as Fig.10 The structure shown.

[0064] In one embodiment of the present invention, the groove 130 can be formed by dry etching or other methods known to those skilled in the art. For example, the groove 130 is formed by a plasma etching process. The gas of the plasma etching process may include: HBr, O2, He, Cl2 and NF3. The etching time can be determined according to the required groove depth.

[0065] In step S3, please refer to Fig.11 As shown, the dielectric material is filled in the trench 130 to form a shallow trench isolation structure 140 .

[0066] In one embodiment of the present invention, a silicon oxide layer (not shown) is first formed on the sidewall and bottom of the trench 130. For example, the silicon oxide layer can be formed by a thermal oxidation process, and then a dielectric material is filled in the trench 130. For example, a HDP (High Density Plasma) process can be used to fill the trench 130 with a dielectric material. The dielectric material can be silicon oxide. The dielectric material fills the trench 130 and covers the nitride layer 120. Then, the dielectric material is planarized until the nitride layer 120 is exposed, thereby forming a dielectric material as shown in FIG. Fig.11 The shallow trench isolation structure 140 is shown.

[0067] The shallow trench isolation structure 140 isolates a plurality of active regions arranged at intervals in the substrate 100 .

[0068] In step S4, please refer to Fig.12 and Fig.13 As shown, the nitride layer 120 is patterned to form a field plate 160 .

[0069] For example, please refer to Fig.12 As shown, a patterned photoresist layer 150 is formed on the nitride layer 120, and the patterned photoresist layer 150 covers the area where the field plate is to be formed. Then, the silicon nitride 120 is etched using the patterned photoresist layer 150 as a mask until the oxide layer 110 is exposed. Thereafter, the patterned photoresist layer 150 is removed, and the remaining nitride layer 120 is retained as the field plate 160.

[0070] In one embodiment of the present invention, a wet etching process is used to remove the nitride layer 120. Since the etching rates of silicon nitride and silicon oxide by wet etching are quite different, the nitride layer 120 that is not covered by the patterned photoresist layer 150 can be completely removed by using a wet etching process, but the loss of the oxide layer 110 under the nitride layer 120 is very small. At the same time, the use of wet etching does not affect the morphology of the side wall of the field plate 120.

[0071] In the above step S2, dry etching is used to form the groove 130, that is, the nitride layer 120, the oxide layer 110 and a partial thickness of the substrate 100 are etched in sequence by a dry etching process to form the groove 130. This is because the nitride layer 120 and the oxide layer 110 are two different materials, and dry etching is required to etch the nitride layer 120 and the oxide layer 110 in sequence in the same process step to form a groove.

[0072] The nitride layer 120 is patterned to form the field plate 160, so the thickness of the nitride layer 120 formed in step S1 can be determined according to the required thickness of the field plate 160. Of course, considering the loss of the nitride layer 120 in the process from forming the nitride layer 120 to forming the field plate 160, the original thickness of the nitride layer 120 can be greater than the thickness of the field plate 160.

[0073] The nitride layer 120 exists as a mask layer when forming the shallow trench isolation structure 140. After the shallow trench isolation structure 140 is formed, the nitride layer 120 needs to be removed. In the embodiment of the present invention, the nitride layer 120 is etched as a material layer of the field plate. Figures 1 to 9 Compared with the manufacturing method shown in the figure, in the present invention, there is no need to remove the first nitride layer 12 and the first oxide layer 11, nor is there any need to form the second oxide layer 15 and the second nitride layer 16, thereby reducing two cleaning processes (removal of the first nitride layer 12 and the first oxide layer 11) and two furnace processes (formation of the second oxide layer 15 and the second nitride layer 16). At the same time, there is no need to etch the second oxide layer 15, nor is there any need to form a field plate through an oxidation process, thereby reducing one etching process and one furnace process. That is, the manufacturing method provided by the embodiment of the present invention saves two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency.

[0074] After forming the field plate 160, please refer to Fig.14 As shown, a gate 170 is formed, and the gate 170 covers part of the field plate 160 and part of the oxide layer 110. After that, a source / drain (not shown) can be formed in the substrate 100 on both sides of the gate 170. Exemplarily, first, a gate material layer (not shown) is formed, and the gate material layer covers the oxide layer 150, the field plate 160 and the shallow trench isolation structure 140. Then, a patterned photoresist layer is formed on the gate material layer, and the patterned photoresist layer exposes the area where the gate is predetermined to be formed. Then, the exposed gate material layer is etched using the patterned photoresist layer as a mask until the oxide layer 110 is exposed. Next, the patterned photoresist layer is removed, and the remaining gate material layer forms the gate 170. In one embodiment of the present invention, the material of the gate 170 is polysilicon.

[0075] In the embodiment of the present invention, the field plate 160 is located above the substrate 100 , and the current can flow directly from the drain to the source without being blocked by the field plate 160 , thereby reducing the on-resistance.

[0076] In the embodiment of the present invention, the field plate 160 is formed by etching the nitride layer 120 . The field plate 160 has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down.

[0077] In one embodiment of the present invention, the cross section of the field plate 160 is rectangular. In another embodiment of the present invention, the cross section of the field plate 160 may also be a square, trapezoid or other shapes known to those skilled in the art, and the cross-sectional shape of the field plate 160 may be determined according to actual needs, and the present invention is not limited thereto.

[0078] In addition, in the prior art, a patterned photoresist layer 17 is used to expose the area where the field plate 19 is predetermined to be formed, while in this embodiment, a patterned photoresist layer 150 is used to cover the area where the field plate 160 is predetermined to be formed. By selecting a positive photoresist layer and a negative photoresist layer, the mask in the prior art can be directly used, thereby eliminating the need for additional mask plates and saving production costs.

[0079] Fig.15 It is a simulation diagram of the electric field lines of a semiconductor device made using an existing manufacturing method. Fig.16 It is a simulation diagram of electric field lines of a semiconductor device manufactured by the manufacturing method provided by the present invention. Fig.15 and Fig.16 In the figure, the horizontal axis and the vertical axis represent the position of the semiconductor device in the x-direction and the y-direction. Fig.15 It can be seen that the field plate is partially located in the substrate. At the bird's beak (the circle in the figure), the electric field lines are dense and the peak electric field is relatively high. Fig.16 As can be seen from the figure, the field plate is located on the substrate, corresponding to Fig.15 In the area where the bird's beak structure is located (as shown by the circle in the figure), the electric field lines are evenly distributed, avoiding breakdown here, thereby increasing the breakdown voltage.

[0080] In the method for manufacturing a semiconductor device provided by the present invention, a substrate 100 is first provided, an oxide layer 110 and a nitride layer 120 are sequentially formed on the substrate 100, and then the nitride layer 120, the oxide layer 110 and a portion of the thickness of the substrate 100 are sequentially etched to form a trench 130, and then a dielectric material is filled in the trench 130 to form a shallow trench isolation structure 140, and then the nitride layer 120 is patterned to form a field plate 160. The unexpected effect of the present invention is that after forming the shallow trench isolation structure 140, it is not necessary to remove the nitride layer 120, and the nitride layer 120 is directly patterned to form the field plate 160. Compared with the prior art of removing the nitride layer and the oxide layer after forming the shallow trench isolation structure, and then performing the LOCOS process to form the field plate, the present invention reduces two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency.

[0081] At the same time, the field plate 160 of the present invention is located above the substrate 100, and the current can flow directly from the drain to the source without being blocked by the field plate 160, which can reduce the on-resistance. In addition, the field plate 160 has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down, thereby ultimately improving the performance of the device.

[0082] Accordingly, the present invention also provides a semiconductor device, which is manufactured using the semiconductor device manufacturing method described above. Fig.14 As shown, the semiconductor device comprises:

[0083] Substrate 100;

[0084] An oxide layer 110 , located on the substrate 100 ;

[0085] A shallow trench isolation structure 140 penetrates the oxide layer 110 and extends into the substrate 100, wherein an upper surface of the shallow trench isolation structure 140 is higher than an upper surface of the oxide layer 110;

[0086] The field plate 160 is located on the oxide layer 110 .

[0087] In one embodiment of the present invention, a gate 170 is further included. The gate 170 covers a portion of the field plate 160 and a portion of the oxide layer 110 .

[0088] In one embodiment of the present invention, the field plate 160 has a rectangular cross section.

[0089] The present invention can make the current flow directly from the drain to the source of the semiconductor device by arranging the field plate 160 on the substrate 100, without being blocked by the field plate 160, thereby reducing the on-resistance. In addition, the field plate 160 has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down, thereby ultimately improving the performance of the device.

[0090] In summary, in the semiconductor device and the manufacturing method thereof provided by the present invention, a substrate is first provided, an oxide layer and a nitride layer are sequentially formed on the substrate, and then the nitride layer, the oxide layer and a part of the thickness of the substrate are sequentially etched to form a groove, and then a dielectric material is filled in the groove to form a shallow trench isolation structure, and then the nitride layer is patterned to form a field plate. The unexpected effect of the present invention is that after the shallow trench isolation structure is formed, there is no need to remove the nitride layer, and the nitride layer is directly patterned to form a field plate. Compared with the prior art of removing the nitride layer and the oxide layer after forming the shallow trench isolation structure, and then performing the LOCOS process to form the field plate, the present invention reduces two cleaning processes, three furnace processes and one etching process, shortens the process flow, reduces the manufacturing cost, and effectively improves the production efficiency.

[0091] At the same time, the field plate of the present invention is located above the substrate, and the current can flow directly from the drain to the source without being blocked by the field plate, which can reduce the on-resistance. In addition, the field plate has a regular shape and no bird's beak structure, which can reduce the peak electric field at the bird's beak, making the electric field lines evenly distributed and not easy to break down, thereby ultimately improving the performance of the device.

[0092] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The following steps are involved: Providing a substrate, and sequentially forming an oxide layer and a nitride layer on the substrate; The nitride layer, the oxide layer and a portion of the thickness of the substrate are sequentially etched to form a trench, wherein the nitride layer serves as a mask layer when forming the trench; Filling the trench with dielectric material to form a shallow trench isolation structure; as well as The nitride layer used as a mask layer when forming the trench is patterned to form a field plate.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The method of patterning the nitride layer to form a field plate includes: forming a patterned photoresist layer on the nitride layer, wherein the patterned photoresist layer covers an area where a field plate is to be formed; Using the patterned photoresist layer as a mask, etching and removing the nitride layer until the oxide layer is exposed; and The patterned photoresist layer is removed, and the remaining nitride layer serves as a field plate.

3. The method for manufacturing a semiconductor device according to claim 2, wherein: The nitride layer is removed by a wet etching process.

4. The method for manufacturing a semiconductor device according to claim 1, wherein: The field plate has a rectangular cross section.

5. The method for manufacturing a semiconductor device according to claim 1, wherein: The material of the oxide layer is silicon oxide, and the material of the nitride layer is silicon nitride.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: The groove is formed by a dry etching process.

7. The method for manufacturing a semiconductor device according to claim 1, wherein: The HDP process is used to fill the dielectric material in the trench.

8. The method for manufacturing a semiconductor device according to claim 1, wherein: After forming the trench and before filling the trench with a dielectric material, the manufacturing method further includes: forming a silicon oxide layer on the sidewall and bottom of the trench by a thermal oxidation process.

9. The method for manufacturing a semiconductor device according to claim 1, wherein: After forming the field plate, the manufacturing method further includes: forming a gate, wherein the gate covers a portion of the field plate and a portion of the oxide layer.

10. A semiconductor device, characterized in that: The semiconductor device is manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 to 9.

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