Elevator star sealing circuit, star sealing device and elevator

Abstract

The invention discloses an elevator star sealing circuit and device and an elevator, and the elevator star sealing circuit is characterized by comprising a signal conversion module, a blocking execution module, a star sealing module and a frequency converter module; the signal conversion module is connected with the blocking execution module, and the blocking execution module and the frequency converter module are connected with the star sealing module; the signal conversion module is used for generating an enable signal according to the detected blocking signal; the blocking execution module is used for receiving the first control signal and the enable signal and sending the first control signal to the satellite sealing module when the enable signal is determined to be at a low level; the star sealing module is used for receiving a star sealing signal and adjusting the first control signal into a frequency converter control signal when the star sealing signal is determined to be a low level; and the frequency converter module is used for controlling a motor to seal satellites according to the frequency converter control signal. The method can reduce the maintenance cost. The circuit can be widely applied to the technical field of electronic circuits.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to an elevator star-sealing circuit, a star-sealing device and an elevator. Background Art

[0002] As an indispensable tool in modern life, the industry has always had high requirements for the safety and reliability of elevators. At present, the star-sealing and safe torque-off technologies for elevator motors are usually pure hardware solutions using two contactors. This solution not only occupies a large volume of the star-sealing equipment, affecting the space occupied by the elevator. In addition, the contactor wiring is complicated, resulting in high maintenance costs. Therefore, there are still technical problems that need to be solved in the relevant technology. Summary of the invention

[0003] The purpose of this application is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0004] To this end, an object of an embodiment of the present application is to provide an elevator star-sealing circuit, a star-sealing device and an elevator, wherein the circuit can reduce the space occupied by the elevator and reduce maintenance costs.

[0005] In order to achieve the above-mentioned technical objectives, the technical solutions adopted in the embodiments of the present application include: an elevator star-sealing circuit, including: a signal conversion module, a blocking execution module, a star-sealing module and a frequency converter module; the signal conversion module is connected to the blocking execution module, and the blocking execution module and the frequency converter module are connected to the star-sealing module; the signal conversion module is used to generate an enable signal according to the detected blocking signal; the blocking execution module is used to receive a first control signal and the enable signal, and when it is determined that the enable signal is at a low level, the first control signal is sent to the star-sealing module; the star-sealing module is used to receive the star-sealing signal and when it is determined that the star-sealing signal is at a low level, the first control signal is adjusted to a frequency converter control signal; the frequency converter module is used to control the motor to perform star-sealing according to the frequency converter control signal.

[0006] In addition, the elevator star-sealing circuit according to the above embodiment of the present invention may also have the following additional technical features:

[0007] Furthermore, in an embodiment of the present application, the circuit also includes a fault monitoring module; the fault monitoring module is used to generate a blocking signal based on the first feedback signal of the signal conversion module or based on the second feedback signal of the blocking execution module; the blocking signal is used to enable the blocking execution module to maintain a high-level signal output.

[0008] Further, in an embodiment of the present application, the fault monitoring module includes a single-chip microcomputer and two level conversion sub-circuits; the circuit structures of the two level conversion sub-circuits are the same; the two level conversion sub-circuits are connected to the single-chip microcomputer; each of the level conversion sub-circuits includes:

[0009] An eleventh resistor, a twelfth resistor and a first transistor; one end of the eleventh resistor is connected to the single-chip microcomputer; the other end of the eleventh resistor is connected to the base of the first transistor; one end of the twelfth resistor and the emitter of the first transistor are connected to a 5V power supply; the other end of the twelfth resistor is connected to the base of the first transistor, and the collector of the first transistor is connected to the blocking execution module.

[0010] Further, in an embodiment of the present application, the signal conversion module includes two signal conversion sub-circuits; the structures of the two signal conversion sub-circuits are the same; each of the signal conversion sub-circuits includes a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first optical coupler and a second optical coupler;

[0011] Among them, one end of the first resistor is connected to the positive electrode of the external power supply; one end of the second resistor, one end of the first capacitor and the first pin of the first optocoupler are connected to the other end of the first resistor; the second pin of the first optocoupler, the other end of the second resistor and the other end of the first capacitor are connected to the negative electrode of the external power supply; the fourth pin of the first optocoupler is connected to the second pin of the second optocoupler, and the fourth pin of the first optocoupler is connected to the blocking execution module as the first output end of the signal conversion module; the first pin of the second optocoupler is connected to one end of the third resistor, and the other end of the third resistor is connected to a 5V power supply; one end of the fourth resistor and one end of the fifth resistor are connected to the third pin of the second optocoupler; the other end of the fourth resistor is connected to a 3.3V power supply; the other end of the fifth resistor and one end of the second capacitor are connected to the fault monitoring module as the second output end; the third pin of the second optocoupler, the third pin of the first optocoupler and the other end of the second capacitor are all grounded.

[0012] Further, in the embodiment of the present application, the blocking execution module includes a first eight-channel tri-state buffer chip and a second eight-channel tri-state buffer chip;

[0013] Each of the eight-channel tri-state buffer chips includes two enable terminals, eight signal input terminals and eight signal output terminals;

[0014] The seven signal output terminals of the first eight-channel tri-state buffer chip and the seven input terminals of the second eight-channel tri-state buffer chip are connected in series one by one; the eighth signal output terminal of the first eight-channel tri-state buffer chip, the eighth signal input terminal of the first eight-channel tri-state buffer chip, the eighth signal output terminal of the second eight-channel tri-state buffer chip and the eighth signal input terminal of the second eight-channel tri-state buffer chip are connected to the fault monitoring module;

[0015] The first enable terminal of the first eight-channel tri-state buffer chip is connected to the signal conversion module; the second enable terminal of the first eight-channel tri-state buffer chip is grounded;

[0016] The seven signal output terminals of the second eight-channel three-state buffer chip are connected to the star sealing module.

[0017] Further, in the embodiment of the present application, the star-sealing module includes a buffer subcircuit and an AND gate subcircuit; the buffer subcircuit and the AND gate subcircuit are both connected to the blocking execution module; the buffer subcircuit includes a third eight-channel tri-state buffer and a signal inversion subcircuit;

[0018] The four signal input terminals of the third eight-channel tri-state buffer are connected to the four signal output terminals of the second eight-channel tri-state buffer chip;

[0019] The other three signal output terminals of the seven signal output terminals of the second eight-channel three-state buffer chip are connected to the AND gate sub-circuit;

[0020] The signal inversion subcircuit is connected to the first enable terminal of the third eight-channel tri-state buffer.

[0021] Further, in the embodiment of the present application, the signal inversion subcircuit includes a fifteenth resistor, a sixteenth resistor and a third transistor;

[0022] One end of the sixteenth resistor is connected to the star-sealing signal; the other end of the sixteenth resistor and the base of the third transistor are connected to the first enable end of the third eight-channel three-state buffer; the collector of the third transistor is connected to one end of the fifteenth resistor, and the other end of the fifteenth resistor is connected to a 5V power supply; the emitter of the third transistor is grounded.

[0023] Further, in the embodiment of the present application, the inverter module includes: a fourth transistor, a third optocoupler, a fourth optocoupler, a fifth optocoupler, a sixth optocoupler, a seventh optocoupler and an eighth optocoupler; the AND gate subcircuit includes an AND gate chip;

[0024] Any one of the optocouplers is connected to an IGBT of the elevator motor control module to control the IGBT to be turned on or off;

[0025] The first pin of the third optocoupler, the first pin of the fourth optocoupler and the first pin of the fifth optocoupler are connected to the collector of the fourth triode; the second pin of the third optocoupler is connected to the second signal output terminal of the seven signal output terminals of the third eight-channel tri-state buffer; the second pin of the fourth optocoupler is connected to the third signal output terminal of the third eight-channel tri-state buffer; the second pin of the fifth optocoupler is connected to the fourth signal output terminal of the third eight-channel tri-state buffer;

[0026] The second pin of the sixth optocoupler is connected to the third pin of the AND gate chip, the second pin of the seventh optocoupler is connected to the sixth pin of the AND gate chip, and the second pin of the eighth optocoupler is connected to the eighth pin of the AND gate chip; the first pin of the sixth optocoupler, the first pin of the seventh optocoupler and the first pin of the eighth optocoupler are all connected to a 5V power supply; the second pin, the fifth pin and the tenth pin of the AND gate chip are all connected to the star sealing signal; the first pin, the fourth pin and the ninth pin of the AND gate chip are connected to the second eight-channel three-state buffer chip.

[0027] On the other hand, the present application also provides an elevator star-sealing device, comprising an elevator star-sealing circuit as described in any one of the invention contents.

[0028] In addition, the present application also provides an elevator, comprising an elevator star sealing device as described above.

[0029] The advantages and benefits of the present application will be partially given in the following description, and partially become apparent from the following description, or be understood through the practice of the present application:

[0030] The present application can use a signal conversion module, a blocking execution module, a star-blocking module and a frequency converter module to replace the star-blocking contactor to block the star of the elevator motor. The present application can achieve the star-blocking of the elevator through a small integrated control circuit. The present application can save the space occupied by the elevator, reduce the difficulty of elevator maintenance, and reduce maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a module schematic diagram of an elevator star-sealing circuit in a specific embodiment of the present invention;

[0032] Figure 2 It is a module schematic diagram of an elevator star sealing circuit in another specific embodiment of the present invention;

[0033] Figure 3 It is a structural schematic diagram of an elevator star sealing circuit according to a specific embodiment of the present invention;

[0034] Figure 4A schematic diagram of the structure of a pull-up resistor module in a specific embodiment of the present invention;

[0035] Figure 5 The figure is a schematic structural diagram of an elevator star sealing circuit according to another specific embodiment of the present invention. DETAILED DESCRIPTION

[0036] The embodiments of the present invention are described in detail below with reference to the accompanying drawings to illustrate the principles and processes of the elevator star sealing circuit, device and elevator in the embodiments of the present invention.

[0037] In the related technologies, elevators are an indispensable tool for modern life, and the industry has always had high requirements for their safety and reliability. At present, the star-sealing and safe torque-off technologies for elevator motors are usually pure hardware solutions using two contactors. This solution not only occupies a large volume of the star-sealing equipment, affecting the space occupied by the elevator. In addition, the contactor wiring is complicated, resulting in high maintenance costs. Therefore, there are still technical problems that need to be solved in the related technologies.

[0038] In view of the above-mentioned defects of the prior art, Figure 1 , Figure 1 Schematic diagram of a module of an elevator star-sealing circuit provided in an embodiment of the present application. Figure 1 In the embodiment, the elevator star sealing circuit may include a signal conversion module 1, a blocking execution module 2, a star sealing module 3 and a frequency converter module 4. The signal conversion module 1 is connected to the blocking execution module 2, and the blocking execution module 2 and the frequency converter module 4 are connected to the star sealing module 3; the signal conversion module 1 may generate an enable signal according to the detected blocking signal, and the blocking signal may come from the change of the external power supply signal. When the voltage of the power supply signal is different from the preset voltage, the signal conversion module 1 may form a blocking signal. The blocking execution module 2 may be used to receive the first control signal and the enable signal, and when it is determined that the enable signal is at a low level, the first control signal is sent to the star sealing module 3 and to the frequency converter module 4. After receiving the first control signal, the frequency converter module controls the motor to run normally. The first control signal may be an external PWM signal. The star sealing module 3 may receive the star sealing signal and adjust the first control signal to the frequency converter control signal when it is determined that the star sealing signal is at a low level. The star sealing signal may be an external star sealing signal, and the frequency converter control signal may be a signal for the elevator motor to perform star sealing. The frequency converter module 4 can change the original directly received first control signal according to the frequency converter control signal, so that the control motor of the control circuit can be shut down.

[0039] In summary, this embodiment can use a signal conversion module, a blocking execution module, a star blocking module and a frequency converter module to replace the star blocking contactor to block the star of the elevator motor. This application can achieve the star blocking of the elevator through a small integrated control circuit. This application can save the space occupied by the elevator, reduce the difficulty of elevator maintenance, and reduce maintenance costs.

[0040] In some feasible embodiments of the present application, refer to Figure 2 The star-sealing circuit may further include a fault monitoring module 5; the fault monitoring module 5 is used to generate a blocking signal according to the first feedback signal of the signal conversion module 1 or according to the second feedback signal of the blocking execution module 2; the blocking signal can adjust the PWM signal received by the blocking execution module to a continuous high-level signal output.

[0041] In some feasible embodiments of the present application, refer to Figure 3 The fault monitoring module 5 may include a single chip microcomputer and two level conversion sub-circuits, namely a first level conversion sub-circuit and a second level conversion sub-circuit. The circuit structures of the two level conversion sub-circuits are the same. Both level conversion sub-circuits are connected to the single chip microcomputer.

[0042] Among them, refer to Figure 3 , in the first level conversion sub-circuit, the eleventh resistor is Figure 3 The resistor numbered R11 and the twelfth resistor are Figure 3 The resistor labeled R12 and the first transistor are Figure 3 The transistor is labeled Q1; one end of the eleventh resistor R11 is connected to the single-chip microcomputer; the other end of the eleventh resistor R11 is connected to the base of the first transistor Q1; one end of the twelfth resistor R12 and the emitter of the first transistor Q1 are connected to a 5V power supply; the other end of the twelfth resistor R12 is connected to the base of the first transistor Q1, and the collector of the first transistor Q1 is connected to the blocking execution module.

[0043] In the second level conversion sub-circuit, the eleventh resistor is Figure 3 The middle label is R13 and the twelfth resistor is Figure 3 The middle label is R14 and the first transistor is Figure 3 The transistor is labeled Q2; one end of the eleventh resistor R13 is connected to the single-chip microcomputer; the other end of the eleventh resistor R13 is connected to the base of the first transistor Q2; one end of the twelfth resistor R14 and the emitter of the first transistor Q2 are connected to a 5V power supply; the other end of the twelfth resistor R14 is connected to the base of the first transistor Q2, and the collector of the first transistor Q2 is connected to the blocking execution module.

[0044] In some feasible embodiments of the present application, refer to Figure 3The signal conversion module includes two signal conversion sub-circuits, namely a first signal conversion sub-circuit and a second signal conversion sub-circuit. The two signal conversion sub-circuits have the same structure.

[0045] exist Figure 3 In the embodiment, the first signal conversion subcircuit includes a first capacitor C1, a second capacitor C3, a first resistor R1, a second resistor R2, a third resistor R5, a fourth resistor R7, a fifth resistor R8, a first optical coupler U1 and a second optical coupler U3;

[0046] Among them, one end of the first resistor R1 is connected to the positive electrode of the external power supply; one end of the second resistor R2, one end of the first capacitor C1 and the first pin of the first optical coupler U1 are connected to the other end of the first resistor R1; the second pin of the first optical coupler U1, the other end of the second resistor R2 and the other end of the first capacitor C1 are connected to the negative electrode of the external power supply, and the external power supply can be a 24V power supply. The fourth pin of the first optical coupler U1 is connected to the second pin of the second optical coupler U3, and the fourth pin of the first optical coupler U1 is connected to the blocking execution module as the first output end of the signal conversion module; the first pin of the second optical coupler U3 is connected to one end of the third resistor R5, and the other end of the third resistor R5 is connected to the 5V power supply; one end of the fourth resistor R7 and one end of the fifth resistor R8 are connected to the third pin of the second optical coupler U3; the other end of the fourth resistor R7 is connected to the 3.3V power supply; the other end of the fifth resistor R8 and one end of the second capacitor C3 are connected to the fault monitoring module as the second output end; the third pin of the second optical coupler U3, the third pin of the first optical coupler U1 and the other end of the second capacitor C3 are all grounded,

[0047] The second signal conversion sub-circuit includes a first capacitor C2, a second capacitor C4, a first resistor R3, a second resistor R4, a third resistor R6, a fourth resistor R9, a fifth resistor R10, a first optical coupler U2 and a second optical coupler U4;

[0048] Among them, one end of the first resistor R3 is connected to the positive electrode of the external power supply; one end of the second resistor R4, one end of the first capacitor C2 and the first pin of the first optocoupler U2 are connected to the other end of the first resistor R3; the second pin of the first optocoupler U2, the other end of the second resistor R4 and the other end of the first capacitor C2 are connected to the negative electrode of the external power supply; the fourth pin of the first optocoupler U2 is connected to the second pin of the second optocoupler U4, and the fourth pin of the first optocoupler U2 is connected to the blocking execution module as the first output end of the signal conversion module; the first pin of the second optocoupler U4 is connected to one end of the third resistor R6, and the other end of the third resistor R6 is connected to a 5V power supply; one end of the fourth resistor R9 and one end of the fifth resistor R10 are connected to the third pin of the second optocoupler U4; the other end of the fourth resistor R9 is connected to a 3.3V power supply; the other end of the fifth resistor R10 and one end of the second capacitor C4 are connected to the fault monitoring module as the second output end; the third pin of the second optocoupler U4, the third pin of the first optocoupler U2 and the other end of the second capacitor C4 are all grounded.

[0049] In some feasible embodiments of the present application, refer to Figure 3 The blocking execution module includes a first eight-channel three-state buffer chip U6 and a second eight-channel three-state buffer chip U7; each eight-channel three-state buffer chip includes two enable terminals OE1 and OE2, eight signal input terminals A0-A7 and eight signal output terminals Y0-Y7; the seven signal output terminals Y0-Y6 of the first eight-channel three-state buffer chip are connected in series with the seven input terminals A0-A7 of the second eight-channel three-state buffer chip in a one-to-one correspondence. The seven signal output terminals Y0-Y6 of the first eight-channel three-state buffer chip are connected to seven external first control signals, and six of the first control signals PWM_UP, PWM_VP, PWM_WP, P_UN, P_VN, and P_WN are PWM signals. And DRIVE_UP can be a control signal that maintains a high level or a low level. The eighth signal output terminal Y7 of the first eight-channel three-state buffer chip, the eighth signal input terminal A7 of the first eight-channel three-state buffer chip, the eighth signal output terminal Y7 of the second eight-channel three-state buffer chip and the eighth signal input terminal A7 of the second eight-channel three-state buffer chip are connected to the fault monitoring module; the first enable terminal OE1 of the first eight-channel three-state buffer chip is connected to the signal conversion module; the second enable terminal OE2 of the first eight-channel three-state buffer chip is grounded; and the seven signal output terminals of the second eight-channel three-state buffer chip are connected to the star sealing module.

[0050] In addition, each of the seven signal output ends of the first eight-channel tri-state buffer chip and the seven signal output ends of the second eight-channel tri-state buffer chip may be provided with a pull-up resistor module. Figure 4The pull-up resistor module may include a number of resistors RX equal to the number of signal output terminals. In this embodiment, the number of pull-up resistors RX is 7. For any pull-up resistor RX, one end of the resistor RX is connected to one of the 7 signal output terminals of the first octal-channel tri-state buffer chip, and any two pull-up resistors RX are not connected to the same signal output terminal. The other ends of all pull-up resistors RX can be connected to a 5V power supply.

[0051] In some feasible embodiments of the present application, refer to Figure 2 The star-sealing module may include a buffer subcircuit and an AND gate subcircuit; the buffer subcircuit and the AND gate subcircuit are both connected to the blocking execution module; the buffer subcircuit includes a third eight-channel three-state buffer U8 and a signal inversion subcircuit; the four signal input terminals A0-A3 of the third eight-channel three-state buffer U8 are connected to the four signal output terminals Y0-Y3 of the second eight-channel three-state buffer chip U7; the other three signal output terminals Y4-Y6 of the seven signal output terminals Y0-Y7 of the second eight-channel three-state buffer chip U7 are connected to the gate subcircuit; the signal inversion subcircuit is connected to the first enable terminal OE1 of the third eight-channel three-state buffer U8.

[0052] In some feasible embodiments of the present application, the signal inversion subcircuit includes a fifteenth resistor R15, a sixteenth resistor R16 and a third transistor Q3. One end of the sixteenth resistor R16 is connected to the star-sealing signal; the other end of the sixteenth resistor R16 and the base of the third transistor Q3 are connected to the first enable terminal OE1 of the third eight-channel three-state buffer U8; the collector of the third transistor Q3 is connected to one end of the fifteenth resistor R15, and the other end of the fifteenth resistor R15 is connected to a 5V power supply; the emitter of the third transistor Q3 is grounded.

[0053] The other four input terminals A4 - A7 and the second enable terminal OE2 of the third eight-channel tri-state buffer U8 are grounded.

[0054] The other four output terminals Y4-Y7 of the third eight-channel three-state buffer U8 are in a suspended state.

[0055] In addition, the four signal output terminals Y0-Y3 of the third eight-channel tri-state buffer U8 can be provided with a pull-up resistor module. The pull-up resistor module can include a number of resistors equal to the number of the four signal output terminals. In this embodiment, the number of pull-up resistors is four. For any pull-up resistor, one end of the resistor is connected to one of the four signal output terminals of the third eight-channel tri-state buffer chip, and any two pull-up resistors are not connected to the same signal output terminal. The other ends of all pull-up resistors can be connected to a 5V power supply.

[0056] In some feasible embodiments of the present application, the inverter module includes: a fourth transistor Q4, a third optocoupler U10, a fourth optocoupler U11, a fifth optocoupler U12, a sixth optocoupler U13, a seventh optocoupler U14 and an eighth optocoupler U15; and the AND gate subcircuit includes an AND gate chip U9. Any optocoupler is connected to an IGBT of the elevator motor control module to control the IGBT to be turned on or off.

[0057] The first pin of the third optocoupler U10, the first pin of the fourth optocoupler U11, and the first pin of the fifth optocoupler U12 are connected to the collector of the fourth transistor; the second pin of the third optocoupler U10 is connected to the second signal output end of the seven signal output ends of the third eight-channel three-state buffer; the second pin of the fourth optocoupler U11 is connected to the third signal output end of the third eight-channel three-state buffer; the second pin of the fifth optocoupler U12 is connected to the fourth signal output end of the third eight-channel three-state buffer.

[0058] The second pin of the sixth optocoupler U13 is connected to the third pin 1Y of the gate chip U9, the second pin of the seventh optocoupler U14 is connected to the sixth pin 2Y of the gate chip U9, and the second pin of the eighth optocoupler is connected to the eighth pin 3Y of the gate chip U9; the first pin of the sixth optocoupler U13, the first pin of the seventh optocoupler U14 and the first pin of the eighth optocoupler are all connected to the 5V power supply; the second pin 1B, the fifth pin 2B and the tenth pin 3B of the gate chip U9 are all connected to the star-sealing signal FX; the first pin 1A, the fourth pin 2A and the ninth pin 3A of the gate chip U9 are connected to the second eight-channel three-state buffer chip U7. The twelfth pin 4A and the thirteenth pin 4B of the gate chip U9 are grounded.

[0059] The specific implementation principle of this application is described below with reference to the accompanying drawings:

[0060] Reference Figure 5 The electronic star-sealing circuit is composed of a signal conversion module, a fault monitoring module, a blocking execution module, a star-sealing module and a peripheral circuit inverter module.

[0061] The signal conversion module may be composed of four optocouplers U1-U4, ten current limiting resistors R1-R10 and four capacitors C1-C4. The signal conversion module may convert external input blocking signals STO1+, STO1-, STO2+, and STO2- into 5V DC STO1_EN and STO2_EN signals and 3.3V DC STO 1 and STO2 signals.

[0062] The blocking execution module is composed of two low-level effective eight-channel three-state buffer chips U6 and U7 connected in series. When the first enable terminal OE1 or the second enable terminal OE2 receives a high level, the blocking execution module can block the output, so that the eight-channel three-state buffer chips U6 and U7 output a constant high level. The seven input channels A0-A6 of U6 are connected to the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals respectively. The output channels Y0-Y6 of the eight-channel three-state buffer chip U6 are connected to the A0-A6 of the eight-channel three-state buffer chip U7 respectively. The Y0-Y3 of the eight-channel three-state buffer chip U7 is connected to the A0-A3 of the eight-channel three-state buffer chip U8 and the 1A, 2A, and 3A ports of the gate chip U9 respectively. In addition, all the output pins used by the eight-channel three-state buffer chips U6 and U7 need to be connected to pull-up resistors and pulled up to 5V.

[0063] Taking the eight-channel three-state buffer chip U6 as an example, when STO1_EN is at a low level, the outputs of Y0-Y6 are consistent with the received DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals; when STO1_EN is at a high level, Y0-Y6 outputs a high level.

[0064] The fault monitoring module consists of an MCU and two level conversion circuits, where the MCU is U5. One level conversion circuit consists of a PNP tube Q1, resistors R11 and R12, and the other level conversion circuit consists of a PNP tube Q2, resistors R13 and R14. When the STO1 and STO2 signals are both high or low, the mEN1 and mEN2 output by the MCU are high, and the blocking execution module is controlled by the signal conversion module. When the STO1 and STO2 signals are one high and one low, the mEN1 and mEN2 output by the MCU are low, the forced blocking execution module blocks the output, and the output DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals are all high.

[0065] For the blocking execution module, the MCU can send a PWM signal with a period of 1ms and a duty cycle of 50%. Take one of the buffer modules of the blocking drive module as an example. When the blocking enable signal STO1_EN sent by the signal conversion module is high, the test feedback signal (TESTOUT1) received at this time is high, then the buffer module has no fault, the mEN1 and mEN2 output by the MCU are high, and the blocking execution module is controlled by the signal conversion module. Otherwise, the buffer module fails, the mEN1 and mEN2 output by the MCU are low, and the forced blocking execution module blocks the output, and the output DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals are all high. When the blocking enable signal STO1_EN issued by the signal conversion module is at a low level, the test feedback signal (TESTOUT1) received at this time is consistent with the test signal (TESTIN), then the buffer module has no fault, the mEN1 and mEN2 output by the MCU are at a high level, and the blocking execution module is controlled by the signal conversion module; otherwise, the buffer module fails, the mEN1 and mEN2 output by the MCU are at a low level, the forced blocking execution module blocks the output, and the output DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals are all at a high level.

[0066] The star-sealing module is composed of an AND gate module and a buffer module, wherein the AND gate module is composed of a two-input four-channel AND gate chip U9. The buffer module is composed of an inverting module and an eight-channel three-state buffer U8 that is valid at a low level. The inverting module is composed of an NPN tube Q3, a resistor R15, and a resistor R16. When the first enable terminal OE1 or the second enable terminal OE2 of U8 receives a high level, the output of U8 is blocked. In addition, since the buffer module is set up in the entire circuit, the delay between the upper and lower tube PWM drive signals can be reduced, and the risk of tube explosion caused by the simultaneous conduction of the upper IGBT tube and the lower IGBT tube in the IGBT module connected to the motor can be reduced.

[0067] The four input channels A0-A3 of the eight-channel three-state buffer U8 are connected to the Y0-Y3 of the eight-channel three-state buffer U7 respectively, and the output channels Y0-Y3 are connected to the base of the transistor Q4 and the optocouplers U10, U11, and U12 respectively. The 1A, 2A, and 3A of the AND gate chip U9 are connected to the Y4-Y6 of the eight-channel three-state buffer U7 respectively. The output channels 1Y, 2Y, and 3Y of the AND gate chip U9 are connected to the optocouplers U13, U14, and U15 respectively. In addition, all the output pins used by the eight-channel three-state buffer chip U8 need to be connected to pull-up resistors and pulled up to 5V.

[0068] The DRIVE_UP signal is the power supply drive signal for the optocouplers U10, U11 and U12. When DRIVE_UP is at a low level, the transistor Q4 is turned on, and the optocouplers U10, U11 and U12 are powered by 5V. When DRIVE_UP is at a high level, the transistor Q4 is turned off, and the 5V power supply of the optocouplers U10, U11 and U12 is disconnected.

[0069] When the forced blocking module blocks the signal output, the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals output by the eight-channel three-state buffer chip U7 are all high level. At this time, the transistor Q4 is cut off, and the 5V power supply of the optocouplers U10, U11, and U12 is disconnected. While disconnecting the PWM drive signals (PWM_UP, PWM_VP, PWM_WP, PWM_UN, PWM_VN, PWM_WN) of the upper and lower tubes, the upper tube drive optocoupler power supply signal (DRIVE_UP) is disconnected, providing redundancy and improving the safety and reliability of elevator operation.

[0070] This embodiment can realize the safe torque off function. When the external blocking signal (STO1+, STO1-, STO2+, STO2-) is at a high level and the fault monitoring module does not detect the fault of the signal conversion module or the blocking execution module, the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals can pass through the blocking execution module. At this time, if the star-blocking signal is at a high level, the DRIVE_UP, PWM_UP, PWM_VP, PWM_WP, PWM_UN, PWM_VN, and PWM_WN signals output by the star-blocking module are consistent with the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals output by the blocking execution module. When the external blocking signal (STO1+, STO1-, STO2+, STO2-) is at a low level or the fault monitoring module detects a fault in the signal conversion module or the blocking execution module, the blocking execution module blocks the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signal outputs. At this time, due to the presence of a pull-up resistor at the output of the blocking execution module, the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals are at a high level.

[0071] This embodiment can realize the electronic star sealing function: the signal output by the blocking execution module is divided into two parts, one part is the upper tube PWM drive signal (P_UP, P_VP, P_WP) and the drive optocoupler power supply signal (DRI VE), which are used as the input of the buffer A0-A3 channel. One part is the lower tube PWM drive signal (P_UN, P_VN, P_WN), which is used as the input of the AND gate A channel. The star sealing enable signal FX is the input of the AND gate B channel, and after being inverted by the inverting circuit, it is the enable signal input of the buffer. When the external blocking signal (STO1+, STO1-, STO2+, STO2-) is at a high level and the fault monitoring module does not detect the fault of the signal conversion module or the blocking execution module and the star sealing enable signal is at a high level, the motor does not perform electronic star sealing at this time. The DRIVE_UP, PWM_UP, PWM_VP, PWM_WP, PWM_UN, PWM_VN, and PWM_WN signals output by the star-sealing module are consistent with the DRIVE, P_UP, P_VP, P_WP, P_UN, P_VN, and P_WN signals output by the blocking execution module. When the external blocking signal (STO1+, STO1-, STO2+, STO2-) is high and the fault monitoring module does not detect the fault of the signal conversion module or the blocking execution module and the star-sealing enable signal FX is low, the electronic star-sealing is executed at this time. Due to the pull-up resistor at the output of the buffer, the DRIVE_UP, PWM_UP, PWM_VP, and PWM_WP signals output by the star-sealing module are all high, and the P_UN, P_VN, and P_WN signals are all low.

[0072] In summary, the elevator star-sealing circuit of the present application has the following advantages:

[0073] 1. This application can cut off the power supply of the PWM drive circuit and the IGBT drive optocoupler at the same time to provide circuit redundancy.

[0074] 2. The optimization of the hardware circuit in this application can also reduce the risk of explosion of the IGBT due to conduction of the upper and lower tubes. On the basis of retaining the advantages of low hardware cost and small size, the application can use simple electronic components to further improve safety and reliability.

[0075] In addition, an elevator star sealing device is also provided in the embodiment of the present application. The device may include the elevator star sealing circuit described in any of the above embodiments.

[0076] It should be noted that the contents of the above-mentioned elevator star-sealing circuit embodiment are all applicable to the elevator star-sealing device embodiment. The functions specifically implemented by the elevator star-sealing device embodiment are the same as those of the above-mentioned elevator star-sealing circuit embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned elevator star-sealing circuit embodiment.

[0077] In addition, an embodiment of the present application further provides an elevator, which may include the elevator star sealing device as described above.

[0078] The contents of the above-mentioned elevator star-sealing device embodiment are all applicable to the present elevator embodiment. The functions specifically implemented by the present elevator embodiment are the same as those of the above-mentioned elevator star-sealing device embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned elevator star-sealing device embodiment.

[0079] and Figure 1 Corresponding to the method, an embodiment of the present application further provides a computer-readable storage medium, which stores instructions executable by a processor, and the instructions executable by the processor are used to execute the elevator star-sealing circuit when executed by the processor.

[0080] The contents of the above-mentioned elevator star-sealing circuit embodiment are all applicable to the present storage medium embodiment. The functions specifically implemented by the present storage medium embodiment are the same as those of the above-mentioned elevator star-sealing circuit embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned elevator star-sealing circuit embodiment.

[0081] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0082] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

[0083] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the described embodiments. Technical personnel familiar with the field may make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. An elevator star-sealing circuit, characterized in that: include: Signal conversion module, blocking execution module, star blocking module and inverter module; The signal conversion module is connected to the blocking execution module, and the blocking execution module and the frequency converter module are connected to the star blocking module; The signal conversion module is used to generate an enable signal according to the detected blocking signal; The blocking execution module is used to receive the first control signal and the enable signal, and when determining that the enable signal is at a low level, send the first control signal to the star blocking module; The star sealing module is used to receive the star sealing signal and adjust the first control signal to a frequency converter control signal when determining that the star sealing signal is at a low level; The inverter module is used to control the motor to perform star-sealing according to the inverter control signal.

2. According to claim 1, an elevator star-sealing circuit is characterized in that: The circuit also includes a fault monitoring module; the fault monitoring module is used to generate a blocking signal according to the first feedback signal of the signal conversion module or according to the second feedback signal of the blocking execution module; the blocking signal is used to maintain the high-level signal output of the blocking execution module.

3. According to claim 2, an elevator star-sealing circuit is characterized in that: The fault monitoring module includes a single chip microcomputer and two level conversion sub-circuits; The circuit structures of the two level conversion sub-circuits are the same; The two level conversion sub-circuits are both connected to the single chip microcomputer; Each of the level conversion sub-circuits comprises: An eleventh resistor, a twelfth resistor and a first transistor; one end of the eleventh resistor is connected to the single-chip microcomputer; the other end of the eleventh resistor is connected to the base of the first transistor; one end of the twelfth resistor and the emitter of the first transistor are connected to a 5V power supply; the other end of the twelfth resistor is connected to the base of the first transistor, and the collector of the first transistor is connected to the blocking execution module.

4. The elevator star-sealing circuit according to claim 1, characterized in that: The signal conversion module includes two signal conversion sub-circuits; the structures of the two signal conversion sub-circuits are the same; each of the signal conversion sub-circuits includes a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first optical coupler and a second optical coupler; Among them, one end of the first resistor is connected to the positive electrode of the external power supply; one end of the second resistor, one end of the first capacitor and the first pin of the first optocoupler are connected to the other end of the first resistor; the second pin of the first optocoupler, the other end of the second resistor and the other end of the first capacitor are connected to the negative electrode of the external power supply; the fourth pin of the first optocoupler is connected to the second pin of the second optocoupler, and the fourth pin of the first optocoupler is connected to the blocking execution module as the first output end of the signal conversion module; the first pin of the second optocoupler is connected to one end of the third resistor, and the other end of the third resistor is connected to a 5V power supply; one end of the fourth resistor and one end of the fifth resistor are connected to the third pin of the second optocoupler; the other end of the fourth resistor is connected to a 3.3V power supply; the other end of the fifth resistor and one end of the second capacitor are connected to the fault monitoring module as the second output end; the third pin of the second optocoupler, the third pin of the first optocoupler and the other end of the second capacitor are all grounded.

5. The elevator star-sealing circuit according to claim 1, characterized in that: The blocking execution module includes a first eight-channel tri-state buffer chip and a second eight-channel tri-state buffer chip; Each of the eight-channel tri-state buffer chips includes two enable terminals, eight signal input terminals and eight signal output terminals; The seven signal output terminals of the first eight-channel tri-state buffer chip and the seven input terminals of the second eight-channel tri-state buffer chip are connected in series one by one; the eighth signal output terminal of the first eight-channel tri-state buffer chip, the eighth signal input terminal of the first eight-channel tri-state buffer chip, the eighth signal output terminal of the second eight-channel tri-state buffer chip and the eighth signal input terminal of the second eight-channel tri-state buffer chip are connected to the fault monitoring module; The first enable terminal of the first eight-channel tri-state buffer chip is connected to the signal conversion module; the second enable terminal of the first eight-channel tri-state buffer chip is grounded; The seven signal output terminals of the second eight-channel three-state buffer chip are connected to the star sealing module.

6. The elevator star-sealing circuit according to claim 5, characterized in that: The star-blocking module includes a buffer subcircuit and an AND gate subcircuit; the buffer subcircuit and the AND gate subcircuit are both connected to the blocking execution module; the buffer subcircuit includes a third eight-channel tri-state buffer and a signal inversion subcircuit; The four signal input terminals of the third eight-channel tri-state buffer are connected to the four signal output terminals of the second eight-channel tri-state buffer chip; The other three signal output terminals of the seven signal output terminals of the second eight-channel three-state buffer chip are connected to the AND gate sub-circuit; The signal inversion subcircuit is connected to the first enable terminal of the third eight-channel tri-state buffer.

7. The elevator star-sealing circuit according to claim 6, characterized in that: The signal inversion subcircuit includes a fifteenth resistor, a sixteenth resistor and a third transistor; One end of the sixteenth resistor is connected to the star-sealing signal; the other end of the sixteenth resistor and the base of the third transistor are connected to the first enable end of the third eight-channel three-state buffer; the collector of the third transistor is connected to one end of the fifteenth resistor, and the other end of the fifteenth resistor is connected to a 5V power supply; the emitter of the third transistor is grounded.

8. The elevator star-sealing circuit according to claim 7, characterized in that: The inverter module includes: a fourth transistor, a third optocoupler, a fourth optocoupler, a fifth optocoupler, a sixth optocoupler, a seventh optocoupler and an eighth optocoupler; the AND gate subcircuit includes an AND gate chip; Any one of the optocouplers is connected to an IGBT of the elevator motor control module to control the IGBT to be turned on or off; The first pin of the third optocoupler, the first pin of the fourth optocoupler and the first pin of the fifth optocoupler are connected to the collector of the fourth triode; the second pin of the third optocoupler is connected to the second signal output terminal of the seven signal output terminals of the third eight-channel tri-state buffer; the second pin of the fourth optocoupler is connected to the third signal output terminal of the third eight-channel tri-state buffer; the second pin of the fifth optocoupler is connected to the fourth signal output terminal of the third eight-channel tri-state buffer; The second pin of the sixth optocoupler is connected to the third pin of the AND gate chip, the second pin of the seventh optocoupler is connected to the sixth pin of the AND gate chip, and the second pin of the eighth optocoupler is connected to the eighth pin of the AND gate chip; the first pin of the sixth optocoupler, the first pin of the seventh optocoupler and the first pin of the eighth optocoupler are all connected to a 5V power supply; the second pin, the fifth pin and the tenth pin of the AND gate chip are all connected to the star sealing signal; the first pin, the fourth pin and the ninth pin of the AND gate chip are connected to the second eight-channel three-state buffer chip.

9. An elevator star sealing device, characterized in that: The invention comprises the elevator star sealing circuit as described in any one of claims 1 to 8.

10. An elevator, characterized in that: It comprises the elevator star sealing device as claimed in claim 9.

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