Coordinated fault-tolerant control method
By coordinating the fault tolerance control method, it ensures that the two-stage power module operates normally when the switch tube fails and balances the DC midpoint potential, which solves the problem of insufficient fault tolerance in the existing technology, improves reliability and reduces costs.
Patent Information
- Application Number
- CN202310800662.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-30
- Publication Date
- 2024-12-31
AI Technical Summary
In the prior art, the two-stage power module has insufficient fault tolerance when the switch tube fails, resulting in a reduced power that the system can provide, and adding redundant components to improve fault tolerance will increase circuit complexity and cost.
By coordinating fault-tolerant control methods, the switching group operation mode of the subsequent circuit is controlled to ensure that the two-stage power module can still operate normally when any switch tube fails. By controlling the DC mid-point potential balance, the DC bus voltage balance is maintained to avoid increasing Redundant components.
It improves the fault tolerance and reliability of the two-stage power supply module, reduces circuit complexity and cost, and maintains the balance of DC bus voltage.
Smart Images
Figure CN119231731A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power conversion, and more particularly to a coordinated fault-tolerant control method for a two-stage power module. Background Art
[0002] Solid-state transformers (SSTs) are widely used in DC power consumption or power generation fields such as data centers, electric vehicle charging and swapping stations, photovoltaics, energy storage, etc. High reliability is an important requirement for solid-state transformers. Appropriate fault-tolerant control methods should be adopted when designing solid-state transformers to minimize downtime caused by internal equipment failures.
[0003] Switch tube failure is the main cause of failure in power electronic circuits. When a switch tube failure occurs, it can be fault-tolerantly controlled to reduce system downtime, which is beneficial to improve reliability and reduce operation and maintenance costs.
[0004] There are currently two conventional fault-tolerant control methods. The first fault-tolerant control method is to bypass the power module with the fault when a switch failure occurs in the power module. However, in the first method, as long as one switch fails, the entire power module needs to be bypassed, resulting in a reduction in the power that the system can provide and insufficient fault tolerance.
[0005] The second fault-tolerant control method is to add redundant components. When a switch failure occurs in the power module, the redundant components are used to reconstruct the circuit topology. However, the second method requires adding redundant components, which increases the circuit complexity of the power module and also increases the cost of the power module.
[0006] Therefore, it is necessary to develop a coordinated fault-tolerant control method to solve the problems faced by the prior art. Summary of the invention
[0007] One purpose of the present invention is to provide a coordinated fault-tolerant control method, wherein when any switch tube of any of the rear-stage switch groups on the first side of the rear-stage circuit of the two-stage power module fails and opens, the coordinated fault-tolerant control method is used to control the first side and the second side of the rear-stage circuit to still have the rear-stage switch groups operating normally, so that the two-stage power module can maintain normal operation, thereby improving the fault tolerance of the two-stage power module, and further improving the reliability of the two-stage power module. In addition, since there is no need to add any redundant components to achieve the fault-tolerant operation of the two-stage power module, the circuit complexity of the two-stage power module is reduced, and the cost of the two-stage power module is also reduced. Moreover, when the potential of the DC midpoint of the front-stage circuit is unbalanced due to the failure of any switch tube, the coordinated fault-tolerant control method of the present invention can control the voltage of the DC midpoint to maintain the midpoint balance, thereby maintaining the voltage balance of the DC bus.
[0008] To achieve the above-mentioned purpose, one embodiment of the present case is to provide a coordinated fault-tolerant control method, which is applied to a two-stage power supply module. The two-stage power supply module includes a front-stage circuit and a rear-stage circuit. The front-stage circuit includes a DC midpoint. The first side of the rear-stage circuit includes two rear-stage switch groups, and the second side of the rear-stage circuit includes two rear-stage switch groups. Each rear-stage switch group includes two switch tubes connected in series and operating complementary to each other. The coordinated fault-tolerant control method includes: when any switch tube of any rear-stage switch group on the first side fails, controlling the other switch tube of the rear-stage switch group where the failed switch tube is located to stop operating; controlling the other rear-stage switch group on the first side to operate normally; controlling one of the two rear-stage switch groups on the second side to operate normally and the other rear-stage switch group to stop operating; and when the potential of the DC midpoint of the front-stage circuit is unbalanced due to a switch tube failure, controlling the potential balance of the DC midpoint.
[0009] To achieve the above-mentioned purpose, another embodiment of the present case is to provide a coordinated fault-tolerant control method, which is applied to a power supply system, wherein the power supply system includes a plurality of two-stage power supply modules, each of the two-stage power supply modules includes a front-stage power supply circuit and a rear-stage circuit, the front-stage circuit includes a DC midpoint, the first side of the rear-stage circuit includes two rear-stage switch groups, the second side of the rear-stage circuit includes two rear-stage switch groups, each rear-stage switch group includes two switch tubes connected in series and operating complementary, and all the front-stage circuits of the plurality of two-stage power supply modules are connected in series, and all the rear-stage circuits of the plurality of two-stage power supply modules are connected in parallel, and the coordinated fault-tolerant control method includes: when any switch of any rear-stage switch group on the first side of the rear-stage circuit of any two-stage power supply module is When a shut-off tube fails, the other switch tube of the subsequent switch group where the failed switch tube is located is controlled to stop operating; the other subsequent switch group on the first side of the subsequent circuit of the same two-stage power supply module as the subsequent switch group containing the failed switch tube is controlled to operate normally; one of the two subsequent switch groups on the second side of the subsequent circuit of the same two-stage power supply module as the subsequent switch group containing the failed switch tube is controlled to operate normally while the other subsequent switch group stops operating; and when the potential of the DC midpoint of the front-stage circuit of any two-stage power supply module is unbalanced due to the failure of the switch tube of any corresponding rear-stage switch group, the potential balance of the DC midpoint of the front-stage circuit of the two-stage power supply module with the switch tube failure is controlled. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 A schematic flow chart of the steps of the coordinated fault-tolerant control method of the first preferred embodiment of the present invention;
[0011] Figure 2A for Figure 1 A schematic diagram of the circuit structure of a two-stage power supply module used in the coordinated fault-tolerant control method shown;
[0012] Figure 2B for Figure 1 A schematic diagram of the circuit structure of a two-stage power supply module used in the coordinated fault-tolerant control method shown;
[0013] Figure 3A , Figure 3B , Figure 3C , Figure 3D and Figure 3E They are Figure 2A The circuit structure diagram of the front-stage circuit shown in different implementation modes;
[0014] Figure 4A , Figure 4B , Figure 4C and Figure 4D They are Figure 2A A schematic diagram of the circuit structure of one side of the rear stage circuit connected to the front stage circuit in different implementation modes;
[0015] Figure 5A for Figure 1 A schematic flow chart of steps of a method for controlling the potential balance of a DC midpoint in a coordinated fault-tolerant control method shown;
[0016] Figure 5B for Figure 5A The control block diagram of the DC midpoint potential balancing method shown;
[0017] Figure 5C for Figure 5B Detailed diagram of the mid-point balance control circuit;
[0018] Fig. 6A for Figure 2A The voltage and current waveform diagram of the two-stage power module shown;
[0019] Figure 6B Show Figure 2A The waveform diagram of the capacitor voltage when the front stage circuit does not perform midpoint balance control is shown;
[0020] Figure 6C Show Figure 2A The waveform diagram of the capacitor voltage when the front-stage circuit shown is performing midpoint balance control;
[0021] Fig. 7A A schematic diagram of the steps of the coordinated fault-tolerant control method of the second embodiment of the present invention;
[0022] Figure 7B is a control block diagram of the front-stage circuit of the second embodiment of the present case;
[0023] Figure 8 for Fig. 7A A schematic diagram of the circuit structure of a power supply system to which the coordinated fault-tolerant control method is applied;
[0024] Fig.9A Show Figure 8 The schematic diagram of the voltage and current waveforms of the power supply system shown;
[0025] Fig. 9B Show Figure 8 A schematic diagram of voltage and current waveforms of the first power module in the power system shown;
[0026] Fig. 9C Show Figure 8 A schematic diagram of voltage and current waveforms of a second power module in the power system shown;
[0027] Fig.9D Show Figure 8 The waveform diagram of voltage and current of the third power module in the power supply system shown is shown.
[0028] The reference numerals are described as follows:
[0029] 1: Two-stage power module
[0030] 2: Pre-stage circuit
[0031] 3: Post-stage circuit
[0032] Ce: DC midpoint
[0033] 30: First post-stage switch group
[0034] 31: Second post-stage switch group
[0035] 32: The third post-stage switch group
[0036] 33: The fourth post-stage switch group
[0037] S1: The first switch
[0038] S2: The second switch
[0039] S3: The third switch
[0040] S4: The fourth switch
[0041] S5: The fifth switch
[0042] S6: The sixth switch
[0043] S7: Seven switch tubes
[0044] S8: The eighth switch
[0045] S1~S4, S10~S40: Steps of coordinated fault-tolerant control method
[0046] T: Transformer
[0047] T1: First AC terminal
[0048] T2: Second AC terminal
[0049] 20: Pre-stage power conversion unit
[0050] C1: First capacitor
[0051] C2: Second capacitor
[0052] T3: First DC terminal
[0053] T4: Second DC terminal
[0054] T5: The third DC terminal
[0055] AC: alternating current source
[0056] S41~S46: Method for controlling the potential balance of DC midpoint
[0057] v dcp : The voltage of the first capacitor
[0058] v dcn : The voltage of the second capacitor
[0059] I Lr : Resonant current
[0060] v ac : AC voltage
[0061] Vo, Vo1: output voltage
[0062] i dc1 : First current
[0063] i dc2 : Second current
[0064] 4: Power system
[0065] 21: Pre-stage sub-circuit
[0066] v abref : Modulation voltage
[0067] S F : Feedback signal
[0068] v dcref : Bus voltage reference value
[0069] I acref : AC current reference value
[0070] I ac : AC current DETAILED DESCRIPTION
[0071] Some typical embodiments that embody the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various changes in different states without departing from the scope of the present invention, and the descriptions and drawings therein are essentially used as illustrations rather than to limit the present invention.
[0072] See also Figure 1 , Figure 2A and Figure 2B ,in Figure 1 This is a schematic diagram of the steps of the coordinated fault-tolerant control method of the first preferred embodiment of the present invention. Figure 2A for Figure 1 The schematic diagram of the circuit structure of the two-stage power supply module used in the coordinated fault-tolerant control method shown in FIG. Figure 2B for Figure 1 The circuit structure diagram of the two-stage power supply module used in the coordinated fault-tolerant control method shown is shown. Figure 1 The coordinated fault-tolerant control method of this embodiment shown in the figure can be applied to Figure 2A and Figure 2B The controller (not shown) of the two-stage power module 1 shown in FIG. The two-stage power module 1 includes a front-stage circuit 2 and a rear-stage circuit 3. The front-stage circuit 2 includes a DC midpoint Ce. The rear-stage circuit 3 includes a first side and a second side. Figure 2A As shown, the first side of the rear stage circuit 3 is electrically connected between the front stage circuit 2 and the primary winding of the transformer T, and includes two rear stage switch groups, such as the first rear stage switch group 30 and the second rear stage switch group 31, wherein the first rear stage switch group 30 and the second rear stage switch group 31 are connected in series. The second side of the rear stage circuit 3 is electrically connected to the secondary winding of the transformer T, and includes two rear stage switch groups, such as the third rear stage switch group 32 and the fourth rear stage switch group 33, wherein the third rear stage switch group 32 and the fourth rear stage switch group 33 are connected in parallel. Figure 2BAs shown, the second side of the rear stage circuit 3 is electrically connected between the front stage circuit 2 and the primary winding of the transformer T, and includes two rear stage switch groups, such as a first rear stage switch group 30 and a second rear stage switch group 31, wherein the first rear stage switch group 30 and the second rear stage switch group 31 are connected in series. The first side of the rear stage circuit 3 is electrically connected to the secondary winding of the transformer T, and includes two rear stage switch groups, such as a third rear stage switch group 32 and a fourth rear stage switch group 33, wherein the third rear stage switch group 32 and the fourth rear stage switch group 33 are connected in parallel. Each rear stage switch group further includes two switch tubes connected in series and operating complementary to each other, such as the first rear stage switch group 30 includes a first switch tube S1 and a second switch tube S2, the second rear stage switch group 31 includes a third switch tube S3 and a fourth switch tube S4, the third rear stage switch group 32 includes a fifth switch tube S5 and a sixth switch tube S6, and the fourth rear stage switch group 3 includes a seventh switch tube S7 and an eighth switch tube S8. The first side works in the inverter mode as an inverter circuit, and the second side works in the rectifier mode as a rectifier circuit; or the first side works in the rectifier mode as a rectifier circuit, and the second side works in the inverter mode as an inverter circuit.
[0073] like Figure 1 As shown, the coordinated fault-tolerant control method of this embodiment includes the following steps.
[0074] Step S1, when any switch tube of any of the subsequent switch groups (the first subsequent switch group 30 or the second subsequent switch group 31) on the first side of the subsequent circuit 3 fails, for example, an open circuit failure occurs in the switch tube, the controller controls another switch tube of the subsequent switch group where the failed switch tube is located to close. For example, the other switch tube is always turned on, similar to a wire, and no high-frequency switching is performed.
[0075] Step S2, the controller controls another rear-stage switch group (ie, a rear-stage switch group with two normal switches) on the first side of the rear-stage circuit 3 to operate normally. Specifically, the other rear-stage switch group performs high-frequency switching to obtain the required voltage and current.
[0076] In step S3, the controller controls one of the two rear-stage switch groups (the third rear-stage switch group 32 and the fourth rear-stage switch group 33) on the second side of the rear-stage circuit 3 to operate normally while the other rear-stage switch group stops operating. It should be noted that the stopping of operation here refers to stopping high-frequency switching. For example, one of the rear-stage switch groups performs high-frequency switching to obtain the required voltage and current, one switch tube of the other rear-stage switch group is constantly turned on similar to a wire, and the other switch tube is constantly turned off, and then the two rear-stage switch groups on the second side are switched from a full-bridge circuit to a half-bridge circuit.
[0077] Step S4, when the potential of the DC midpoint Ce of the front-stage circuit 2 is unbalanced due to a failure of any switch tube, the potential of the DC midpoint Ce is controlled to be balanced.
[0078] In some embodiments, the two-stage power module 1 includes a controller, and the methods described in steps S1-S4 are implemented by the controller. In other embodiments, the two-stage power module 1 includes multiple controllers, for example, a front-stage controller and a rear-stage controller, wherein the methods described in steps S1-S3 are implemented by the rear-stage controller, and the method described in step S4 is implemented by the front-stage controller.
[0079] See also Figure 1 and Figure 2A , when the first switch tube S1 on the first side of the rear-stage circuit 3 fails, for example, an open circuit failure occurs, the controller controls the second switch tube S2 to stop running, that is, to be constantly turned on, and controls the third switch tube S3 and the fourth switch tube S4 to perform high-frequency switching. At the same time, the controller controls the fifth switch tube S5 and the sixth switch tube S6 on the second side of the rear-stage circuit 3 to perform high-frequency switching, and the seventh switch tube S7 and the eighth switch tube S8 to stop high-frequency switching. Or the controller controls the seventh switch tube S7 and the eighth switch tube S8 on the second side of the rear-stage circuit 3 to perform high-frequency switching, and the fifth switch tube S5 and the sixth switch tube S6 to stop high-frequency switching. When the second switch tube S2, the third switch tube S3 or the fourth switch tube S4 on the first side fails, the control method is similar and will not be repeated here.
[0080] See also Figure 1 and Figure 2B , when the fifth switch tube S5 on the first side of the rear-stage circuit 3 fails, for example, an open circuit failure occurs, the controller controls the sixth switch tube S6 to stop running, that is, to be constantly turned on, and controls the seventh switch tube S7 and the eighth switch tube S8 to perform high-frequency switching. At the same time, the controller controls the first switch tube S1 and the second switch tube S2 on the second side of the rear-stage circuit 3 to switch at high frequency, and the third switch tube S3 and the fourth switch tube S4 to stop switching at high frequency. Or the controller controls the third switch tube S3 and the fourth switch tube S4 on the second side of the rear-stage circuit 3 to switch at high frequency, and the first switch tube S1 and the second switch tube S2 to stop switching at high frequency. When the sixth switch tube S6, the seventh switch tube S7 or the eighth switch tube S8 on the first side fails, the control method is similar and will not be repeated here.
[0081] It should be noted that the above-mentioned switch tube fault may be a switch tube open circuit fault, or a converted open circuit fault. For example, a switch device equipped with a fast fuse can convert a short circuit fault into an open circuit fault.
[0082] In this embodiment, since a coordinated fault-tolerant control method is used in the two-stage power supply module 1, when any switch tube of any of the rear-stage switch groups on the first side of the rear-stage circuit 3 fails, the rear-stage switch groups on the first side and the second side of the rear-stage circuit 3 still operate normally, so that the two-stage power supply module 1 maintains normal operation, improves the fault tolerance of the two-stage power supply module 1, and thus improves the reliability of the two-stage power supply module 1. In addition, since there is no need to add any redundant components to achieve the fault-tolerant operation of the two-stage power supply module 1, the circuit complexity of the two-stage power supply module 1 is reduced, and the cost of the two-stage power supply module 1 is also reduced. Moreover, since the coordinated fault-tolerant control method of this case controls the potential of the DC midpoint Ce of the front-stage circuit 2 to remain balanced when the potential is unbalanced due to the failure of any switch tube, the voltage balance of the DC bus is maintained.
[0083] In some embodiments, the front-stage circuit 2 further includes a first AC terminal T1, a second AC terminal T2, a front-stage power conversion unit 20, a first capacitor C1, a second capacitor C2, a first DC terminal T3, a second DC terminal T4, and a third DC terminal T5, and the first AC terminal T1 and the second AC terminal T2 are electrically connected to an AC source AC. The front-stage power conversion unit 20 includes a first bridge arm and a second bridge arm. The first bridge arm and the second bridge arm are electrically connected in series between the first AC terminal T1 and the second AC terminal T2. The first capacitor C1 is electrically connected between the first DC terminal T3 and the DC midpoint Ce, the second capacitor C2 is electrically connected between the DC midpoint Ce and the third DC terminal T5, and the second DC terminal T4 is electrically connected to the DC midpoint Ce.
[0084] In this embodiment, Figure 2A The front stage circuit 2 shown is a three-level high power factor converter circuit (HIGH POWERFACTOR CONVERTER, HPFC), Figure 2A The inverter circuit of the rear stage circuit 3 is a series half bridge (SHB) inverter circuit, but the inverter circuits of the front stage circuit 2 and the rear stage circuit 3 can have different implementations according to actual needs, which will be exemplified below.
[0085] See also Figure 3A , Figure 3B , Figure 3C , 3D and Figure 3E , which are Figure 2A-2B The circuit structure diagram of the front-stage circuit in different implementation modes is shown in FIG. Figure 3A As shown, the front stage circuit 2 can be a T-type three-level converter. Figure 3B As shown, the front stage circuit 2 can be a three-level boost power factor converter. Figure 3CAs shown, the front stage circuit 2 can be a diode neutral point clamped converter (DIODE NEUTRAL POINT CLAMPED CONVERTER, DNPC). Figure 3D As shown, the front-stage circuit 2 can be an active-neutral-point-clamped converter (ACTIVE-NEUTRAL-POINT-CLAMPED, ANPC). Figure 3E As shown, the front stage circuit 2 includes two independent front stage sub-circuits 21 and 22. The front stage circuit 2 of the present invention may also include other variations, as long as the midpoint balance control can be achieved so that the current of the bus capacitor corresponding to the input fault bridge arm is zero.
[0086] See also Figure 4A , Figure 4B , Figure 4C and Figure 4D , which are Figure 2A-2B Schematic diagram of the circuit structure of one side of the rear stage circuit connected to the front stage circuit in different implementation modes. In some embodiments, Figure 4A As shown, the side of the rear stage circuit 3 connected to the front stage circuit 2 can be a T-type three-level converter. Figure 4B As shown, the side of the rear stage circuit 3 connected to the front stage circuit 2 can be a diode neutral point clamped converter (DIODE NEUTRAL POINT CLAMPED, DNPC). Figure 4C As shown, the side of the rear stage circuit 3 connected to the front stage circuit 2 can be an active midpoint clamped half-bridge converter. Figure 4D As shown, the side of the subsequent stage circuit 3 connected to the previous stage circuit 2 may be an active midpoint clamped converter.
[0087] by Figure 2A Take this as an example to explain the method of midpoint balance control of the front-stage three-level circuit when the two-stage power module performs coordinated fault-tolerant control of the front and rear stages. Figure 5A , Figure 5B and Figure 5C ,in Figure 5A for Figure 1 The schematic flow chart of the steps of the method for controlling the potential balance of the DC midpoint in the coordinated fault-tolerant control method shown in FIG. Figure 5B for Figure 2A The control block diagram of the front-stage circuit of the power module shown in the figure is as follows: Figure 5C for Figure 5B Detailed diagram of the midpoint balance control circuit in FIG. In some embodiments, Figure 1 The method of controlling the potential balance of the DC midpoint in step S4 of the coordinated fault-tolerant control method shown includes the following steps.
[0088] Step S41, obtaining a modulation voltage to be modulated between the first AC terminal T1 and the second AC terminal T2.
[0089] Step S42, acquiring the voltage of the first capacitor C1 and the voltage of the second capacitor C2, and obtaining a common mode voltage according to the voltage of the first capacitor C1 and the voltage of the second capacitor C2.
[0090] Step S43, obtaining the current of the first DC terminal T3 and the current of the third DC terminal T5, and distributing the modulation voltage to the first bridge arm and the second bridge arm of the front-stage power conversion unit 20 according to the current of the first DC terminal T3 and the current of the third DC terminal T5 to obtain the first distributed voltage and the second distributed voltage.
[0091] Step S44: superimpose the common mode voltage on the first distributed voltage to obtain a first bridge arm reference voltage, and superimpose the common mode voltage on the second distributed voltage to obtain a second bridge arm reference voltage.
[0092] Step S45, obtaining the duty cycle of the first bridge arm according to the first bridge arm reference voltage and the voltage of the first capacitor C1, and obtaining the duty cycle of the second bridge arm according to the second bridge arm reference voltage and the voltage of the second capacitor C2.
[0093] Step S46, controlling the operation of the first bridge arm according to the duty cycle of the first bridge arm, and controlling the operation of the second bridge arm according to the duty cycle of the second bridge arm, so that the potential of the DC midpoint Ce is balanced.
[0094] In some embodiments, please refer to Figure 5A and Figure 5B , illustrating the specific implementation method of step S41. The phase-locked circuit 41 is configured to: modulate the voltage v between the first AC terminal T1 and the second AC terminal T2 abref Phase locking is performed to obtain a feedback signal S F The voltage control circuit 42 is configured to obtain the voltage v of the first capacitor C1. dcp , the voltage v of the second capacitor C2 dcn , bus voltage reference value v dcref And the feedback signal S F ; The voltage v of the first capacitor C1 dcp and the voltage v of the second capacitor C2 dcn Add together to get the bus voltage; bus voltage reference value v dcref Subtract the actual bus voltage to obtain a first error signal; adjust the first error signal to obtain a first reference signal; and superimpose the first reference signal with a feedback signal S F Get the AC current reference value I acref The current control circuit 43 is configured to receive an alternating current I ac , AC current reference value I acref And the AC voltage v ac ; Set the AC current reference value I acref Subtract the actual AC current Iac obtain a second error signal; adjust the second error signal to obtain a second reference signal; and an AC voltage v ac Subtract the second reference signal to get the modulation voltage v abref .
[0095] In some embodiments, the midpoint potential control circuit 44 is configured to: obtain the voltage V dcp , the voltage v of the second capacitor C2 dcn , modulation voltage V abref , the current i of the first DC terminal T3 dc1 and the current i of the third DC terminal T5 dc2 .
[0096] In some embodiments, please refer to Figure 5A , Figure 5B and Figure 5C , illustrating the specific implementation method of step S42. The midpoint potential control circuit 44 is also configured to: calculate the voltage v of the first capacitor C1 dcp and the second capacitor C2 voltage v dcn The difference between the two is calculated and adjusted to obtain the common-mode voltage v com . Common mode voltage v com The expression is: where v ao is the first distribution voltage, v bo A voltage is allocated to the second.
[0097] In some embodiments, please refer to Figure 5A , Figure 5B and Figure 5C , illustrating the specific implementation method of step S43. The midpoint potential control circuit 44 is further configured to: calculate the first distributed voltage v ao and the second distribution voltage v bo The first distribution voltage v bo and the second distribution voltage v bo The expression is:
[0098]
[0099]
[0100] In some embodiments, please refer to Figure 5A , Figure 5B and Figure 5C , illustrating the specific implementation method of step S44. The midpoint potential control circuit 44 is further configured to: convert the first distributed voltage v ao Superimposed common mode voltage v com , to get the first bridge arm reference voltage v aoref , the second distribution voltage vbo Superimposed common mode voltage v com , to get the second bridge arm reference voltage v boref .
[0101] In some embodiments, please refer to Figure 5A and Figure 5B , illustrating the specific implementation method of step S45. The driving circuit 45 is configured to: ac , the voltage v of the first capacitor C1 dcp , the voltage v of the second capacitor C2 dcn , the first bridge arm reference voltage v aoref and the second bridge arm reference voltage v boref ; Calculate the duty cycle d1 of the first bridge arm and the duty cycle d2 of the second bridge arm. The expressions of the duty cycle d1 of the first bridge arm and the duty cycle d2 of the second bridge arm are:
[0102]
[0103]
[0104] In some embodiments, please refer to Figure 5A and Figure 5B , illustrating a specific implementation method of step S46. The driving circuit 45 is further configured to: output a switch signal to control the operation of the first bridge arm and the second bridge arm according to the duty cycle d1 and the duty cycle d2.
[0105] It should be noted that the above steps S1-S3, steps S41-S46 and Figure 5B The control architecture in the embodiment is implemented by the controller of the power module 1, or the above steps S1-S3 are implemented by the post-stage controller of the power module 1, and steps S41-S46 and Figure 5B The control architecture in is implemented by the front-stage controller of the power module 1. The controller of the power module 1 or the front-stage controller and the back-stage controller of the power module 1 can be implemented, for example but not limited to, by a control chip. In some embodiments, the controller, or the front-stage controller and the back-stage controller are implemented by a DSP control chip and an FPGA control chip, wherein the DSP control chip is responsible for signal sampling and loop control, such as realizing the functions of a phase-locked circuit, a voltage control circuit, a current control circuit, and a midpoint potential control circuit, and the FPGA control chip completes signal modulation and generates a drive signal for a switch tube, such as realizing the function of a drive circuit.
[0106] In some embodiments, the first bridge arm of the pre-stage conversion unit 20 includes a switch tube, or Figure 2A-2BAs shown, it includes two switch tubes connected in series and operating in a complementary manner. In addition, in step S56, the switch operation of the switch tube in the first bridge arm is controlled according to the duty cycle of the first bridge arm. The second bridge arm of the front-stage conversion unit 20 includes a switch tube, or as shown in FIG. Figure 2A As shown, it includes two switch tubes connected in series and operating complementary to each other. In addition, in step S56, the switching operation of the switch tube in the second bridge arm is controlled according to the duty cycle of the second bridge arm.
[0107] In some embodiments, the coordinated fault-tolerant control method further comprises: step S5, when any switch tube of any subsequent switch group of the first side of the subsequent circuit 3 fails and opens, reducing the AC voltage v of the AC source AC received by the previous stage conversion unit 20 at the first AC terminal T1 and the second AC terminal T2 ac In addition, the execution order of step S5 of the coordinated fault-tolerant control method can be before steps S1 to S4, after steps S1 to S4, or between any two steps of steps S1 to S4.
[0108] In some embodiments, when any switch tube of any subsequent switch group of the first side of the subsequent power supply circuit 3 fails and opens, the first current i flowing through the first DC terminal T3 dc1 and the second current i flowing through the third DC terminal T5 dc2 The current unbalance between them is greater than 50%. However, the coordinated fault-tolerant control method of the present invention can effectively achieve midpoint potential balance when the current unbalance is greater than 50%.
[0109] by Figure 2A In the two-stage three-level power supply module shown, when the first switch tube S1 of the rear-stage circuit 3 has an open circuit fault, the second switch tube S2 is closed, so that the first side (i.e., the inverter side) of the rear-stage circuit 3 is left with only half-bridge operation, and at the same time, the second side (i.e., the rectifier side) of the rear-stage circuit 3 closes the eighth switch tube S8, so that the output voltage meets the requirements, and at the same time, the front-stage circuit 2 performs midpoint balance control. Similarly, it can support fault-tolerant operation of open circuit faults of the second switch tube S2, the third switch tube S3, and the fourth switch tube S4. When a switch tube on the rectifier side fails, its complementary tube is closed, the rectifier side is switched to half-bridge mode, and the inverter side is also switched to half-bridge mode.
[0110] The advantage is that it can achieve fault-tolerant operation of any switch failure in the two-stage three-level power module, thereby improving system reliability.
[0111] Please refer to Fig. 6A , which is Figure 2AThe voltage and current waveform diagram of the two-stage power supply module shown is shown. The front-stage circuit 2 controls the midpoint balance according to the aforementioned method, while the rear-stage circuit 3 is an LLC resonant converter, which adopts primary-side frequency modulation and secondary-side uncontrolled rectification. At time t=200ms, the first switch tube S1 on the first side of the rear-stage circuit 3 has an open circuit fault, and the complementary second switch tube S2 is closed, then the first side of the rear-stage circuit 3 becomes a half-bridge circuit to work, and at the same time, the eighth switch tube S8 on the second side of the rear-stage circuit 3 is closed, and the second side of the rear-stage circuit 3 performs voltage doubling rectification so that the output voltage meets the requirements, and at the same time, the midpoint balance of the front-stage circuit 2 is controlled. By Fig. 6A As shown in the figure, after time t = 200ms, the two-stage power supply module 1 can tolerate faults and still operate normally, and the AC voltage v ac For example, the voltage drops from 1000V before the fault to 500V, and the AC input current I ac remains unchanged, only the input power decreases; the voltage v of the first capacitor C1 dcp and the voltage v of the second capacitor C2 dcn The midpoint potential is basically equal, and the current flowing into the DC midpoint Ce is zero. Fig. 6A , the current I flowing through the resonant inductor of the subsequent circuit 3 Lr The output voltage Vo of the two-stage power supply module 1 remains unchanged, that is, the output voltage Vo meets the demand, and only the output power decreases with the input power. Similarly, the fault-tolerant operation of the open circuit faults of the second switch tube S2, the third switch tube S3, and the fourth switch tube S4 can be supported; when a switch tube on the second side of the rear-stage circuit 3 fails, its complementary tube is closed, the first side of the rear-stage circuit 3 is switched to a half-bridge circuit, and the second side of the rear-stage circuit 3 is also switched to a half-bridge circuit. The present invention can realize the fault-tolerant operation of any switch tube failure of the two-stage three-level power supply module, thereby improving the system reliability.
[0112] Figure 6B Show Figure 2A The waveform diagram of the capacitor voltage when the front-stage circuit does not perform midpoint balance control is shown. Figure 6C Show Figure 2A-2B The waveform diagram of the capacitor voltage when the front stage circuit performs midpoint balance control is shown in the figure. Figure 6B ,if Figure 2A-2B The front stage circuit 2 shown does not perform midpoint balance control, and the voltage v of the first capacitor C1 dcp and the voltage v of the second capacitor C2 dcn The difference is large, and the midpoint imbalance is greater than 50%, until the power module 1 fails. Figure 6C , Figure 2A-2B The front stage circuit 2 shown in the figure performs midpoint balance control, and the voltage v of the first capacitor C1 dcp The voltage v of the second capacitor C2 dcnIt is basically equal and the control speed is fast. It can be seen that when the current imbalance is large (for example, greater than 50%), the method of distributing the bridge arm voltage according to the current can effectively control the midpoint balance of the DC bus capacitor voltage.
[0113] See also Fig. 7A , Figure 7B and Figure 8 ,in Fig. 7A This is a schematic diagram of the steps of the coordinated fault-tolerant control method of the second preferred embodiment of the present invention. Figure 7B This is a control block diagram of the front-stage circuit of the second preferred embodiment of the present invention. Figure 8 for Fig. 7A A circuit structure diagram of a power supply system to which the coordinated fault-tolerant control method is applied is shown. Fig. 7A The coordinated fault-tolerant control method shown can be applied to Figure 8 In the controller (not shown) of the power system 4 shown, the power system 4 includes a plurality of two-stage power modules 1, and the circuit structure of each two-stage power module 1 can be similar to Figure 2A-2B The two-stage power module 1 shown is not limited thereto and may be implemented in various forms as mentioned above. In addition, all the front-stage circuits of the multiple two-stage power modules 1 of the power system 4 are electrically connected in series, and all the rear-stage circuits of the multiple two-stage power modules 1 of the power system 4 are electrically connected in parallel.
[0114] like Fig. 7A As shown, the coordinated fault-tolerant control method of this embodiment includes the following steps.
[0115] Step S10, when any switch tube of any subsequent switch group of the first side of the subsequent circuit 3 of any two-stage power module 1 fails, another switch tube of the subsequent switch group where the failed switch tube is located is controlled to be closed.
[0116] Step S20 , controlling another subsequent switch group located at the first side of the subsequent circuit of the same two-stage power supply module 1 as the subsequent switch group including the faulty switch tube to operate normally.
[0117] Step S30, controlling one of the two subsequent switch groups located on the second side of the subsequent circuit 3 of the same two-stage power module 1 as the subsequent switch group containing the faulty switch tube to operate normally while the other subsequent switch group stops operating.
[0118] Step S40, when the potential of the DC midpoint Ce of the front-stage circuit 2 of any two-stage power module 1 is unbalanced due to a failure of any switch tube of any corresponding rear-stage switch group, control the potential balance of the DC midpoint Ce of the front-stage circuit of the two-stage power module 1 where the switch tube fails.
[0119] Figure 7B The control block diagram and Figure 5B The difference is that a front-stage bridge arm voltage anti-droop control circuit 46 is added to the front-stage control of the power module 1 in the power system 4. The anti-droop control circuit 46 is configured to: obtain the bridge arm voltage v b , bridge arm voltage setting value v bset And bus voltage setting value v dcset ; Bridge arm voltage setting value v bset Subtract the bridge arm voltage v b obtain a third error signal; adjust the third error signal to obtain a third reference signal; and a bus voltage setting value v dcset Subtract the third reference signal to obtain the bus voltage reference value v dcref When a switch failure occurs in a power module 1, the anti-droop control circuit 46 corresponding to the faulty power module reduces the bridge arm voltage setting value v of the faulty power module 1. bset , the anti-droop control circuit 46 corresponding to the normal power module 1 increases the bridge arm voltage setting value v of the normal power module 1 bset . Accordingly, the bus voltage anti-droop control will be added to the control architecture of the subsequent circuit 3. When all power modules 1 in the power system 4 are operating normally, the input voltage is distributed to multiple power modules 1 according to 1:1:…:1. When a switch tube failure occurs in a power module 1, for example, a switch tube failure occurs in the last power module 1, the input voltage is distributed to multiple power modules 1 according to 1:1:…:0.5. The fault-tolerant operation of the power module improves the system reliability. For example, when the N+1 redundancy mode is adopted, the power system 4 changes from allowing one power module failure to allowing two power module failures.
[0120] Figure 8 The power supply system 4 shown includes three power supply modules 1 as an example. Fig.9A Show Figure 8 Schematic diagram of voltage and current waveforms of the power supply system shown. Fig. 9B Show Figure 8 The waveform diagram of voltage and current of the first power module in the power supply system is shown. Fig. 9C Show Figure 8 The waveform diagram of voltage and current of the second power module in the power supply system shown is shown. Fig.9D Show Figure 8The waveform diagram of the voltage and current of the third power module in the power supply system shown in FIG. 1 is a schematic diagram. At t=300ms, the first switch tube S1 on the first side of the rear stage circuit of the second power module has an open circuit fault, and the second switch tube S2 on the first side and the eighth switch tube S8 on the first side are closed to perform midpoint balance control on the front stage circuit. The first switch tube S1 on the first side of the rear stage circuit of the third power module has an open circuit fault, and similarly, the second switch tube S2 on the first side and the eighth switch tube S8 on the first side are closed to perform midpoint balance control on the front stage circuit. Please refer to Fig.9A When both the second power module and the third power module fail, the input voltage v of the power system 4 ac and input current I ac remains unchanged, the input power remains unchanged; the output voltage V o For example, 800V and output current i o remains unchanged, the output power remains unchanged. Fig. 9B , the first power module is not faulty, increase the input voltage v of the first power module in For example, if the input voltage amplitude increases from 1000V to 1500V, the input power allocated to the first power module increases, and the voltage v of the first capacitor C1 increases. dcp and the voltage v of the second capacitor C2 dcn Basically equal, for example, equal to 800V, the resonant current I Lr and the excitation current i LM Remain unchanged. See Fig. 9C , the second power module fails, reduce the input voltage v of the second power module in For example, if the input voltage amplitude decreases from 1000V to 500V, the input power allocated to the second power module decreases, and the voltage v of the first capacitor C1 decreases. dcp and the voltage v of the second capacitor C2 dcn Basically equal, for example, equal to 800V, the midpoint potential is balanced, and the resonant current and excitation current are reduced. Fig.9D , the third power module fails, reduce the input voltage v of the third power module in For example, if the input voltage amplitude decreases from 1000V to 500V, the input power allocated to the third power module decreases, and the voltage v of the first capacitor C1 dcp and the voltage v of the second capacitor C2 dcn Basically equal, for example, equal to 800V, the midpoint potential is balanced, and the resonant current and excitation current are reduced. Figure 9A-9DIt can be seen that at time t=300ms, both power modules have switch failures, the power system 4 can tolerate faults and still operate normally, the voltage of the first capacitor and the voltage of the second capacitor of all two-stage power modules 1 are basically equal, and the midpoint potential is balanced. Therefore, after two power modules in the power system 4 fail, the power system 4 can still operate with fault tolerance, which improves the fault tolerance of the power system.
[0121] The 2+1 redundant system is taken as an example to illustrate that the fault tolerance of the power supply system using the front-end and rear-end coordinated control fault-tolerant method of the present invention is increased. In the existing 2+1 redundant system, when a switch tube failure occurs in a power module, the faulty power module is bypassed, and the redundant power module is put into operation to replace the faulty power module. Only one power module is allowed to fail, and when both power modules fail, the system can only be shut down. In the 2+1 redundant system using the front-end and rear-end coordinated control fault-tolerant method of the present invention, when a switch tube failure occurs in a power module, the faulty power module is allowed to operate at a reduced power, for example, the output power is reduced to half of the original, and the redundant power module is put into operation to provide the power difference. The redundant power module is at least sufficient to provide the power difference generated when two power modules fail. Therefore, when the two-stage power supply module adopts the front-end and rear-end coordinated control fault-tolerant method of the present invention, two power modules are allowed to fail in the N+1 cascade system, thereby improving the reliability of the system.
[0122] In summary, the present case provides a coordinated fault-tolerant control method, which is applied to a two-stage power supply module. When any switch tube of any of the rear-stage switch groups on the first side of the rear-stage power supply circuit of the two-stage power supply module fails, the rear-stage switch groups on the first side and the second side of the rear-stage power supply circuit still operate normally, so that the two-stage power supply module maintains normal operation, thereby improving the fault tolerance of the two-stage power supply module, and further improving the reliability of the two-stage power supply module. In addition, since there is no need to add any redundant components to achieve the fault-tolerant operation of the two-stage power supply module, the circuit complexity of the two-stage power supply module is reduced, and the cost of the two-stage power supply module is also reduced. What's more, since the coordinated fault-tolerant control method of the present case is to control the potential balance of the DC midpoint when the potential of the DC midpoint of the front-stage circuit is unbalanced due to the failure of any switch tube, the voltage balance of the DC bus is maintained.
Claims
1. A coordinated fault-tolerant control method, applied to a two-stage power module, the two-stage power module comprising a front-stage circuit and a rear-stage circuit, the front-stage circuit comprising a DC midpoint, a first side of the rear-stage circuit comprising two rear-stage switch groups, a second side of the rear-stage circuit comprising two rear-stage switch groups, each of the rear-stage switch groups comprising two switch tubes connected in series and operating complementary to each other, the coordinated fault-tolerant control method comprising: When any switch tube of any of the subsequent switch groups on the first side fails, another switch tube of the subsequent switch group where the failed switch tube is located is controlled to stop operating; Control the other rear-stage switch group on the first side to operate normally; Controlling one of the two rear-stage switch groups on the second side to operate normally while the other rear-stage switch group stops operating; and When the potential of the DC midpoint of the front-stage circuit is unbalanced due to the failure of the switch tube, the potential of the DC midpoint is controlled to be balanced.
2. A coordinated fault-tolerant control method as described in claim 1, wherein the second side is electrically connected between the previous stage circuit and the primary winding of a transformer, and the first side is electrically connected to the secondary winding of the transformer; wherein the first side operates in an inverter mode and the second side operates in a rectifier mode; or the first side operates in a rectifier mode and the second side operates in an inverter mode.
3. A coordinated fault-tolerant control method as described in claim 1, wherein the first side is electrically connected between the previous stage circuit and the primary winding of a transformer, and the second side is electrically connected to the secondary winding of the transformer; wherein the first side operates in an inverter mode and the second side operates in a rectifier mode; or the first side operates in a rectifier mode and the second side operates in an inverter mode.
4. A coordinated fault-tolerant control method as described in any one of claims 1 to 3, wherein the front-stage circuit further includes a first AC end, a second AC end, a front-stage power conversion unit, a first capacitor, a second capacitor, a first DC end, a second DC end and a third DC end, the first AC end and the second AC end are electrically connected to an AC source, the front-stage power conversion unit includes a first bridge arm and a second bridge arm, the first capacitor is electrically connected between the first DC end and the DC midpoint, the second capacitor is electrically connected between the DC midpoint and the third DC end, and the second DC end is electrically connected to the DC midpoint; wherein the modulation voltages of the first bridge arm and the second bridge arm are distributed according to the current of the first DC end and the current of the third DC end to control the potential balance of the DC midpoint.
5. A coordinated fault-tolerant control method as described in any one of claims 1 to 3, wherein the front-stage circuit further includes a first AC end, a second AC end, a front-stage power conversion unit, a first capacitor, a second capacitor, a first DC end, a second DC end and a third DC end, the first AC end and the second AC end are electrically connected to an AC source, the front-stage power conversion unit includes a first bridge arm and a second bridge arm, and the first bridge arm and the second bridge arm are electrically connected in series between the first AC end and the second AC end, the first capacitor is electrically connected between the first DC end and the DC midpoint, the second capacitor is electrically connected between the DC midpoint and the third DC end, and the second DC end is electrically connected to the DC midpoint.
6. The coordinated fault-tolerant control method as claimed in claim 5, wherein the method for controlling the potential balance of the DC midpoint comprises: Acquiring a modulation voltage between the first AC terminal and the second AC terminal; Acquiring a voltage of the first capacitor and a voltage of the second capacitor, and obtaining a common mode voltage according to the voltage of the first capacitor and the voltage of the second capacitor; Acquire the current of the first DC terminal and the current of the third DC terminal, and distribute the modulation voltage to the first bridge arm and the second bridge arm according to the current of the first DC terminal and the current of the third DC terminal to obtain a first distributed voltage and a second distributed voltage; The first distributed voltage is superimposed on the common mode voltage to obtain a first bridge arm reference voltage, and the second distributed voltage is superimposed on the common mode voltage to obtain a second bridge arm reference voltage; Obtaining the first bridge arm duty cycle according to the first bridge arm reference voltage and the voltage of the first capacitor, and obtaining the second bridge arm duty cycle according to the second bridge arm reference voltage and the voltage of the second capacitor; as well as The operation of the first bridge arm is controlled according to the duty cycle of the first bridge arm, and the operation of the second bridge arm is controlled according to the duty cycle of the second bridge arm, so that the potential of the DC midpoint is balanced. 7 . The coordinated fault-tolerant control method as claimed in claim 6 , wherein a difference between the voltage of the first capacitor and the voltage of the second capacitor is calculated, and the difference is adjusted to obtain the common mode voltage.
8. The coordinated fault-tolerant control method according to claim 6, wherein the expressions of the first distributed voltage and the second distributed voltage are: where v ao The first distribution voltage, v bo For the second distribution voltage, i dc1 is the current at the first DC terminal, i dc2 is the current at the third DC terminal, v abref is the modulation voltage; The expressions of the first bridge arm duty cycle d1 and the second bridge arm duty cycle d2 are: where v aoref is the reference voltage of the first bridge arm, v boref is the reference voltage of the second bridge arm, v com is the common mode voltage, v dcp is the voltage of the first capacitor, v dcn is the voltage of the second capacitor, i ac is the current of the AC source.
9. The coordinated fault-tolerant control method as described in claim 6, wherein the first bridge arm includes one switch tube or two switch tubes connected in series and operating complementarily, and the switching operation of the switch tube in the first bridge arm is controlled according to the duty cycle of the first bridge arm; and the second bridge arm includes one switch tube or two switch tubes connected in series and operating complementarily, and the switching operation of the switch tube in the second bridge arm is controlled according to the duty cycle of the second bridge arm.
10. The coordinated fault-tolerant control method of claim 4, wherein the coordinated fault-tolerant control method further comprises: When any of the switch tubes of any of the rear-stage switch groups fails, the AC voltage received by the front-stage power conversion unit at the first AC end and the second AC end is reduced. 11 . The coordinated fault-tolerant control method of claim 4 , wherein when any of the switch tubes of any of the subsequent switch groups fails, a current imbalance between the current at the first DC end and the current at the third DC end is greater than 50%.
12. A coordinated fault-tolerant control method, applied to a power system, wherein the power system comprises a plurality of two-stage power modules, each of the two-stage power modules comprises a front-stage power circuit and a rear-stage circuit, the front-stage circuit comprises a DC midpoint, a first side of the rear-stage circuit comprises two rear-stage switch groups, a second side of the rear-stage circuit comprises two rear-stage switch groups, each of the rear-stage switch groups comprises two switch tubes connected in series and operating complementary to each other, and all the front-stage circuits of the plurality of two-stage power modules are connected in series, and all the rear-stage circuits of the plurality of two-stage power modules are connected in parallel, the coordinated fault-tolerant control method comprises: When any switch tube of any of the rear-stage switch groups on the first side of the rear-stage circuit of any of the two-stage power supply modules fails, another switch tube of the rear-stage switch group where the failed switch tube is located is controlled to stop operating; Controlling another rear-stage switch group located at the first side of the rear-stage circuit of the same two-stage power supply module as the rear-stage switch group including the faulty switch tube to operate normally; Controlling one of the two subsequent-stage switch groups located on the second side of the subsequent-stage circuit of the same two-stage power supply module as the subsequent-stage switch group including the faulty switch tube to operate normally while the other subsequent-stage switch group stops operating; and When the potential of the DC midpoint of the front-stage circuit of any of the two-stage power supply modules is unbalanced due to the failure of the switch tube of any of the corresponding rear-stage switch groups, the potential balance of the DC midpoint of the front-stage circuit of the two-stage power supply module where the switch tube failure occurs is controlled.
13. A coordinated fault-tolerant control method as described in claim 12, wherein each of the front-stage circuits further includes a first AC end, a second AC end, a front-stage power conversion unit, a first capacitor, a second capacitor, a first DC end, a second DC end and a third DC end, the first AC end and the second AC end are electrically connected to an AC source, the front-stage power conversion unit includes a first bridge arm and a second bridge arm, the first capacitor is electrically connected between the first DC end and the DC midpoint, the second capacitor is electrically connected between the DC midpoint and the third DC end, and the second DC end is electrically connected to the DC midpoint; wherein the modulation voltages of the first bridge arm and the second bridge arm are distributed according to the current of the first DC end and the current of the third DC end to control the potential balance of the DC midpoint.
14. A coordinated fault-tolerant control method as described in claim 12, wherein each of the front-stage circuits further includes a first AC end, a second AC end, a front-stage power conversion unit, a first capacitor, a second capacitor, a first DC end, a second DC end and a third DC end, the first AC end and the second AC end are electrically connected to an AC source, the front-stage power conversion unit includes a first bridge arm and a second bridge arm, and the first bridge arm and the second bridge arm are electrically connected in series between the first AC end and the second AC end, the first capacitor is electrically connected between the first DC end and the DC midpoint, the second capacitor is electrically connected between the DC midpoint and the third DC end, and the second DC end is electrically connected to the DC midpoint.
15. The coordinated fault-tolerant control method of claim 14, wherein the method for controlling the potential balance of the DC midpoint comprises: Acquiring a modulation voltage between the first AC terminal and the second AC terminal; Acquiring a voltage of the first capacitor and a voltage of the second capacitor, and obtaining a common mode voltage according to the voltage of the first capacitor and the voltage of the second capacitor; Acquire the current of the first DC terminal and the current of the third DC terminal, and distribute the modulation voltage to the first bridge arm and the second bridge arm according to the current of the first DC terminal and the current of the third DC terminal to obtain a first distributed voltage and a second distributed voltage; The first distributed voltage is superimposed on the common mode voltage to obtain the first bridge arm reference voltage, and the second distributed voltage is superimposed on the common mode voltage to obtain the second bridge arm reference voltage; Obtaining the first bridge arm duty cycle according to the first bridge arm reference voltage and the voltage of the first capacitor, and obtaining the second bridge arm duty cycle according to the second bridge arm reference voltage and the voltage of the second capacitor; as well as The operation of the first bridge arm is controlled according to the duty cycle of the first bridge arm, and the operation of the second bridge arm is controlled according to the duty cycle of the second bridge arm, so that the potential of the DC midpoint is balanced. 16 . The coordinated fault-tolerant control method as claimed in claim 15 , wherein a difference between the voltage of the first capacitor and the voltage of the second capacitor is calculated, and the difference is adjusted to obtain the common mode voltage.
17. The coordinated fault-tolerant control method according to claim 15, wherein the first distributed voltage and the second distributed voltage are expressed as: where v ao The first distribution voltage, v bo For the second distribution voltage, i dc1 is the current at the first DC terminal, i dc2 is the current at the third DC terminal, v abref is the modulation voltage; The expressions of the first bridge arm duty cycle d1 and the second bridge arm duty cycle d2 are: where v aoref is the reference voltage of the first bridge arm, v boref is the reference voltage of the second bridge arm, v com is the common mode voltage, v dcp is the voltage of the first capacitor, v dcn is the voltage of the second capacitor, i g is the current of the AC source.
18. A coordinated fault-tolerant control method as described in claim 15, wherein the first bridge arm includes one switch tube or two switch tubes connected in series and operating complementarily, and the switching operation of the switch tube in the first bridge arm is controlled according to the duty cycle of the first bridge arm; and the second bridge arm includes one switch tube or two switch tubes connected in series and operating complementarily, and the switching operation of the switch tube in the second bridge arm is controlled according to the duty cycle of the second bridge arm.
19. The coordinated fault-tolerant control method of claim 13 or 14, wherein the coordinated fault-tolerant control method further comprises: When any of the switch tubes of any of the rear-stage switch groups fails, the AC voltage received by the front-stage power conversion unit at the first AC end and the second AC end is reduced. 20 . The coordinated fault-tolerant control method of claim 13 , wherein when any of the switch tubes of any of the subsequent switch groups fails, a current imbalance between the current at the first DC end and the current at the third DC end is greater than 50%.