Dual-mode baseband chip based on LTE and Tiantong satellite and mobile terminal

Abstract

The invention provides a dual-mode baseband chip based on LTE and Tiantong satellites and a mobile terminal. The dual-mode baseband chip comprises an interface bus, a CPU group, an accelerator module, a shared register, a DMA and an address peripheral bus, wherein the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are connected with the interface bus; the accelerator module comprises a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchrotron which are independently arranged; the accelerator module supports the LTE standard and the Tiantong satellite standard. By utilizing the characteristic that the coding scheme of the LTE standard is similar to that of the Tiantong satellite standard, various accelerators in the accelerator module are compatible with the LTE standard and the Tiantong satellite standard, and then configuration control is performed on each functional module through the CPU group, so that the chip not only adapts to the two standards, but also effectively reduces the number of the accelerators; therefore, hardware resources are saved, the chip area is reduced, the system power consumption is reduced, and the problem of how to share the chip required by LTE and Tiantong satellite communication so as to reduce the circuit area of the mobile terminal is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to a dual-mode baseband chip and a mobile terminal based on LTE and Tiantong satellite. Background Art

[0002] With the development of integrated circuits and wireless communication technology, thin and compact mobile terminals are favored by people. In order to support various wireless communication protocols, mobile terminals will match corresponding antennas and chips to realize data transmission and reception.

[0003] However, in existing mobile terminals, different communication protocols are usually configured with independent processing chips. For example, in a mobile terminal that supports terrestrial wireless network communications, an LTE terrestrial network antenna and a corresponding processing chip are usually provided. If the mobile terminal also supports Tiantong satellite communications, the antenna and processing chip required for Tiantong satellite communications must be separately provided. In this way, the design of multiple antennas and chips makes the internal structure area of ​​the mobile terminal larger, limiting the miniaturization design of the mobile terminal; at the same time, in order to ensure the quality of wireless communication and meet the heat dissipation requirements of the chip, a certain physical distance needs to be ensured between each antenna and chip to avoid signal crosstalk, which is in conflict with the design requirements of small area and high integration. Summary of the invention

[0004] The object of the present invention is to provide a dual-mode baseband chip and a mobile terminal based on LTE and Tiantong satellite, so as to at least solve the problem of how to share the chips required for LTE and Tiantong satellite communications to reduce the circuit area of ​​the mobile terminal.

[0005] In order to solve the above technical problems, the present invention provides a dual-mode baseband chip based on LTE and Tiantong satellite, comprising an interface bus, a CPU group, an accelerator module, a shared register, a DMA and an address peripheral bus; the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are all connected to the interface bus through their respective interfaces;

[0006] The accelerator module comprises a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchronization accelerator which are independently arranged; the accelerator module supports the LTE standard and the Tiantong satellite standard.

[0007] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, a protocol stack and physical layer control are run on the CPU group, and the physical layer control includes parameter calculation and configuration of the accelerator module; the CPU group is RSIC-V or ARM architecture.

[0008] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the decoding accelerator supports the LTE standard and the Tiantong satellite standard, and the decoding accelerator includes a rate matching unit, a decoding acceleration unit and a CRC unit; the rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the decoding acceleration unit is used to select Turbo decoding mode, convolution decoding mode, Golay decoding mode or RS decoding mode for decoding according to the data encoding type based on the result of rate matching; the CRC unit is used to perform CRC on the content output by the decoding acceleration unit to obtain the decoded data.

[0009] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the uplink accelerator supports the LTE standard and the Tiantong satellite standard, and the uplink accelerator includes a CRC adding unit, an uplink coding unit, an uplink rate matching unit and an uplink modulation unit; the CRC adding unit is used to receive media data and perform a cyclic redundancy check on the received media data; the uplink coding unit is used to select a Turbo decoding method, a convolution decoding method, a Golay decoding method or an RS decoding method according to the coding type of the media data to encode the verified media data; the uplink rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the uplink modulation unit is used to modulate the encoded media data according to the result of the rate matching to obtain uplink data.

[0010] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the digital front-end accelerator includes a downlink data front-end processing component and an uplink data front-end processing component;

[0011] The downlink data front-end processing component includes a first downlink data front-end processing unit based on the LTE standard and a second downlink data front-end processing unit based on the Tiantong satellite standard; the first downlink data front-end processing unit is used to perform AGC calculation and compensation, OFDM waveform deconstruction and resource demapping on the data in sequence to obtain processed data and reference signals; the second downlink data front-end processing unit is used to perform AGC calculation and compensation, RRC filtering and channel data extraction on the data in sequence to obtain processed data and unique codes;

[0012] The uplink data front-end processing component includes a first uplink data front-end processing unit based on the LTE standard and a second uplink data front-end processing unit based on the Tiantong satellite standard; the first uplink data front-end processing unit is used to perform resource mapping and DFT-S-OFDM waveform generation on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the RF front end; the second uplink data front-end processing unit is used to perform resource mapping and RRC filtering on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the RF front end.

[0013] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the channel estimation accelerator includes a variety of channel estimation algorithm logics, which are used to select a corresponding channel estimation algorithm for channel estimation for the reference signal or unique code output by the digital front-end accelerator according to the scenario.

[0014] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the equalization accelerator includes a plurality of equalization algorithm logics, which are used to select corresponding equalization algorithm logics for equalization processing of the data output by the digital front-end accelerator according to the scenario.

[0015] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the synchronization accelerator includes an LTE synchronization calculation logic unit and a Tiantong synchronization calculation logic unit; the LTE synchronization calculation logic unit is used to send synchronization information to the CPU group based on the LTE standard for synchronization calculation; the Tiantong synchronization calculation logic unit is used to send synchronization information to the CPU group based on the Tiantong satellite standard for synchronization calculation.

[0016] Optionally, in the dual-mode baseband chip based on LTE and Tiantong satellite, the synchronous calculation process includes:

[0017] Synchronization process: the digital front-end accelerator obtains time domain data from the RF front-end, processes the time domain data, and sends the processed data to the synchrotron; the synchrotron obtains synchronization information in the data and sends the synchronization information to the CPU group;

[0018] Uplink transmission process: the CPU group calculates and configures parameters for the uplink accelerator and the digital front-end accelerator according to the scheduling time; the CPU group sends the uplink data to the uplink accelerator; the uplink accelerator adds CRC processing, encoding processing, rate matching processing and modulation processing to the uplink data to obtain an uplink signal; the digital front-end accelerator receives the uplink signal, generates an uplink signal waveform according to a preset standard, and sends the uplink signal waveform to the RF front end;

[0019] Downlink receiving process: the digital front-end accelerator obtains time domain data from the RF front-end, and processes the time domain data to divide it into data and training sequence; the channel estimation accelerator obtains the training sequence, and performs channel estimation on the training sequence; the equalization accelerator obtains data, and performs equalization and modulation processing on the data according to the channel estimation result of the channel estimation accelerator; the decoding accelerator obtains the data output by the equalization accelerator, and decodes the data; wherein the training sequence based on the LTE standard is a reference signal, and the training sequence based on the Tiantong satellite standard is a unique code.

[0020] In order to solve the above technical problems, the present invention also provides a mobile terminal, comprising a dual-mode baseband chip based on LTE and Tiantong satellite as described in any of the above items.

[0021] The dual-mode baseband chip and mobile terminal based on LTE and Tiantong satellite provided by the present invention include an interface bus, a CPU group, an accelerator module, a shared register, a DMA and an address peripheral bus; the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are all connected to the interface bus through their respective interfaces; the accelerator module includes a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchronization accelerator that are independently set; the accelerator module supports the LTE standard and the Tiantong satellite standard. By making the various accelerators in the accelerator module compatible with the LTE standard and the Tiantong satellite standard, and then configuring and controlling each functional module through the CPU group, the chip is not only adapted to the two standards, but also effectively reduces the number of accelerators, thereby saving hardware resources, reducing the chip area, and reducing the system power consumption, and solving the problem of how to share the chips required for LTE and Tiantong satellite communications to reduce the circuit area of ​​the mobile terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of the structural architecture of a dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment;

[0023] Figure 2 A schematic diagram of the structural architecture of the decoding accelerator provided in this embodiment;

[0024] Figure 3 A schematic diagram of the structural architecture of the uplink accelerator provided in this embodiment;

[0025] Figure 4 A schematic diagram of the structural architecture of the downlink data front-end processing component provided in this embodiment;

[0026] Figure 5A schematic diagram of the structural architecture of the uplink data front-end processing component provided in this embodiment;

[0027] Figure 6 A schematic diagram of the structural architecture of the synchrotron provided in this embodiment;

[0028] Figure 7 A schematic diagram of the data flow of the synchronization process provided in this embodiment;

[0029] Figure 8 A schematic diagram of the data flow of the uplink transmission process provided in this embodiment;

[0030] Fig. 9 A schematic diagram of data flow in the downlink receiving process provided in this embodiment. DETAILED DESCRIPTION

[0031] The following is a further detailed description of the dual-mode baseband chip and mobile terminal based on LTE and Tiantong satellite proposed in the present invention in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the accompanying drawings is often part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different proportions are used.

[0032] It should be noted that the terms "first", "second", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0033] This embodiment provides a dual-mode baseband chip based on LTE and Tiantong satellite. Figure 1 As shown, it includes an interface bus (AXI), a CPU group, an accelerator module, a shared register (SHRAM), a DMA (Direct Memory Access) and an address peripheral bus (APB bridge); the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are all connected to the interface bus through their respective interfaces.

[0034] The accelerator module comprises a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchronization accelerator which are independently arranged; the accelerator module supports the LTE standard and the Tiantong satellite standard.

[0035] The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment utilizes the similar characteristics of the LTE standard and the Tiantong satellite standard coding schemes, makes various accelerators in the accelerator module compatible with the LTE standard and the Tiantong satellite standard, and then configures and controls each functional module through the CPU group, so that the chip not only adapts to the two standards, but also effectively reduces the number of accelerators, thereby saving hardware resources, reducing chip area, and reducing system power consumption, and solving the problem of how to share the chips required for LTE and Tiantong satellite communications to reduce the circuit area of ​​the mobile terminal.

[0036] In practical applications, each functional module can communicate with the interface bus AXI through the AXI Slave interface, wherein the CPU group, accelerator module, shared register and DMA can be directly connected to the main line of the interface bus AXI; other peripherals, such as GPIO, UART, I2C, I2S, SDIO, etc., can be bridged to the main line of the interface bus AXI through the address peripheral bus (APB, Address PeripheralBus). The specific implementation method is well known to those skilled in the art, and this application will not repeat it.

[0037] Furthermore, considering that both the LTE standard and the Tiantong satellite standard are relatively mature standard systems, in this embodiment, the CPU group runs a protocol stack and a physical layer control, and the physical layer control includes parameter calculation and configuration of the accelerator module; the CPU group is an RSIC-V or ARM architecture. The data processing of the physical layer is all carried out in the accelerator module, thereby reducing the data processing content of the CPU group, which not only ensures the processing efficiency of the CPU group, but also saves hardware resources.

[0038] In actual applications, the number of CPUs in the CPU group can be reasonably set according to the device capabilities and load requirements, and this application does not impose any restrictions on this.

[0039] Furthermore, in this embodiment, the decoding accelerator supports the LTE standard and the Tiantong satellite standard, such as Figure 2As shown, the decoding accelerator includes a rate matching unit, a decoding acceleration unit and a CRC unit; the rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the decoding acceleration unit is used to select Turbo decoding mode, convolution decoding mode, Golay decoding mode or RS decoding mode for decoding according to the result of rate matching and the data encoding type; the CRC unit is used to perform CRC on the content output by the decoding acceleration unit to obtain the decoded data.

[0040] In this embodiment, considering that the Tiantong system coding methods include Turbo, convolution, Golay and RS coding, and the LTE standard coding methods include Turbo and convolution coding, the decoding accelerator is designed according to the coding method so that it can be compatible with the LTE standard and the Tiantong satellite standard, so that the processing of two types of data can be realized on one decoding accelerator, thereby reducing the number of decoding accelerators and reducing the chip area.

[0041] In practical applications, the decoding accelerator receives the demodulated data after equalization, and first uses the rate matching unit to perform rate matching on the data. The rate matching unit is designed according to the LTE standard and the Tiantong satellite standard, that is, there are two sets of rate matching schemes in the rate matching unit. The corresponding rate matching scheme is selected according to the standard based on the demodulated data for rate matching; then decoding is performed, and the decoding can not distinguish between the standard system, and the corresponding decoding method is selected according to the data encoding type for decoding; after decoding, CRC is decrypted to complete the decoding process.

[0042] Furthermore, in this embodiment, the uplink accelerator supports the LTE standard and the Tiantong satellite standard, such as Figure 3 As shown, the uplink accelerator includes a CRC adding unit, an uplink coding unit, an uplink rate matching unit and an uplink modulation unit; the CRC adding unit is used to receive media data and perform a cyclic redundancy check on the received media data; the uplink coding unit is used to select a Turbo decoding method, a convolution decoding method, a Golay decoding method or an RS decoding method according to the coding type of the media data to encode the checked media data; the uplink rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the uplink modulation unit is used to modulate the encoded media data according to the result of the rate matching to obtain uplink data.

[0043] Similar to the decoding accelerator, in this embodiment, the uplink rate matching unit in the uplink accelerator needs to be designed according to the LTE standard and the Tiantong satellite standard respectively, while other units are compatible with both sets of standards and do not need to be distinguished according to the standard system.

[0044] In actual applications, the CRC adding unit of the uplink accelerator receives data from the MAC and adds CRC to it. Then the uplink coding unit selects the corresponding coding method according to the data type for encoding, and then selects the corresponding rate matching scheme for rate matching according to the standard based on the data, and finally performs data modulation processing.

[0045] Furthermore, in this embodiment, the digital front-end accelerator includes a downlink data front-end processing component and an uplink data front-end processing component.

[0046] Specifically, Figure 4 As shown, the downlink data front-end processing component includes a first downlink data front-end processing unit based on the LTE standard and a second downlink data front-end processing unit based on the Tiantong satellite standard; the first downlink data front-end processing unit is used to perform AGC (Auto Gain Control) calculation and compensation, OFDM (Orthogonal Frequency Division Multiplexing) waveform and resource demapping on the data in sequence to obtain processed data and reference signals; the second downlink data front-end processing unit is used to perform AGC calculation and compensation, RRC (Root-Raised Cosine) filtering and channel data extraction on the data in sequence to obtain processed data and unique codes.

[0047] And, if Figure 5 As shown, the uplink data front-end processing component includes a first uplink data front-end processing unit based on the LTE standard and a second uplink data front-end processing unit based on the Tiantong satellite standard; the first uplink data front-end processing unit is used to perform resource mapping and DFT-S-OFDM (orthogonal frequency division multiplexing based on discrete Fourier transform) waveform generation on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the RF front end; the second uplink data front-end processing unit is used to perform resource mapping and RRC filtering on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the RF front end.

[0048] In this embodiment, the digital front-end accelerator is divided into uplink processing and downlink processing, and two sets of processing modes are prepared according to the LTE standard and the Tiantong satellite standard, so that the corresponding processing mode can be selected for uplink or downlink processing according to the standard on which the data depends. In practical applications, the AGC calculation and compensation method, the OFDM waveform decoding method, the resource mapping and demapping method, the RRC filtering method and the channel data extraction method are all well known to those skilled in the art, and this application will not be repeated here.

[0049] After the digital front-end accelerator performs resource demapping, the downlink training sequence (including reference signal and unique code) and data need to undergo channel estimation and equalization. The existing method is to use the receiver to perform this part of the processing, however, the receiver processing is very resource-intensive, therefore, this embodiment uses a hardware accelerator to perform this part of the processing, thereby facilitating the time domain design of the entire system.

[0050] Specifically, in this embodiment, the channel estimation accelerator includes a variety of channel estimation algorithm logics, which are used to select a corresponding channel estimation algorithm to perform channel estimation on the reference signal or unique code output by the digital front-end accelerator according to the scenario.

[0051] Furthermore, the equalization accelerator includes a plurality of equalization algorithm logics, which are used to select corresponding equalization algorithm logics for equalization processing of the data output by the digital front-end accelerator according to the scenario.

[0052] The channel estimation accelerator and equalization accelerator provided in this embodiment are both configured by the physical layer control of the CPU group, such as configuring the length and algorithm of data processing, and there is no need to distinguish between standards. Therefore, data relying on two standards can implement channel estimation and equalization algorithms through the same channel estimation accelerator and equalization accelerator, thereby saving hardware resources and reducing chip area.

[0053] In practical applications, a variety of algorithms can be configured for the channel estimation accelerator and the equalization accelerator according to actual needs, and this application does not impose any restrictions on this.

[0054] Further, such as Figure 6 As shown, the synchronization accelerator includes an LTE synchronization calculation logic unit and a Tiantong synchronization calculation logic unit; the LTE synchronization calculation logic unit is used to send synchronization information to the CPU group based on the LTE standard for synchronization calculation; the Tiantong synchronization calculation logic unit is used to send synchronization information to the CPU group based on the Tiantong satellite standard for synchronization calculation.

[0055] In this embodiment, the synchrotron is responsible for the initial synchronization of the system. Since the two standard systems are completely different in the synchronization part, the synchrotron has formulated two sets of synchronization calculation logics according to the LTE standard and the Tiantong satellite standard. In actual application, the synchronization calculation logic path to be executed is selected according to the configuration of the physical layer control. The synchronization information of the synchrotron is sent to the physical layer for further calculation, wherein the processing process of the physical layer mainly includes the synchronization process, the uplink transmission process, and the downlink reception process.

[0056] Specifically, Figure 7As shown, the synchronization process includes: the digital front-end accelerator obtains time domain data from the RF front-end, processes the time domain data, and sends the processed data to the synchrotron; the synchrotron obtains synchronization information in the data and sends the synchronization information to the physical layer control of the CPU group.

[0057] And, if Figure 8 As shown, the uplink sending process includes: the CPU group calculates and configures parameters of the uplink accelerator and the digital front-end accelerator according to the scheduling time; the CPU group sends the uplink data to the uplink accelerator; the uplink accelerator adds CRC processing, encoding processing, rate matching processing and modulation processing to the uplink data to obtain an uplink signal; the digital front-end accelerator receives the uplink signal, generates an uplink signal waveform according to a preset standard, and sends the uplink signal waveform to the RF front end.

[0058] And, if Fig. 9 As shown, the downlink receiving process includes: the digital front-end accelerator obtains time domain data from the RF front-end, and processes the time domain data to divide it into data and a training sequence (DMRS); the channel estimation accelerator obtains the training sequence, and performs channel estimation on the training sequence; the equalization accelerator obtains data, and performs equalization and modulation processing on the data according to the channel estimation result (channel transfer function) of the channel estimation accelerator; the decoding accelerator obtains the data output by the equalization accelerator, and decodes the data; wherein the training sequence based on the LTE standard is a reference signal, and the training sequence based on the Tiantong satellite standard is a unique code.

[0059] The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment integrates the Tiantong satellite communication system and the LTE ground network standard on a single chip, reducing the number of hardware devices and reducing costs. The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment, the downlink decoding scheme makes full use of the similarity of the two system coding schemes, does not distinguish between system standards, and conducts unified planning and design to form a set of accelerators, reducing the number of accelerators, and further reducing hardware costs and chip area. The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment, the uplink coding scheme makes full use of the similarity of the two system coding schemes. In addition to rate matching, other modules are normalized and designed, and there is no need to process two paths according to the system, reducing the number of modules, further reducing hardware costs and chip area. The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment, the downlink digital front-end accelerator outputs the training sequence and data after processing the data, and the channel estimation and equalization accelerators do not need to be designed separately according to the system standards. It only needs to configure the execution processing logic and data length according to the algorithm configuration to process the data of the target address. The channel estimation and equalization accelerators are normalized, reducing the processing path and reducing the design complexity. The dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment has data processing handed over to an accelerator, which makes the speed fast, the power consumption low, and improves the chip integration.

[0060] In addition, this embodiment also provides a mobile terminal, including the dual-mode baseband chip based on LTE and Tiantong satellite as described above.

[0061] In practical applications, the dual-mode baseband chip based on LTE and Tiantong satellite provided in this embodiment can be implemented by using a CPU+DSP design; or a CPU+DSP+ASIC hardware accelerator hybrid design, wherein part of the physical layer data processing is implemented on the DSP, and relatively mature algorithms are implemented through the ASIC hardware accelerator. This application does not limit the specific design implementation of the chip.

[0062] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0063] The dual-mode baseband chip and mobile terminal based on LTE and Tiantong satellite provided in this embodiment include an interface bus, a CPU group, an accelerator module, a shared register, a DMA and an address peripheral bus; the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are all connected to the interface bus through their respective interfaces; the accelerator module includes a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchronization accelerator that are independently set; the accelerator module supports the LTE standard and the Tiantong satellite standard. By making the various accelerators in the accelerator module compatible with the LTE standard and the Tiantong satellite standard, and then configuring and controlling each functional module through the CPU group, the chip is not only adapted to the two standards, but also effectively reduces the number of accelerators, thereby saving hardware resources, reducing the chip area, and reducing the system power consumption, and solving the problem of how to share the chips required for LTE and Tiantong satellite communications to reduce the circuit area of ​​the mobile terminal.

[0064] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A dual-mode baseband chip based on LTE and Tiantong satellite, characterized in that: It includes an interface bus, a CPU group, an accelerator module, a shared register, a DMA and an address peripheral bus; the CPU group, the accelerator module, the shared register, the DMA and the address peripheral bus are all connected to the interface bus through their respective interfaces; The accelerator module comprises a digital front-end accelerator, a decoding accelerator, an uplink accelerator, a channel estimation accelerator, an equalization accelerator and a synchronization accelerator which are independently arranged; the accelerator module supports the LTE standard and the Tiantong satellite standard.

2. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The CPU group runs a protocol stack and a physical layer control, wherein the physical layer control includes parameter calculation and configuration of the accelerator module; and the CPU group is of RSIC-V or ARM architecture.

3. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The decoding accelerator supports the LTE standard and the Tiantong satellite standard, and includes a rate matching unit, a decoding acceleration unit and a CRC unit; the rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the decoding acceleration unit is used to select Turbo decoding mode, convolution decoding mode, Golay decoding mode or RS decoding mode for decoding according to the result of rate matching and the data encoding type; the CRC unit is used to perform CRC on the content output by the decoding acceleration unit to obtain decoded data.

4. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The uplink accelerator supports the LTE standard and the Tiantong satellite standard, and the uplink accelerator includes a CRC adding unit, an uplink coding unit, an uplink rate matching unit and an uplink modulation unit; The CRC adding unit is used to receive media data and perform a cyclic redundancy check on the received media data; the uplink encoding unit is used to select a Turbo decoding method, a convolution decoding method, a Golay decoding method or an RS decoding method according to the encoding type of the media data to encode the checked media data; the uplink rate matching unit is used to perform rate matching based on the LTE standard and the Tiantong satellite standard respectively; the uplink modulation unit is used to modulate the encoded media data according to the result of the rate matching to obtain uplink data.

5. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The digital front-end accelerator includes a downlink data front-end processing component and an uplink data front-end processing component; The downlink data front-end processing component includes a first downlink data front-end processing unit based on the LTE standard and a second downlink data front-end processing unit based on the Tiantong satellite standard; the first downlink data front-end processing unit is used to perform AGC calculation and compensation, OFDM waveform deconstruction and resource demapping on the data in sequence to obtain processed data and reference signals; the second downlink data front-end processing unit is used to perform AGC calculation and compensation, RRC filtering and channel data extraction on the data in sequence to obtain processed data and unique codes; The uplink data front-end processing component includes a first uplink data front-end processing unit based on the LTE standard and a second uplink data front-end processing unit based on the Tiantong satellite standard; The first uplink data front-end processing unit is used to perform resource mapping and DFT-S-OFDM waveform generation on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the radio frequency front end; The second uplink data front-end processing unit is used to perform resource mapping and RRC filtering on the data output by the uplink accelerator in sequence, so as to send the generated data signal to the radio frequency front end.

6. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The channel estimation accelerator includes a variety of channel estimation algorithm logics, which are used to select a corresponding channel estimation algorithm to perform channel estimation on the reference signal or unique code output by the digital front-end accelerator according to the scenario.

7. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The equalization accelerator includes a plurality of equalization algorithm logics, which are used to select corresponding equalization algorithm logics to perform equalization processing on the data output by the digital front-end accelerator according to the scenario.

8. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The synchronization accelerator includes an LTE synchronization calculation logic unit and a Tiantong synchronization calculation logic unit; the LTE synchronization calculation logic unit is used to send synchronization information to the CPU group based on the LTE standard for synchronization calculation; the Tiantong synchronization calculation logic unit is used to send synchronization information to the CPU group based on the Tiantong satellite standard for synchronization calculation.

9. The dual-mode baseband chip based on LTE and Tiantong satellite according to claim 1, characterized in that: The synchronous calculation process includes: Synchronization process: the digital front-end accelerator obtains time domain data from the RF front-end, processes the time domain data, and sends the processed data to the synchrotron; the synchrotron obtains synchronization information in the data and sends the synchronization information to the CPU group; Uplink transmission process: the CPU group calculates and configures parameters for the uplink accelerator and the digital front-end accelerator according to the scheduling time; the CPU group sends the uplink data to the uplink accelerator; the uplink accelerator adds CRC processing, encoding processing, rate matching processing and modulation processing to the uplink data to obtain an uplink signal; the digital front-end accelerator receives the uplink signal, generates an uplink signal waveform according to a preset standard, and sends the uplink signal waveform to the RF front end; Downlink receiving process: the digital front-end accelerator obtains time domain data from the RF front-end, and processes the time domain data to divide it into data and training sequence; the channel estimation accelerator obtains the training sequence, and performs channel estimation on the training sequence; the equalization accelerator obtains data, and performs equalization and modulation processing on the data according to the channel estimation result of the channel estimation accelerator; the decoding accelerator obtains the data output by the equalization accelerator, and decodes the data; wherein the training sequence based on the LTE standard is a reference signal, and the training sequence based on the Tiantong satellite standard is a unique code.

10. A mobile terminal, characterized in that: It comprises a dual-mode baseband chip based on LTE and Tiantong satellite as described in any one of claims 1 to 9.

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