Preparation method and application of heterojunction battery substrate

By depositing the silicon nitride layer on the initial substrate of the heterojunction solar cell substrate and annealing, the problems of uneven deposition caused by the back suede structure and degradation of battery performance are solved, and efficient passivation and photoelectricity are achieved Improved conversion efficiency.

CN119451312APending Publication Date: 2025-02-14ANHUI HUASUN ENERGY CO LTD
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Patent Information

Application Number
CN202411544327.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-31
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

The suede structure on the back of the existing heterojunction solar cell substrate causes uneven deposition of the intrinsic passivation layer and doped layer, affecting the passivation effect, and being unfavorable to the secondary reflection absorption of incident light, resulting in a degradation of battery performance.

Method used

The intrinsic passivation layer, the first doped layer and the silicon nitride layer are deposited on the first surface of the initial substrate, and annealed treatment is performed. The silicon nitride layer serves as a protective layer in the fleece making process to avoid the formation of suede on the back. Improve flatness and passivation effect.

Benefits of technology

By improving the flatness and interface passivation effect on the back of the heterojunction battery substrate, the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the heterojunction solar cell are improved, while reducing the debris rate of the substrate.

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Abstract

The invention provides a preparation method and application of a heterojunction cell substrate, and the method comprises the following steps: sequentially depositing an intrinsic passivation layer, a first doping layer and a silicon nitride layer on the first surface of an initial substrate, and then carrying out the annealing treatment to obtain an intermediate substrate, the refractive index of the silicon nitride layer being 1.5-2; a texturing agent is used for texturing the middle substrate, after a textured surface is formed on the second surface of the middle substrate, first cleaning treatment is carried out, then silicon nitride layer removal treatment and oxide layer removal treatment are carried out on the middle substrate, and the second surface and the first surface are oppositely arranged; and sequentially depositing an intrinsic passivation layer and a second doping layer on the surface, far away from the initial substrate, of the suede to form the heterojunction cell substrate. According to the method, the back surface of the heterojunction cell substrate has excellent flatness, meanwhile, the fragment rate of the heterojunction cell substrate is reduced, the interface passivation effect is enhanced through silicon nitride annealing and hydrogen injection, and then the short-circuit current, the open-circuit voltage, the filling factor and the photoelectric conversion efficiency of the heterojunction solar cell are improved.
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Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor substrates, and in particular relates to a preparation method of a heterojunction battery substrate and an application thereof. Background Art

[0002] As a new type of efficient solar cell, heterojunction solar cells have become a new hot spot in the photovoltaic field in recent years. They have the advantages of simple structure, simple process, high conversion efficiency and high open circuit voltage. At present, heterojunction solar cells usually use double-sided texturing of original silicon wafers as heterojunction cell substrates, but the textured structure on the back of the double-sided texturing original silicon wafers will cause uneven deposition of the subsequent intrinsic passivation layer and doping layer, thereby affecting the passivation effect of the intrinsic passivation layer. In addition, the textured structure on the back of the double-sided texturing original silicon wafers is not conducive to the secondary reflection and absorption of the incident light, which reduces the short-circuit current, open circuit voltage, fill factor and photoelectric conversion efficiency of heterojunction solar cells. Therefore, it is necessary to improve the flatness of the back of the heterojunction cell substrate.

[0003] The alkaline back polishing process is a common process technology for improving the flatness of the back side of heterojunction battery substrates. It mainly uses alkali to react with the back side of the silicon wafer after texturing to polish the velvet surface on the back side of the silicon wafer. The front side of the silicon wafer is protected by a protective layer and does not participate in the reaction, thereby improving the flatness of the back side of the heterojunction battery substrate. However, the alkaline back polishing process further reduces the thickness of the heterojunction battery substrate, resulting in an increase in the fragmentation rate of the heterojunction battery substrate.

[0004] Therefore, there is an urgent need to provide a preparation method that can make the back side of a heterojunction battery substrate have excellent flatness, reduce the fragmentation rate of the heterojunction battery substrate, and enhance the passivation effect of the intrinsic passivation layer. Summary of the invention

[0005] In view of the above-mentioned defects, the present invention provides a method for preparing a heterojunction battery substrate, which can make the back side of the heterojunction battery substrate have excellent flatness, while reducing the fragmentation rate of the heterojunction battery substrate and improving the passivation effect.

[0006] The present invention also provides a method for preparing a heterojunction solar cell, comprising preparing a heterojunction cell substrate by the above-mentioned preparation method, and then performing a conductive film deposition process on the heterojunction cell substrate and preparing electrodes to obtain the heterojunction solar cell. The heterojunction solar cell has high short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency.

[0007] In a first aspect, the present invention provides a method for preparing a heterojunction battery substrate, comprising:

[0008] S1: after depositing an intrinsic passivation layer, a first doping layer and a silicon nitride layer on a first surface of an initial substrate in sequence, annealing is performed to obtain an intermediate substrate, wherein the refractive index of the silicon nitride layer is 1.5-2;

[0009] S2: performing a texturing treatment on the intermediate substrate using a texturing agent to form a textured surface on the second surface of the intermediate substrate, and then performing a first cleaning treatment, and then performing a treatment to remove the silicon nitride layer and an oxidation layer on the intermediate substrate, wherein the second surface is arranged opposite to the first surface;

[0010] S3: depositing an intrinsic passivation layer and a second doping layer in sequence on a surface of the suede surface away from the initial substrate to form a heterojunction battery substrate.

[0011] The preparation method as described above, wherein the initial substrate is obtained by sequentially performing a first pre-cleaning treatment, a rough polishing treatment, a second pre-cleaning treatment and an oxidation layer removal treatment on an original silicon wafer;

[0012] In the rough polishing treatment, the rough polishing reagent includes: 0.001-10wt% alkali solution.

[0013] In the preparation method as described above, the oxidation layer removal treatment of the original silicon wafer comprises: using 0.5-10wt% hydrofluoric acid to remove the oxidation layer of the original silicon wafer; and / or,

[0014] The treatment of removing the silicon nitride layer and the oxide layer of the intermediate substrate includes: using 0.5-10 wt % of hydrofluoric acid to remove the silicon nitride layer and the oxide layer of the intermediate substrate.

[0015] The preparation method as described above, wherein the silicon nitride layer is obtained by chemical vapor deposition;

[0016] The temperature of the chemical vapor deposition is less than 210°C;

[0017] The thickness of the silicon nitride layer is 20-500 nm.

[0018] In the preparation method as described above, the annealing treatment is carried out at a temperature of 100-200° C. and a time of 5-30 min.

[0019] The preparation method as described above, wherein the first doping layer comprises a P-type doping layer; and / or,

[0020] The second doping layer includes an N-type doping layer.

[0021] The preparation method as described above, wherein a second cleaning process is further included before the texturing process, and the cleaning reagent of the second cleaning process includes: 0.01-10wt% alkali solution and 0.01-10wt% hydrogen peroxide.

[0022] The preparation method as described above, wherein the first cleaning treatment includes an alkaline cleaning treatment and an acidic cleaning treatment in sequence;

[0023] In the alkaline cleaning treatment, the cleaning reagent includes: 0.1-10wt% alkali solution and 0.1-10wt% hydrogen peroxide; in the acidic cleaning treatment, the cleaning reagent includes: 0.1-10wt% hydrochloric acid and 0.1-10wt% hydrogen peroxide.

[0024] The preparation method as described above, wherein the texturing agent comprises: 0.001-10wt% of alkali solution and 0.001-10wt% of texturing additive; and / or,

[0025] In the texturing process, the temperature is 50-85° C. and the time is 300-600 seconds.

[0026] In a second aspect, the present invention provides a method for preparing a heterojunction solar cell, comprising preparing a heterojunction cell substrate using the method for preparing a heterojunction cell substrate according to the first aspect;

[0027] The heterojunction solar cell is formed by depositing a conductive film on the heterojunction cell substrate and preparing electrodes.

[0028] The preparation method of the heterojunction battery substrate of the present invention sets a silicon nitride layer on the back of the initial substrate. The silicon nitride layer can be used as a protective layer in the texturing process to protect the back of the initial substrate. On the one hand, it can avoid the formation of a velvet surface on the back of the initial substrate, improve the flatness of the back of the heterojunction battery substrate, increase the secondary reflection absorption of the incident light, and thus improve the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the heterojunction solar cell; on the other hand, it can avoid further thinning of the initial substrate (the use of traditional back-side polishing process will cause the thickness of the initial substrate to be thinned by more than 3μm), thereby reducing the fragmentation rate of the heterojunction battery substrate and improving the effective utilization rate of the original silicon wafer. In addition, since the silicon nitride layer is rich in hydrogen, during the annealing treatment, the hydrogen in the silicon nitride layer will continuously diffuse through the first doping layer and the intrinsic passivation layer to the interface between the intrinsic passivation layer and the initial substrate, reducing the density of dangling bonds at the interface between the intrinsic passivation layer and the initial substrate, thereby reducing the surface state density at the interface between the intrinsic passivation layer and the initial substrate, improving the passivation effect of the interface, further improving the open circuit voltage of the heterojunction solar cell, and thereby improving the photoelectric conversion efficiency of the heterojunction solar cell.

[0029] The present invention uses the above method to make the back side of the heterojunction battery substrate have excellent flatness, while reducing the fragmentation rate of the heterojunction battery substrate, thereby improving the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the heterojunction solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of an initial substrate in which an intrinsic passivation layer, a first doping layer and a silicon nitride layer are deposited on the first surface in some embodiments of the present invention;

[0031] Figure 2 is a schematic structural diagram of an initial substrate after being processed in step S2 in some embodiments of the present invention;

[0032] Figure 3 A schematic diagram of the structure of a heterojunction battery substrate after being processed in step S3 in some embodiments of the present invention;

[0033] Figure 4 Schematic diagram of the structure of a heterojunction solar cell in some embodiments of the present invention.

[0034] Description of reference numerals:

[0035] 1-initial substrate; 2-intrinsic passivation layer; 3-first doping layer; 4-silicon nitride layer; 5-second doping layer; 6-conductive film; 7-electrode. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in combination with the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] Figure 1 A schematic diagram of the structure of an initial substrate in which an intrinsic passivation layer, a first doping layer and a silicon nitride layer are deposited on the first surface in some embodiments of the present invention; Figure 2 is a schematic structural diagram of an initial substrate after being processed in step S2 in some embodiments of the present invention; Figure 3 Schematic diagram of the structure of a heterojunction battery substrate in some embodiments of the present invention. Figure 1-Figure 3 As shown, in a first aspect, the present invention provides a method for preparing a heterojunction battery substrate, comprising:

[0038] S1 deposits an intrinsic passivation layer, a first doping layer and a silicon nitride layer on a first surface of an initial substrate in sequence, and then performs annealing to obtain an intermediate substrate, wherein the refractive index of the silicon nitride layer is 1.5-2;

[0039] S2: performing a texturing treatment on the intermediate substrate using a texturing agent to form a textured surface on the second surface of the intermediate substrate, and then performing a first cleaning treatment, and then performing a treatment to remove the silicon nitride layer and an oxidation layer on the intermediate substrate, wherein the second surface is arranged opposite to the first surface;

[0040] S3 sequentially deposits an intrinsic passivation layer and a second doping layer on the surface of the textured surface away from the initial substrate to form a heterojunction battery substrate.

[0041] The present invention does not limit the shape, size, and thickness of the initial substrate, which can be selected according to actual needs. The initial substrate of the present invention has a first surface and a second surface that are arranged opposite to each other. The first surface in the present invention can be considered as the back side of the initial substrate, and the second surface can be considered as the front side of the initial substrate.

[0042] like Figure 1 As shown, in step S1, an intrinsic passivation layer 2 is deposited on the first surface of the initial substrate 1, and then a first doped layer 3 is deposited on the surface of the intrinsic passivation layer 2 away from the initial substrate, and then a silicon nitride layer 4 with a refractive index of 1.5-2 is deposited on the surface of the first doped layer 3 away from the intrinsic passivation layer 2, and then annealing is performed. Since the silicon nitride layer is rich in hydrogen, during the annealing treatment, the hydrogen in the silicon nitride layer will continuously diffuse through the first doped layer and the intrinsic passivation layer to the interface between the intrinsic passivation layer and the initial substrate, reducing the density of dangling bonds at the interface between the intrinsic passivation layer and the initial substrate, thereby reducing the surface state density at the interface between the intrinsic passivation layer and the initial substrate, improving the passivation effect of the interface, and then improving the open circuit voltage of the heterojunction solar cell.

[0043] like Figure 2 As shown, in step S2, a texturing agent is used to perform texturing treatment on the intermediate substrate. The silicon nitride layer with a refractive index of 1.5-2 is not easily corroded by the texturing agent. Therefore, only the second surface of the intermediate substrate can be formed with a velvet surface. Subsequently, the texturing agent remaining after the texturing treatment is removed through a first cleaning treatment to obtain a clean intermediate substrate with a velvet structure. After the first cleaning treatment, an oxide layer is formed on the surface of the velvet structure of the intermediate substrate, and then the silicon nitride layer 4 and the oxide layer are removed.

[0044] like Figure 3 As shown, in step S3, an intrinsic passivation layer 2 is deposited on the surface of the velvet surface away from the initial substrate, and then a second doping layer 5 is deposited on the surface of the intrinsic passivation layer away from the initial substrate to form a heterojunction battery substrate which includes the second doping layer 5, the intrinsic passivation layer 2, the initial substrate 1, the intrinsic passivation layer 2 and the first doping layer 3 in the stacking direction.

[0045] The present invention does not limit the method for preparing the intrinsic passivation layer, the first doping layer and the second doping layer, and can be selected according to actual conditions. For example, the intrinsic passivation layer, the first doping layer and the second doping layer can be prepared by plasma enhanced chemical vapor deposition (PECVD) or hot wire chemical vapor deposition (HWCVD).

[0046] The present invention adopts a silicon nitride layer as a protective layer for velvet production, and injects hydrogen to enhance the passivation of the interface between the back intrinsic silicon and the initial substrate through annealing treatment to prepare a heterojunction battery substrate. The front of the heterojunction battery substrate prepared by the method has a uniform velvet structure, the back of the heterojunction battery substrate has excellent flatness and interface passivation effect, and the heterojunction battery substrate has a low fragmentation rate. At the same time, the preparation method of the heterojunction battery substrate of the present invention has the advantages of short process, simple process, can be directly grafted with the original equipment, simple process, and is conducive to mass production.

[0047] In some embodiments, the present invention performs a first pre-cleaning treatment on the original silicon wafer to remove impurities on the surface of the original silicon wafer to obtain a clean silicon wafer; then performs a rough polishing treatment to remove the mechanical damage layer on the surface of the silicon wafer to obtain a flat polished silicon wafer; then performs a second pre-cleaning treatment to further remove contaminants on the surface of the polished silicon wafer; finally, performs an oxidation layer removal treatment to remove the oxide layer on the surface of the silicon wafer to obtain a flat and clean initial substrate.

[0048] The present invention can further improve the effects of the first pre-cleaning treatment and the second pre-cleaning treatment by selecting specific parameters for the first pre-cleaning treatment and the second pre-cleaning treatment in preparing the initial substrate. In some embodiments, in the first pre-cleaning treatment and the second pre-cleaning treatment, the cleaning reagent includes: 0.01-10wt% alkali solution and 0.01-10wt% hydrogen peroxide. The alkali in the alkali solution includes at least one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide. Furthermore, in the first pre-cleaning treatment, the temperature is 60-80°C and the time is 2-4min, and in the second pre-cleaning treatment, the temperature is 60-80°C and the time is 2-4min.

[0049] The original silicon wafer of the present invention is a commonly used original silicon wafer in the art. The present invention does not limit the shape, size, and thickness of the original silicon wafer, which can be selected according to actual needs.

[0050] The present invention sequentially performs a first pre-cleaning treatment, a rough polishing treatment, a second pre-cleaning treatment and an oxide layer removal treatment on the original silicon wafer, thereby obtaining a flat and clean initial substrate, which is beneficial to the subsequent processes, and obtains a substrate with a velvet surface on the front side and a smooth surface (with excellent flatness) on the back side. Furthermore, in the rough polishing treatment, the rough polishing agent includes 0.001 to 10 wt% of an alkali solution.

[0051] In the rough polishing treatment of the present invention, the alkali in the alkali solution includes at least one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide. The present invention uses the above alkali solution for rough polishing treatment, which is conducive to further removing the mechanical damage layer on the surface of the original silicon wafer to obtain a flat polished silicon wafer, and then obtain a flat and smooth initial substrate.

[0052] Furthermore, in the rough polishing process, the temperature is 50-85° C. and the time is 60-240 seconds. By controlling the temperature and time of the rough polishing process within the above range, the mechanical damage layer on the surface of the original silicon wafer can be better removed to obtain a flat polished silicon wafer, and further obtain a flat and smooth initial substrate.

[0053] In the present invention, the silicon nitride layer is obtained by chemical vapor deposition. The chemical vapor deposition method is used to deposit the silicon nitride layer on the surface of the first doped layer away from the intrinsic passivation layer, which helps to form a uniform and dense silicon nitride layer on the surface of the first doped layer away from the intrinsic passivation layer, so that the silicon nitride layer can better protect the back side of the initial substrate and further improve the flatness of the back side of the heterojunction battery substrate.

[0054] Furthermore, the temperature of chemical vapor deposition is less than 210°C, which avoids excessively high temperature during the deposition process that reduces the passivation effect of the intrinsic passivation layer. At the same time, the refractive index of silicon nitride is closely related to its silicon content. The refractive index of silicon nitride increases with the increase of its silicon content. However, the silicon in silicon nitride is easy to react with alkali, causing silicon nitride to be corroded by alkali. When the refractive index of silicon nitride is 1.5-2, silicon nitride has a lower content of silicon, which can make it have excellent alkali resistance, avoiding the corrosion of the back side of the heterojunction battery substrate by the texturing agent in the subsequent texturing treatment, thereby making the back side of the heterojunction battery substrate have better flatness without damaging the intrinsic passivation layer.

[0055] According to the technical solution of the present invention, the thickness of the silicon nitride layer is 20-500nm. For example, the thickness of the silicon nitride layer includes but is not limited to 20nm, 50nm, 100nm, 200nm, 300nm, 400nm, 500nm or a range consisting of any two of them. The present invention controls the thickness of the silicon nitride layer so that the silicon nitride layer can better protect the back side of the heterojunction battery substrate.

[0056] In the present invention, the temperature of the annealing treatment is 100-200° C. and the time is 5-30 minutes. By controlling the temperature and time of the annealing treatment within the above range, it is helpful for hydrogen in the silicon nitride to diffuse into the interface between the intrinsic passivation layer and the initial substrate, further reducing the density of dangling bonds at the interface between the intrinsic passivation layer and the initial substrate, improving the passivation effect of the interface, and thus improving the open circuit voltage of the heterojunction solar cell.

[0057] In some embodiments, removing the oxide layer from the original silicon wafer and the intermediate substrate includes: using 0.5-10wt% hydrofluoric acid to remove the oxide layer. The present invention uses the above hydrofluoric acid to remove the oxide layer, while reducing damage to the original silicon wafer and the intermediate substrate, and further removing the oxide layer more efficiently.

[0058] Furthermore, removing the silicon nitride layer includes: using 0.5-10 wt % of hydrofluoric acid to remove the silicon nitride layer. The present invention can better remove the silicon nitride layer by using the hydrofluoric acid to remove the silicon nitride layer.

[0059] In the present invention, the first doping layer includes a P-type doping layer, and the second doping layer includes an N-type doping layer.

[0060] The present invention also includes performing a second cleaning treatment on the intermediate substrate before step S2 to remove impurities generated during the deposition of the intrinsic passivation layer, the deposition of the first doping layer, the deposition of the silicon nitride layer and the annealing treatment, thereby obtaining a flat and clean intermediate substrate, promoting the reaction between the subsequent texturing agent and the second surface of the intermediate substrate, and obtaining an intermediate substrate with a velvet structure.

[0061] The present invention can also further improve the effect of the second cleaning treatment by selecting specific parameters of the second cleaning treatment. In some embodiments, in the second cleaning treatment, the cleaning reagent includes: 0.01-10wt% alkali solution and 0.01-10wt% hydrogen peroxide, wherein the alkali in the alkali solution includes at least one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide. Further, in the second cleaning treatment, the temperature is 60-80°C and the time is 2-4min.

[0062] According to the technical solution of the present invention, the first cleaning treatment includes alkaline cleaning treatment and acidic cleaning treatment in sequence, and the alkaline cleaning treatment and the acidic cleaning treatment can be cleaned by RAC cleaning method respectively. Specifically, in the alkaline cleaning treatment, the cleaning reagent includes: 0.1-10wt% alkali solution and 0.1-10wt% hydrogen peroxide. The alkali in the alkali solution includes at least one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide; in the acidic cleaning treatment, the cleaning reagent includes: 0.1-10wt% hydrochloric acid and 0.1-10wt% hydrogen peroxide. The present invention first uses 0.1-10wt% alkali solution and 0.1-10wt% hydrogen peroxide for alkaline cleaning treatment, which can effectively remove organic pollutants on the surface of the intermediate substrate or the original silicon wafer, and then uses 0.1-10wt% hydrochloric acid and 0.1-10wt% hydrogen peroxide for acidic cleaning treatment, which can further remove the metal ions remaining on the surface of the intermediate substrate or the original silicon wafer.

[0063] After the velvet surface is formed on the second surface, the first cleaning treatment mentioned above can effectively remove the texturing agent remaining in the texturing treatment, thereby obtaining a clean intermediate substrate with a velvet structure.

[0064] In the present invention, the alkaline cleaning treatment is carried out at a temperature of 60-80°C and a time of 2-4 minutes; and / or,

[0065] During the acid cleaning treatment, the temperature is 60-80°C and the time is 2-4 minutes.

[0066] The present invention can further improve the effects of the alkaline cleaning treatment and the acidic cleaning treatment by controlling the temperature and time of the alkaline cleaning treatment and the acidic cleaning treatment within the above ranges.

[0067] In some embodiments, the texturing agent includes: 0.001-10wt% of alkali solution and 0.001-10wt% of texturing additive. The alkali in the alkali solution includes at least one of potassium hydroxide, sodium hydroxide, and tetramethylammonium hydroxide, and the texturing additive includes at least one of an inhibitor, a surfactant, a buffer, a metal particle, a fluoride, a complexing agent, and a chelating agent. Among them, the inhibitor includes at least one of ethanol, isopropanol, ethylenediamine, and triethylamine alcohol; the surfactant includes at least one of sodium dodecyl sulfate, polyethylene glycol, and polyvinyl alcohol; the buffer includes at least one of sodium carbonate and sodium phosphate; the metal particles include at least one of tin ions and zinc ions; the fluoride includes at least one of hydrofluoric acid and sodium fluoride; the complexing agent includes at least one of citric acid and EDTA; the chelating agent can be tartaric acid; the present invention uses the above-mentioned texturing agent to corrode the second surface of the intermediate substrate to form an intermediate substrate with a velvet structure.

[0068] Furthermore, in the texturing treatment, the temperature is 50-85° C. and the time is 300-600 seconds. By controlling the temperature and time of the texturing treatment within the above range, it is beneficial to form a uniform texture structure on the second surface of the intermediate substrate.

[0069] Figure 4 Schematic diagram of the structure of a heterojunction solar cell in some embodiments of the present invention. Figure 4 As shown, in a second aspect, the present invention provides a method for preparing a heterojunction solar cell, comprising preparing a heterojunction cell substrate using the method for preparing a heterojunction cell substrate described in the first aspect.

[0070] Furthermore, the heterojunction solar cell is formed by depositing a conductive film on the heterojunction cell substrate and preparing electrodes.

[0071] Furthermore, a conductive film 6 is deposited on a surface of the first doping layer 3 away from the initial substrate 1, and a conductive film 6 is deposited on a surface of the second doping layer 5 away from the initial substrate 1, and then an electrode 7 is prepared on a surface of the conductive film 6 away from the initial substrate 1 to obtain a heterojunction solar cell, wherein the conductive film includes any one of ITO, IWO, and IZO, and the electrode includes any one of silver, silver-copper alloy, and copper.

[0072] Furthermore, a conductive film 6 is deposited on the surface of the first doping layer 3 away from the initial substrate 1 by physical vapor deposition (PVD), and a conductive film 6 is deposited on the surface of the second doping layer 5 away from the initial substrate 1 by physical vapor deposition (PVD), and then an electrode 7 is prepared on the surface of the conductive film 6 away from the initial substrate 1 by screen printing or electroplating to obtain a heterojunction solar cell. The heterojunction solar cell prepared by this method has high short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency.

[0073] Hereinafter, the present invention will be further described in detail through specific examples.

[0074] Example 1

[0075] The method for preparing the heterojunction battery substrate provided in this embodiment comprises the following steps:

[0076] S1 performs a first pre-cleaning treatment, a rough polishing treatment, a second pre-cleaning treatment and an oxidation layer removal treatment on the original silicon wafer in sequence to obtain an initial substrate;

[0077] In the first pre-cleaning treatment, the cleaning reagent includes: 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0078] In the rough polishing treatment, the rough polishing reagent includes: 2wt% alkali solution, the alkali is KOH, the temperature is 80°C, and the time is 1.5min;

[0079] The second pre-cleaning treatment includes alkaline cleaning treatment and acid cleaning treatment in sequence. In the alkaline cleaning treatment, the cleaning reagents are 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min; in the acid cleaning treatment, the cleaning reagents include: 1wt% hydrochloric acid and 1wt% hydrogen peroxide, the temperature is 65°C, and the time is 2min;

[0080] In the treatment of removing the oxide layer, the reagent used was 8 wt % hydrofluoric acid, the temperature was 25° C., and the time was 2 min;

[0081] S2: After depositing an intrinsic passivation layer, a P-type doping layer and a silicon nitride layer in sequence on the first surface of the initial substrate by PECVD, annealing is performed to obtain an intermediate substrate;

[0082] The PECVD temperature is 200°C, the refractive index of the silicon nitride layer is 1.8, the thickness of the silicon nitride layer is 150 nm, the annealing temperature is 150°C, and the annealing time is 15 min.

[0083] S3: performing a second cleaning treatment on the intermediate substrate using a cleaning agent, and then performing a texturing treatment on the intermediate substrate using a texturing agent, so that a second surface of the intermediate substrate forms a textured surface, and then performing an alkaline cleaning treatment and an acid cleaning treatment in sequence, and then using 8wt% hydrofluoric acid to remove the silicon nitride layer, wherein the second surface is arranged opposite to the first surface;

[0084] In the second cleaning process, the cleaning reagent includes: 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0085] In the texturing treatment, the texturing agent includes 1wt% alkali solution and 0.5wt% texturing additive, the temperature is 80°C, the time is 480s, the alkali is KOH, and the texturing additive is a large velvet additive (Tuobang V2S2;

[0086] In the alkaline cleaning treatment, the cleaning reagent includes: 1wt% alkaline solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0087] In the acid cleaning treatment, the cleaning reagent includes: 1wt% hydrochloric acid and 1wt% hydrogen peroxide, the temperature is 65°C, and the time is 2min;

[0088] The oxide layer and silicon nitride treatment were performed using 8 wt% hydrofluoric acid at 25°C for 2 min.

[0089] 4) Using PECVD to sequentially deposit an intrinsic passivation layer and an N-type doping layer on the surface of the suede away from the initial substrate to form a heterojunction battery substrate.

[0090] Comparative Example 1

[0091] A conventional back-polished substrate is used as a heterojunction battery substrate. The preparation method of the heterojunction battery substrate provided in this comparative example comprises the following steps:

[0092] S1 performs a first pre-cleaning treatment, a rough polishing treatment, a double-sided texturing treatment, a second pre-cleaning treatment, and an oxidation layer removal treatment on the original silicon wafer in sequence to obtain an initial substrate;

[0093] In the first pre-cleaning treatment, the cleaning reagent includes: 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0094] In the rough polishing treatment, the rough polishing reagent includes: 2wt% alkali solution, the alkali is KOH, the temperature is 80°C, and the time is 1.5min;

[0095] In the double-sided texturing treatment, the texturing agent includes 1wt% alkali solution and 0.5wt% texturing additive, the temperature is 80°C, the time is 480s, the alkali is KOH, and the texturing additive is a large velvet additive (Tuobang V2S2;

[0096] The second pre-cleaning treatment includes alkaline cleaning treatment and acid cleaning treatment in sequence. In the alkaline cleaning treatment, the cleaning reagents are 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min; in the acid cleaning treatment, the cleaning reagents include: 1wt% hydrochloric acid and 1wt% hydrogen peroxide, the temperature is 65°C, and the time is 2min;

[0097] In the treatment of removing the oxide layer, the reagent used was 8 wt % hydrofluoric acid, the temperature was 25° C., and the time was 2 min;

[0098] 2) The initial substrate obtained in step S1 is oxidized on both sides by a diffusion furnace to obtain a dense silicon oxide film, and then the silicon oxide film on the first surface of the initial substrate is removed by a chain pickling device;

[0099] S3: performing a second cleaning treatment on the initial substrate obtained in step S2 using a cleaning agent, and then polishing the first surface of the initial substrate using an alkaline back-polishing agent, so that the first surface of the initial substrate forms a polished surface, and then performing alkaline cleaning treatment and acid cleaning treatment in sequence, wherein the second surface is arranged opposite to the first surface;

[0100] In the second cleaning process, the cleaning reagent includes: 1wt% alkali solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0101] In the polishing treatment, the alkali back-polishing agent includes 1wt% of alkali solution and 0.6wt% of back-polishing additive, the temperature is 80°C, the time is 240s, the alkali is KOH, and the back-polishing additive is a conventional back-polishing additive;

[0102] In the alkaline cleaning treatment, the cleaning reagent includes: 1wt% alkaline solution and 1wt% hydrogen peroxide, the alkali is KOH, the temperature is 80°C, and the time is 2min;

[0103] In the acid cleaning treatment, the cleaning reagent includes: 1wt% hydrochloric acid and 1wt% hydrogen peroxide, the temperature is 65°C, and the time is 2min;

[0104] 4) A first intrinsic passivation layer is deposited on the polished surface of the initial substrate by PECVD, and a second intrinsic passivation layer is deposited on the velvet surface of the initial substrate by PECVD. Then, a P-type doped layer is deposited on the surface of the first intrinsic passivation layer away from the initial substrate by PECVD, and an N-type doped layer is deposited on the surface of the second intrinsic passivation layer away from the initial substrate by PECVD to form a heterojunction battery substrate.

[0105] Application Example 1 and Application Comparative Example 1

[0106] The method for preparing the heterojunction solar cell provided in the application example and the application comparative example comprises the following steps:

[0107] Conductive films were deposited on both sides of the heterojunction battery substrates prepared in Example 1 and Comparative Example 1 using physical vapor deposition, and then silver electrodes were prepared by screen printing. Electrodes were prepared on the surface of the conductive film away from the substrate to obtain the heterojunction solar cell.

[0108] The short-circuit current (Jsc), open-circuit voltage (Uoc), fill factor (FF) and photoelectric conversion efficiency (Eta) of the heterojunction solar cells prepared in Application Example 1 and Application Comparative Example 1 were tested using a halm high-precision IV testing device. The results are shown in Table 1.

[0109] The weight of the heterojunction solar cells prepared in Application Example 1 and Application Comparative Example 1 was measured using an electronic balance. The results are shown in Table 1.

[0110] Fragmentation rate = (number of heterojunction cell substrates / initial number of substrates) × 100%

[0111] Table 1

[0112]

[0113] According to Table 1, the fragmentation rate of the heterojunction battery substrate in the embodiment of the present invention is lower than that of the heterojunction battery substrate in the comparative example. At the same time, the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the heterojunction solar cell in the application embodiment are better than those of the heterojunction solar cell in the application comparative example. This is because the silicon nitride layer protects the back of the initial substrate as a protective layer in the texturing process. On the one hand, it prevents the initial substrate from being further thinned, thereby reducing the fragmentation rate of the heterojunction battery substrate. On the other hand, it improves the flatness of the back of the heterojunction battery substrate, increases the secondary reflection absorption of the incident light, and thus improves the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the heterojunction solar cell. In addition, the annealing and hydrogenation of silicon nitride enhance the interface passivation effect, further improving the open circuit voltage of the heterojunction solar cell.

[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a heterojunction battery substrate, characterized in that: include: S1: after depositing an intrinsic passivation layer, a first doping layer and a silicon nitride layer on a first surface of an initial substrate in sequence, annealing is performed to obtain an intermediate substrate, wherein the refractive index of the silicon nitride layer is 1.5-2; S2: performing a texturing treatment on the intermediate substrate using a texturing agent to form a textured surface on the second surface of the intermediate substrate, and then performing a first cleaning treatment, and then performing a treatment to remove the silicon nitride layer and an oxidation layer on the intermediate substrate, wherein the second surface is arranged opposite to the first surface; S3: depositing an intrinsic passivation layer and a second doping layer in sequence on a surface of the suede surface away from the initial substrate to form a heterojunction battery substrate.

2. The method for preparing a heterojunction battery substrate according to claim 1, characterized in that: The initial substrate is obtained by sequentially performing a first pre-cleaning treatment, a rough polishing treatment, a second pre-cleaning treatment and an oxidation layer removal treatment on an original silicon wafer; In the rough polishing treatment, the rough polishing reagent includes: 0.001-10wt% alkali solution.

3. The method for preparing a heterojunction battery substrate according to claim 2, characterized in that: The oxidation layer removal treatment of the original silicon wafer includes: using 0.5-10wt% hydrofluoric acid to remove the oxidation layer of the original silicon wafer; and / or, The treatment of removing the silicon nitride layer and the oxide layer of the intermediate substrate includes: using 0.5-10 wt % of hydrofluoric acid to remove the silicon nitride layer and the oxide layer of the intermediate substrate.

4. The method for preparing a heterojunction battery substrate according to claim 1, characterized in that: The silicon nitride layer is obtained by chemical vapor deposition; The temperature of the chemical vapor deposition is less than 210°C; The thickness of the silicon nitride layer is 20-500 nm.

5. The method for preparing a heterojunction battery substrate according to claim 4, characterized in that: In the annealing treatment, the temperature is 100-200° C. and the time is 5-30 minutes.

6. The method for preparing a heterojunction battery substrate according to any one of claims 1 to 5, characterized in that: The first doped layer includes a P-type doped layer; and / or, The second doped layer includes an N-type doped layer.

7. The method for preparing a heterojunction battery substrate according to any one of claims 1 to 5, characterized in that: A second cleaning process is also included before the texturing process. The cleaning reagents of the second cleaning process include: 0.01-10wt% alkali solution and 0.01-10wt% hydrogen peroxide.

8. The method for preparing a heterojunction battery substrate according to any one of claims 1 to 5, characterized in that: The first cleaning treatment includes an alkaline cleaning treatment and an acidic cleaning treatment in sequence; In the alkaline cleaning treatment, the cleaning reagent includes: 0.1-10wt% alkali solution and 0.1-10wt% hydrogen peroxide; in the acidic cleaning treatment, the cleaning reagent includes: 0.1-10wt% hydrochloric acid and 0.1-10wt% hydrogen peroxide.

9. The method for preparing a heterojunction battery substrate according to any one of claims 1 to 5, characterized in that: The texturing agent comprises: 0.001-10wt% of alkali solution and 0.001-10wt% of texturing additive; and / or, In the texturing process, the temperature is 50-85° C. and the time is 300-600 seconds.

10. A method for preparing a heterojunction solar cell, characterized in that: The method comprises preparing a heterojunction battery substrate by using the method for preparing a heterojunction battery substrate according to any one of claims 1 to 9; The heterojunction solar cell is formed by depositing a conductive film on the heterojunction cell substrate and preparing electrodes.