Isolation communication circuit

Abstract

The invention belongs to the field of battery management, and particularly relates to an isolation communication circuit. A switching circuit, a first power supply end, a first enabling end and a first output end are arranged in a first communication circuit, the first power supply end is connected with an external first input power supply, and the first enabling end is connected with a signal output end of the first communication circuit; the voltage conversion circuit is provided with a first input end, a second output end and a first grounding end, the first input end is connected with the first output end, the second output end is connected with the load circuit, the first grounding end is connected with the first reference ground, and the voltage conversion circuit outputs an isolated power supply through the second output end according to the first reference ground. The first reference ground is arranged at the grounding end of the BMS power supply end and the load circuit, so that when the switching circuit is not opened, the grounding end of the power supply is isolated from the grounding end of the load, the voltage conversion circuit is arranged to stabilize the voltage of the circuit to the power utilization voltage suitable for the load, and the circuit achieves BMS power supply isolation which is simple in structure and low in cost.

Description

Technical Field

[0001] The present technology belongs to the field of battery management, and in particular relates to an isolated communication circuit. Background Art

[0002] With the development of lithium battery power supply systems, more and more battery projects require that the communication lines with the charger or load control can be isolated to avoid some threats to system safety caused by high voltage or backflow.

[0003] In existing technologies, there are many ways to isolate lithium battery power supply systems, such as optocouplers, digital isolation ICs, etc. However, isolation through optocouplers will reduce the communication rate and cannot meet the current high-speed communication needs. Full circuit isolation through digital ICs is not suitable for mass production due to its high cost. Summary of the invention

[0004] In order to solve the above problems, the present invention proposes an isolated communication circuit, which is isolated and prevents high-voltage backflow through a switch isolation circuit, and the voltage conversion circuit stabilizes the power supply voltage of the power supply to the voltage range required by the load, thereby avoiding the use of high-cost circuit components such as optocouplers and digital ICs, thereby reducing costs.

[0005] The purpose of the invention is achieved through the following technical solutions:

[0006] An isolated communication circuit, applied to a first communication circuit, comprising:

[0007] The switch isolation circuit is provided with a first power supply terminal, a first enable terminal and a first output terminal, the first power supply terminal is connected to an external first input power supply, and the first enable terminal is connected to a signal output terminal of the first communication circuit;

[0008] The voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal. The first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, the first ground terminal is connected to the first reference ground, and the voltage conversion circuit outputs an isolated power supply through the second output terminal according to the first reference ground.

[0009] In the first communication circuit, a switch circuit is provided, a first power supply terminal, a first enable terminal and a first output terminal are provided, the first power supply terminal is connected to the external first input power supply, and the first enable terminal is connected to the signal output terminal of the first communication circuit; and a voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal, the first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, the first ground terminal is connected to the first reference ground, and the voltage conversion circuit outputs the isolated power supply through the second output terminal according to the first reference ground. At the ground terminal of the BMS power supply terminal, the load circuit is provided with a first reference ground, so that when the switch circuit is not turned on, the ground terminal of the power supply and the ground terminal of the load are isolated respectively, and a voltage conversion circuit is provided to stabilize the voltage of the circuit to a power voltage suitable for the load, and the circuit realizes BMS power supply isolation with a simple structure and low cost.

[0010] In some embodiments, the switch isolation circuit includes a switch circuit, an isolation circuit, and a switch circuit; the switch circuit is provided with a second input terminal and a third output terminal; the isolation circuit includes a third input terminal and a fourth output terminal; the second input terminal is connected to the first enable terminal, the third output terminal is connected to the second input terminal, the third output terminal is connected to the first output terminal, and the fourth output terminal is connected to the first output terminal.

[0011] The switch isolation circuit realizes the on-off of the circuit through the switch circuit. The power supply can be cut off through the switch circuit, and the connection between the ground terminal and the first reference ground can also be cut off. At the same time, an isolation circuit is set to prevent additional current from flowing back into the BMS terminal and causing damage to the BMS.

[0012] In some embodiments, the switch circuit includes a first resistor, a second resistor, a third resistor, a first MOS transistor, and a second MOS transistor; the first MOS transistor is an N-channel MOS transistor, and the second MOS transistor is a P-channel MOS transistor;

[0013] One end of the first resistor is connected to the first enable end, and the other end of the first resistor is connected to one end of the second resistor and the gate of the first MOS tube; the source of the first MOS tube is connected to the gate of the second MOS tube and one end of the third resistor; the other end of the third resistor is connected to the source of the second MOS tube and the first power supply end; the drain is connected to the third output end and the second input end; the other end of the second resistor, the drain of the first MOS tube and the ground end are connected.

[0014] The switch circuit is turned on and off by the MOS tube, and the gate of the first MOS tube is controlled by the first enable terminal to control the on and off of the second MOS tube, and the second MOS tube turns on and off the power supply terminal, so that the on and off of the entire switch circuit can be controlled by the first enable terminal.

[0015] In some embodiments, the isolation circuit includes a first diode, and the first diode is provided with an anode terminal and a cathode terminal; the anode terminal is connected to the third input terminal and the third output terminal; the cathode terminal is connected to the first output terminal and the fourth output terminal.

[0016] By setting a diode and utilizing the unidirectional flow characteristic of the diode, it is possible to prevent reverse current from rushing into the BMS battery terminal through simple circuit devices.

[0017] In some embodiments, the voltage conversion circuit includes a step-down chip, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor; the step-down chip is provided with a first voltage input terminal, a first voltage output terminal, and a step-down ground terminal;

[0018] The first voltage input terminal is connected to the first output terminal, one end of the first capacitor, and the first end of the second capacitor; the first voltage output terminal, the second output terminal, one end of the third capacitor, and one end of the fourth capacitor are connected; the step-down ground terminal, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are connected to the first reference ground.

[0019] An anti-reverse diode is set through the step-down chip to prevent the current from flowing in the opposite direction, and isolation and backflow are achieved through a simple structure.

[0020] In some embodiments, a power supply circuit and a load circuit are further included, wherein the load circuit is provided with a load input terminal, and the power supply circuit is provided with a first power supply output terminal and a second power supply output terminal, wherein the first power supply output terminal is connected to the first power supply terminal, and the second power supply output terminal is connected to the first enable terminal;

[0021] The load input terminal is connected to the second output terminal to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

[0022] The power supply circuit and the load circuit are arranged at both ends of the switch isolation circuit and the voltage conversion circuit to perform electrical isolation.

[0023] In some embodiments, a second communication circuit is further included, and the second communication circuit is arranged between the power supply circuit and the load circuit; the power supply circuit is provided with a first signal output terminal and a first signal input terminal; the load circuit is provided with a second signal output terminal and a second signal input terminal; the second communication circuit is provided with a communication isolation chip, a fifth capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; the communication isolation chip is provided with a first isolation power supply terminal, a second isolation power supply terminal, a third signal input terminal, a third signal output terminal, a fourth signal input terminal, a fourth signal output terminal, a first isolation ground terminal, and a second isolation ground terminal;

[0024] The first isolated power supply terminal is connected to the first enable terminal, one end of the fourth resistor, and one end of the fifth capacitor; the second isolated power supply terminal is connected to the fourth output terminal and the first output terminal; one end of the fifth resistor is connected to the first signal input terminal; the other end of the fifth resistor is connected to the third signal output terminal; one end of the sixth resistor is connected to the first signal output terminal; the other end of the sixth resistor is connected to the third signal input terminal; one end of the seventh resistor is connected to the second signal output terminal; the other end of the seventh resistor is connected to the fourth signal input terminal; one end of the eighth resistor is connected to the second signal input terminal; the other end of the eighth resistor is connected to the fourth signal output terminal; the first isolated ground terminal is grounded, and the second isolated ground terminal is connected to the first reference ground terminal.

[0025] The second communication circuit is a signal isolation circuit, which isolates the signal reception and signal transmission on both sides of the power supply end and the load end through the communication isolation chip, further improving the isolation capability of the overall circuit. The voltage conversion circuit can also output isolation voltage for the communication isolation chip.

[0026] In some embodiments, the power supply circuit includes a battery power supply circuit, an analog front-end circuit, and a first control circuit; the battery power supply circuit includes a battery pack, a third MOS tube, a fourth MOS tube, and a fuse; the positive electrode of the battery pack is connected to one end of the fuse; the other end of the fuse is connected to the source of the third MOS tube; the drain of the third MOS tube is connected to the drain of the fourth MOS tube; the source of the fourth MOS tube is connected to the cathode of the battery pack; wherein the third MOS tube and the fourth MOS tube are both N-channel MOS tubes.

[0027] The power supply circuit is powered by a battery pack, and an analog front-end circuit is set to monitor the operating status of the battery pack such as voltage and current, and perform signal processing; at the same time, a first control circuit is set to perform power supply control, such as first enable terminal control, and to send and receive signals.

[0028] In some embodiments, the analog front-end circuit includes an analog front-end chip; the analog front-end chip includes a plurality of second voltage input terminals, a first control terminal, a second control terminal, a first serial data terminal, and a first serial clock terminal; the first control circuit includes a first control chip, a ninth resistor, a tenth resistor, and a plurality of eleventh resistors; the first control chip is provided with a second serial data terminal, a second serial clock terminal, a third voltage input terminal, and a third ground terminal, and the first enable terminal, the first signal output terminal, and the first signal input terminal are all provided on the first control chip; the battery pack is provided with a second voltage output terminal between two batteries;

[0029] The second voltage output terminal is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the second voltage input terminal; the first control terminal is connected to the gate of the third MOS tube, and the second control terminal is connected to the gate of the fourth MOS tube; one end of the ninth resistor is connected to the first serial data terminal, and the other end of the ninth resistor is connected to the second serial data terminal; one end of the tenth resistor is connected to the first serial clock terminal, and the other end of the tenth resistor is connected to the second serial clock terminal; the third voltage input terminal is connected between one end of the fuse and the drain of the third MOS tube; and the third ground terminal is grounded.

[0030] The analog front-end chip is connected between two batteries and controls the on and off of the power supply circuit through the control end to prevent load damage caused by power supply abnormalities or short circuits, and to prevent damage to the battery pack caused by current backflow, while also further improving the circuit isolation capability.

[0031] In some embodiments, the load circuit includes a second control circuit; the second control circuit is provided with a second control chip, the second control chip is provided with a fourth ground terminal and a fourth voltage input terminal, and the second signal output terminal and the second signal input terminal are both provided on the second control chip; the fourth ground terminal is connected to the first reference ground, and the fourth voltage input terminal is connected between one end of the fuse and the drain of the third MOS tube.

[0032] The load circuit is provided with a second control chip, which is powered by the BMS power supply system, so that the second control chip can be driven or control other load circuits. At the same time, the second control chip can be used to further isolate other load circuits. When power supply abnormalities or load abnormalities occur, the circuit connection can be cut off in time through the second control chip.

[0033] The beneficial effect of an isolated communication circuit of the present invention is

[0034] In the first communication circuit, a switch circuit is provided, a first power supply terminal, a first enable terminal and a first output terminal are provided, the first power supply terminal is connected to the external first input power supply, and the first enable terminal is connected to the signal output terminal of the first communication circuit; and a voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal, the first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, the first ground terminal is connected to the first reference ground, and the voltage conversion circuit outputs the isolated power supply through the second output terminal according to the first reference ground. At the ground terminal of the BMS power supply terminal, the load circuit is provided with a first reference ground, so that when the switch circuit is not turned on, the ground terminal of the power supply and the ground terminal of the load are isolated respectively, and a voltage conversion circuit is provided to stabilize the voltage of the circuit to a power voltage suitable for the load, and the circuit realizes BMS power supply isolation with a simple structure and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1A framework diagram of an isolated communication circuit of the present invention;

[0036] Figure 2 A circuit body of an isolated communication circuit of the present invention;

[0037] Figure 3 A switch isolation circuit for isolating a communication circuit according to the present invention;

[0038] Figure 4 A voltage conversion circuit for an isolated communication circuit of the present invention;

[0039] Figure 5 This is a second communication circuit of an isolated communication circuit of the present invention.

[0040] Reference numerals:

[0041] R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; R7, seventh resistor; R8, eighth resistor; R9, ninth resistor; R10, tenth resistor; R11, eleventh resistor;

[0042] C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor;

[0043] D1, first diode;

[0044] Q1, first MOS tube; Q2, second MOS tube; Q3, third MOS tube; Q4, fourth MOS tube;

[0045] U1, step-down chip; U2, communication isolation chip; U3, analog front-end chip; U4, first control chip; U5, second control chip;

[0046] POWER_1, first power supply terminal; U4_5, first enable terminal; GND, first ground terminal; P-, first reference ground; U1_1, first voltage input terminal; U1_2, first voltage output terminal; U1_3, step-down ground terminal; U2_1, first isolated power supply terminal; U2_2, second isolated power supply terminal; U2_3, third signal input terminal; U2_4, third signal output terminal; U2_5, fourth signal input terminal; U2_6, fourth signal output terminal; U2_7, fourth signal input terminal; U2_8, fourth signal output terminal; U2_9, fourth signal input terminal; U2_10, first isolated power supply terminal; U2_210, second isolated power supply terminal; U2_320, third signal input terminal; U2_43, third signal output terminal; U2_540, fourth signal input terminal; U2_6540, fourth signal output terminal; U2_7, fourth signal output terminal; U2_8, fourth signal input terminal; U2_9, _7, first isolation ground terminal; U2_8, second isolation ground terminal; U3_1, second voltage input terminal; U3_2, first control terminal; U3_3, second control terminal; U3_4, first serial data terminal; U3_5, first serial clock terminal; U4_1, second serial data terminal; U4_2, second serial clock terminal; U4_3, third voltage input terminal; U4_4, third ground terminal; U4_7, first signal output terminal; U4_8, first signal input terminal;

[0047] U5_1, a fourth ground terminal; U5_2, a fourth voltage input terminal; U5_3, a second signal output terminal; U5_4, a first signal input terminal;

[0048] F1, fuse. DETAILED DESCRIPTION

[0049] It should be noted that, in the absence of conflict, the embodiments of the present invention and the technical features in the embodiments may be combined with each other, and the detailed descriptions in the specific implementation methods should be understood as explanations of the purpose of the present invention and should not be regarded as improper limitations on the present invention.

[0050] To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the specific technical solution of the present invention will be further described in detail below in conjunction with the drawings in the embodiments of the present invention. The following embodiments are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0051] In the embodiments of the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, unless otherwise specified, "plurality" means two or more.

[0052] In addition, in the embodiments of the present invention, directional terms such as "up", "down", "left" and "right" are defined relative to the orientation of the components in the drawings. It should be understood that these directional terms are relative concepts. They are used for relative description and clarification, and they may change accordingly according to the changes in the orientation of the components in the drawings.

[0053] In the embodiments of the present invention, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0054] In the embodiments of the present invention, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0055] In the embodiments of the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present the related in a specific way.

[0056] Embodiment 1:

[0057] like Figure 1 to Figure 5 As shown, the present invention proposes an isolation communication circuit, which is applied to a first communication circuit, comprising:

[0058] The switch isolation circuit is provided with a first power supply terminal POWER_1, a first enable terminal U4_5 and a first output terminal, the first power supply terminal POWER_1 is connected to an external first input power supply, and the first enable terminal U4_5 is connected to a signal output terminal of the first communication circuit;

[0059] A voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal GND, the first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, the first ground terminal GND is connected to the first reference ground P-, and the voltage conversion circuit outputs an isolated power supply through the second output terminal according to the first reference ground P-.

[0060] Specifically, a switch isolation circuit and a voltage conversion circuit are arranged between the first communication circuit, and the circuit is turned on and off by the switch isolation circuit. The on and off mode is preferably a combination switch circuit of a MOS tube. The optional scheme is to control the on and off of the base of the transistor by combining with a triode to realize the circuit opening and closing, or to control the gate of the MOS tube by a combination of a MOS tube and a triode, or to control the on and off of the circuit by the base of the triode, and to arrange an isolation element or circuit in front of the switch circuit to realize the isolation of the circuit and prevent the backflow of the current from causing damage to the circuit at the BMS end. At the same time, in order to stabilize the voltage of the circuit in the voltage range commonly used by the load, a voltage conversion circuit is also arranged, which can realize the voltage drop and voltage stabilization by converting the high voltage output by the BMS battery pack into a low voltage form. Further, a ground terminal is arranged on the switch isolation circuit, and a first reference ground P-terminal P- is arranged on the voltage conversion circuit. Through ground isolation, isolation of both ends is realized, and an isolation point is formed between the switch isolation circuit and the voltage conversion circuit. The switch isolation circuit and the input power supply are unisolated power supplies, and the voltage conversion circuit to the output load circuit is an isolation terminal. The voltage conversion circuit is preferably a step-down chip U1, or a step-down form such as a voltage divider resistor.

[0061] In the first communication circuit, a switch circuit is provided, a first power supply terminal POWER_1, a first enable terminal U4_5 and a first output terminal are provided, the first power supply terminal POWER_1 is connected to the external first input power supply, and the first enable terminal U4_5 is connected to the signal output terminal of the first communication circuit; and a voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal GND, the first input terminal is connected to the first output terminal, the second output terminal is connected to the load circuit, the first ground terminal GND is connected to the first reference ground P-, and the voltage conversion circuit outputs the isolated power supply through the second output terminal according to the first reference ground P-. At the ground terminal of the BMS power supply terminal, the load circuit is provided with a first reference ground P-, so that when the switch circuit is not turned on, the ground terminal of the power supply and the ground terminal of the load are respectively isolated, and a voltage conversion circuit is provided to stabilize the voltage of the circuit to a power voltage suitable for the load, and the circuit realizes BMS power supply isolation with a simple structure and low cost. At the same time, the switch isolation circuit can also be an optocoupler chip, or a digital isolation IC. Although it can play the role of switching and isolation at the same time, the cost of using the chip is relatively high compared with simple electrical components.

[0062] In some embodiments, the switch isolation circuit includes a switch circuit, an isolation circuit, and a switch circuit; the switch circuit is provided with a second input terminal and a third output terminal; the isolation circuit includes a third input terminal and a fourth output terminal; the second input terminal is connected to the first enable terminal U4_5, the third output terminal is connected to the second input terminal, the third output terminal is connected to the first output terminal, and the fourth output terminal is connected to the first output terminal.

[0063] Specifically, the switch isolation circuit includes a switch circuit and an isolation circuit; the switch circuit is used to turn on and off the switch isolation circuit, and the isolation circuit is used to isolate the reverse surge current and isolate the voltage of the power input terminal and the load circuit. The switch circuit can be a combination switch circuit whose on-off mode is preferably a MOS tube. The optional scheme is to control the on-off of the base of the transistor through a combination of transistors to realize the opening and closing of the circuit, or to use a combination of MOS tubes and transistors to control the gate of the MOS tube, or the base of the transistor to control the on-off of the circuit, and an isolation element or circuit is set in front of the switch circuit to achieve circuit isolation and prevent the reverse surge of the current from causing damage to the circuit at the BMS end. The isolation circuit uses a device that can flow in one direction, or a device that can control the unidirectional flow direction, such as an optocoupler chip, a diode, a thyristor, a field effect transistor, etc.

[0064] The switch isolation circuit realizes the on-off of the circuit through the switch circuit. The power supply can be cut off through the switch circuit, and the connection between the ground terminal and the first reference ground P- can also be cut off. At the same time, an isolation circuit is set to prevent additional current from flowing back into the BMS terminal and causing damage to the BMS.

[0065] In some embodiments, the switch circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first MOS transistor Q1, and a second MOS transistor Q2; the first MOS transistor Q1 is an N-channel MOS transistor, and the second MOS transistor Q2 is a P-channel MOS transistor;

[0066] One end of the first resistor R1 is connected to the first enable terminal U4_5, and the other end of the first resistor R1 is connected to one end of the second resistor R2 and the gate of the first MOS transistor Q1; the source of the first MOS transistor Q1 is connected to the gate of the second MOS transistor Q2 and one end of the third resistor R3; the other end of the third resistor R3 is connected to the source of the second MOS transistor Q2 and the first power supply terminal POWER_1; the drain is connected to the third output terminal and the second input terminal; the other end of the second resistor R2, the drain of the first MOS transistor Q1 and the ground terminal are connected.

[0067] Preferably, dual MOS tubes are used to control the switch, which improves the control efficiency and has strong stability, and has low power consumption and low load on the circuit. The gate of the first MOS tube Q1 is controlled by the first enable terminal U4_5, so that the first MOS tube Q1 is turned on, and the gate of the second MOS tube Q2 is turned on, so that the first power supply terminal POWER_1 can conduct through the second MOS tube Q2. In the commonly used setting, the first power supply terminal POWER_1 is set to 5V, the first resistor R1 can use a 1KΩ±5% model, the second resistor R2 can use a 51KΩ±1% model, the third resistor R3 can use a 100KΩ±1% model, the first MOS tube Q1 can use a T2N7002BK model, and the second MOS tube Q2 can use the relevant signal of BSS84SOT-23.

[0068] The switch circuit is turned on and off by the MOS tube, and the gate of the first MOS tube Q1 is controlled by the first enable terminal U4_5, thereby controlling the on and off of the second MOS tube Q2, and enabling the second MOS tube Q2 to turn on and off the power supply terminal, thereby enabling the on and off of the entire switch circuit to be controlled by the first enable terminal U4_5.

[0069] In some embodiments, the isolation circuit includes a first diode D1, and the first diode D1 is provided with an anode terminal and a cathode terminal; the anode terminal is connected to the third input terminal and the third output terminal; the cathode terminal is connected to the first output terminal and the fourth output terminal.

[0070] Preferably, the first diode D1 is of model 1SS355-TP.

[0071] By setting a diode and utilizing the unidirectional flow characteristic of the diode, it is possible to prevent reverse current from rushing into the BMS battery terminal through simple circuit devices.

[0072] In some embodiments, the voltage conversion circuit includes a buck chip U1, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4; the buck chip U1 is provided with a first voltage input terminal U1_1, a first voltage output terminal U1_2, and a buck ground terminal U1_3;

[0073] The first voltage input terminal U1_1 is connected to the first output terminal, one end of the first capacitor C1, and the first end of the second capacitor C2; the first voltage output terminal U1_2, the second output terminal, one end of the third capacitor C3, and one end of the fourth capacitor C4 are connected; the step-down grounding terminal U1_3, the other end of the first capacitor C1, the other end of the second capacitor C2, the other end of the third capacitor C3, and the other end of the fourth capacitor C4 are connected to the first reference ground P-.

[0074] Specifically, the step-down chip U1 can adopt a chip related to SGM2203, which can convert 5V input into 3V3 output. At the same time, the first capacitor C1 can adopt a 4.7μF related model capacitor, the second capacitor C2 can adopt a 0.1μF related model capacitor, the third capacitor C3 can adopt a 4.7μF related model capacitor, and the fourth capacitor C4 can adopt a 0.1μF related model capacitor.

[0075] An anti-reverse diode is set through the buck chip U1 to prevent the current from flowing in the opposite direction, and isolation and backflow are achieved through a simple structure.

[0076] Embodiment 2:

[0077] Reference Figure 2 Based on Example 1, this embodiment optimizes and explains the circuit mentioned in Example 1.

[0078] In some embodiments, it also includes a power supply circuit and a load circuit, the load circuit is provided with a load input terminal, the power supply circuit is provided with a first power supply output terminal and a second power supply output terminal, the first power supply output terminal is connected to the first power supply terminal POWER_1, and the second power supply output terminal is connected to the first enable terminal U4_5;

[0079] The load input terminal is connected to the second output terminal to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

[0080] Specifically, the power supply circuit is a BMS power supply circuit, which is powered by a BMS power supply battery pack, outputs a 5V power supply of the first power supply terminal POWER_1 through the first power supply output terminal, and controls the gate of the first MOS tube Q1 through the second power supply output terminal to realize the on and off of the switch isolation circuit.

[0081] The power supply circuit and the load circuit are arranged at both ends of the switch isolation circuit and the voltage conversion circuit to perform electrical isolation.

[0082] In some embodiments, a second communication circuit is further included, and the second communication circuit is arranged between the power supply circuit and the load circuit; the power supply circuit is provided with a first signal output terminal U4_7 and a first signal input terminal U5_4U4_8; the load circuit is provided with a second signal output terminal U5_3 and a second signal input terminal; the second communication circuit is provided with a communication isolation chip U2, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8; the communication isolation chip U2 is provided with a first isolation power supply terminal U2_1, a second isolation power supply terminal U2_2, a third signal input terminal U2_3, a third signal output terminal U2_4, a fourth signal input terminal U2_5, a fourth signal output terminal U2_6, a first isolation ground terminal U2_7, and a second isolation ground terminal U2_8;

[0083] The first isolated power supply terminal U2_1 is connected to the first enable terminal U4_5, one end of the fourth resistor R4, and one end of the fifth capacitor C5; the second isolated power supply terminal U2_2 is connected to the fourth output terminal and the first output terminal; one end of the fifth resistor R5 is connected to the first signal input terminal U5_4U4_8; the other end of the fifth resistor R5 is connected to the third signal output terminal; one end of the sixth resistor R6 is connected to the first signal output terminal U4_7; the other end of the sixth resistor R6 is connected to the third signal input terminal U2_3; one end of the seventh resistor R7 is connected to the second signal output terminal U5_3; the other end of the seventh resistor R7 is connected to the fourth signal input terminal U2_5; one end of the eighth resistor R8 is connected to the second signal input terminal; the other end of the eighth resistor R8 is connected to the fourth signal output terminal U2_6; the first isolated grounding terminal U2_7 is grounded, and the second isolated grounding terminal U2_8 is connected to the first reference ground P-terminal.

[0084] Specifically, the second communication circuit is arranged between the power supply circuit and the load circuit, and a communication transceiver port is often arranged on the power supply circuit and the load circuit. The second communication circuit is used to isolate the communication transceiver port between the power supply end and the load circuit to prevent mutual interference of signals between the power supply circuit and the load circuit. Among them, the communication isolation chip U2 can adopt the relevant digital isolation chip of the π122u31 model, which can provide one end for the power supply circuit input, which includes the power supply circuit input, namely the first isolated power supply end U2_1, the power supply circuit transceiver, namely the third signal input end U2_3 and the third signal output end U2_4, and the power supply circuit ground end, namely the first isolated ground end U2_7; at the same time, the other end is provided as the load circuit voltage input end, namely the second isolated power supply end U2_2 after input through the voltage conversion circuit; and the signal transceiver in the load circuit, namely the fourth signal input end U2_5 and the fourth signal output end U2_6; the second isolated ground end U2_8 of the first reference ground P-. Among them, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 can all be set to 100Ω±5%. The fifth capacitor C5 can be set to 0.1 μF.

[0085] The second communication circuit is a signal isolation circuit, which isolates the signal reception and signal transmission on both sides of the power supply end and the load end through the communication isolation chip U2, further improving the isolation capability of the overall circuit. The voltage conversion circuit can also output isolation voltage for the communication isolation chip U2.

[0086] Embodiment 3:

[0087] Please refer to Figure 2 Based on Example 1 and Example 2, this embodiment further illustrates the power supply circuit and the load circuit mentioned in the above embodiments.

[0088] In some embodiments, the power supply circuit includes a battery power supply circuit, an analog front-end circuit, and a first control circuit; the battery power supply circuit includes a battery pack, a third MOS tube Q3, a fourth MOS tube Q4, and a fuse F1; the positive electrode of the battery pack is connected to one end of the fuse F1; the other end of the fuse F1 is connected to the source of the third MOS tube Q3; the drain of the third MOS tube Q3 is connected to the drain of the fourth MOS tube Q4; the source of the fourth MOS tube Q4 is connected to the cathode of the battery pack; wherein the third MOS tube Q3 and the fourth MOS tube Q4 are both N-channel MOS tubes.

[0089] Specifically, the power supply circuit includes a battery power supply circuit, that is, a BMS battery pack and related circuits, and an analog front-end circuit, that is, a related circuit for detecting the operating status of the battery pack, and a first control circuit. The first control circuit is a circuit for controlling and receiving feedback from the load circuit, which can also control and switch the circuit to prevent the subsequent output from being affected when a voltage problem occurs in the circuit battery pack. Among them, the models of the third MOS tube Q3 and the fourth MOS tube Q4 can be consistent with the models of the first MOS tube Q1 and / or the second MOS tube Q2.

[0090] The power supply circuit is powered by a battery pack, and an analog front-end circuit is set to monitor the operating status of the battery pack such as voltage and current, and perform signal processing; at the same time, a first control circuit is set to perform power supply control, such as control of the first enable terminal U4_5, and to send and receive signals.

[0091] In some embodiments, the analog front-end circuit includes an analog front-end chip U3; the analog front-end chip U3 includes a plurality of second voltage input terminals U3_1, a first control terminal U3_2, a second control terminal U3_3, a first serial data terminal U3_4, and a first serial clock terminal U3_5; the first control circuit includes a first control chip U4, a ninth resistor R9, a tenth resistor R10, and a plurality of eleventh resistors R11; the first control chip U4 is provided with a second serial data terminal U4_1, a second serial clock terminal U4_2, a third voltage input terminal U4_3, and a third ground terminal U4_4, and the first enable terminal U4_5, the first signal output terminal U4_7, and the first signal input terminals U5_4U4_8 are all provided on the first control chip U4; the battery pack is provided with a second voltage output terminal between two batteries;

[0092] The second voltage output terminal is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the second voltage input terminal U3_1; the first control terminal U3_2 is connected to the gate of the third MOS tube Q3, and the second control terminal U3_3 is connected to the gate of the fourth MOS tube Q4; one end of the ninth resistor R9 is connected to the first serial data terminal U3_4, and the other end of the ninth resistor R9 is connected to the second serial data terminal U4_1; one end of the tenth resistor R10 is connected to the first serial clock terminal U3_5, and the other end of the tenth resistor R10 is connected to the second serial clock terminal U4_2; the third voltage input terminal U4_3 is connected between one end of the fuse F1 and the drain of the third MOS tube Q3; the third ground terminal U4_4 is grounded.

[0093] Specifically, the analog front-end circuit includes an analog front-end chip U3, which can be the MS99x0T series, including MS9920T\MS9930T, etc.; it can also be an ADI LTC6813 series chip, etc.; it can also be an ADS1278SHFQ series chip, or it can be a Jinghua Micro SDM911X series, etc. Among them, the first control terminal U3_2 and the second control terminal U3_3 respectively control the gates of the third MOS tube Q3 and the fourth MOS tube Q4 to ensure that the entire power supply circuit can be turned on and off in time. The ninth resistor R9 and the tenth resistor R10 can be determined according to the selection of the first control chip U4, or the voltage-dividing protection resistor of the conventional serial data connection can be selected. The eleventh resistor R11 is also selected according to the voltage-dividing resistor required by the battery of the selected BMS battery pack. The first control chip U4 is also an MCU, which can use 8-bit, 16-bit, and 32-bit MCU chips, and select relevant model chips such as ADI\TI\ST\NXP according to needs, wherein the first control chip U4 can be directly powered by the battery power supply circuit.

[0094] The analog front-end chip U3 is connected between two batteries and controls the on / off of the power supply circuit through the control end to prevent load damage caused by power supply abnormalities or short circuits, and to prevent damage to the battery pack caused by current backflow, while also further improving the circuit isolation capability.

[0095] In some embodiments, the load circuit includes a second control circuit; the second control circuit is provided with a second control chip U5, the second control chip U5 is provided with a fourth ground terminal U5_1, a fourth voltage input terminal U5_2, and the second signal output terminal U5_3 and the second signal input terminal are both provided on the second control chip U5; the fourth ground terminal U5_1 is connected to the first reference ground P-, and the fourth voltage input terminal U5_2 is connected between one end of the fuse F1 and the drain of the third MOS tube Q3.

[0096] Specifically, the second control chip U5 is also an MCU, and its selection can be based on the specific design of the circuit, or designed according to the load. The selection can be consistent with the first control chip U4, or a suitable chip can be selected from the above range for circuit design.

[0097] The load circuit is provided with a second control chip U5, which is powered by the BMS power supply system, so that the second control chip U5 can be driven or control other load circuits. At the same time, the second control chip U5 can be used to further isolate other load circuits. When power supply abnormality or load abnormality occurs, the circuit connection can be cut off in time by the second control chip U5.

[0098] The serial numbers of the embodiments of the invention are only for description and do not represent the advantages and disadvantages of the embodiments. The above are only preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent device or equivalent process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An isolated communication circuit, characterized in that: Applicable to a first communication circuit, comprising: A switch isolation circuit is provided with a first power supply terminal, a first enable terminal and a first output terminal, wherein the first power supply terminal is connected to an external first input power supply, and the first enable terminal is connected to a signal output terminal of the first communication circuit; A voltage conversion circuit is provided with a first input terminal, a second output terminal and a first ground terminal, wherein the first input terminal is connected to the first output terminal, the second output terminal is connected to a load circuit, the first ground terminal is connected to a first reference ground, and the voltage conversion circuit outputs an isolated power supply through the second output terminal according to the first reference ground.

2. The isolated communication circuit according to claim 1, characterized in that: The switch isolation circuit includes a switch circuit and an isolation circuit, wherein the switch circuit is provided with a second input terminal and a third output terminal; the isolation circuit includes a third input terminal and a fourth output terminal; the second input terminal is connected to the first enable terminal, the third output terminal is connected to the second input terminal, the third output terminal is connected to the first output terminal, and the fourth output terminal is connected to the first output terminal.

3. The isolated communication circuit according to claim 2, characterized in that: The switch circuit includes a first resistor, a second resistor, a third resistor, a first MOS transistor, and a second MOS transistor; the first MOS transistor is an N-channel MOS transistor, and the second MOS transistor is a P-channel MOS transistor; One end of the first resistor is connected to the first enable end, and the other end of the first resistor is connected to one end of the second resistor and the gate of the first MOS tube; The source of the first MOS tube is connected to the gate of the second MOS tube and one end of the third resistor; the other end of the third resistor is connected to the source of the second MOS tube and the first power supply end; The drain is connected to the third output terminal and the second input terminal; the other end of the second resistor and the drain of the first MOS tube are connected to the ground terminal.

4. The isolated communication circuit according to claim 2, characterized in that: The isolation circuit includes a first diode, and the first diode is provided with an anode end and a cathode end; the anode end is connected to the third input end and the third output end; the cathode end is connected to the first output end and the fourth output end.

5. The isolated communication circuit according to claim 2, characterized in that: The voltage conversion circuit includes a step-down chip, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor; the step-down chip is provided with a first voltage input terminal, a first voltage output terminal, and a step-down ground terminal; The first voltage input terminal is connected to the first output terminal, one end of the first capacitor, and the first end of the second capacitor; the first voltage output terminal, the second output terminal, one end of the third capacitor, and one end of the fourth capacitor are connected; The step-down ground terminal, the other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are connected to the first reference ground.

6. The isolated communication circuit according to claim 2, characterized in that: It also includes a power supply circuit and a load circuit, wherein the load circuit is provided with a load input terminal, and the power supply circuit is provided with a first power supply output terminal and a second power supply output terminal, wherein the first power supply output terminal is connected to the first power supply terminal, and the second power supply output terminal is connected to the first enable terminal; The load input terminal is connected to the second output terminal to isolate the power supply circuit and the load circuit through the switch isolation circuit and the voltage conversion circuit.

7. The isolated communication circuit according to claim 6, characterized in that: It also includes a second communication circuit, which is arranged between the power supply circuit and the load circuit; the power supply circuit is provided with a first signal output terminal and a first signal input terminal; the load circuit is provided with a second signal output terminal and a second signal input terminal; the second communication circuit is provided with a communication isolation chip, a fifth capacitor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; the communication isolation chip is provided with a first isolation power supply terminal, a second isolation power supply terminal, a third signal input terminal, a third signal output terminal, a fourth signal input terminal, a fourth signal output terminal, a first isolation ground terminal, and a second isolation ground terminal; The first isolated power supply terminal is connected to the first enable terminal, one end of the fourth resistor, and one end of the fifth capacitor; the second isolated power supply terminal is connected to the fourth output terminal and the first output terminal; one end of the fifth resistor is connected to the first signal input terminal; the other end of the fifth resistor is connected to the third signal output terminal; one end of the sixth resistor is connected to the first signal output terminal; the other end of the sixth resistor is connected to the third signal input terminal; one end of the seventh resistor is connected to the second signal output terminal; the other end of the seventh resistor is connected to the fourth signal input terminal; one end of the eighth resistor is connected to the second signal input terminal; the other end of the eighth resistor is connected to the fourth signal output terminal; the first isolated ground terminal is grounded, and the second isolated ground terminal is connected to the first reference ground terminal.

8. The isolated communication circuit according to claim 7, characterized in that: The power supply circuit includes a battery power supply circuit, an analog front-end circuit, and a first control circuit; the battery power supply circuit includes a battery pack, a third MOS tube, a fourth MOS tube, and a fuse; the positive electrode of the battery pack is connected to one end of the fuse; the other end of the fuse is connected to the source of the third MOS tube; the drain of the third MOS tube is connected to the drain of the fourth MOS tube; the source of the fourth MOS tube is connected to the cathode of the battery pack; wherein the third MOS tube and the fourth MOS tube are both N-channel MOS tubes.

9. The isolated communication circuit according to claim 8, characterized in that: The analog front-end circuit includes an analog front-end chip; the analog front-end chip includes a plurality of second voltage input terminals, a first control terminal, a second control terminal, a first serial data terminal, and a first serial clock terminal; the first control circuit includes a first control chip, a ninth resistor, a tenth resistor, and a plurality of eleventh resistors; the first control chip is provided with a second serial data terminal, a second serial clock terminal, a third voltage input terminal, and a third ground terminal, and the first enable terminal, the first signal output terminal, and the first signal input terminal are all provided on the first control chip; the battery pack is provided with a second voltage output terminal between two batteries; The second voltage output terminal is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the second voltage input terminal; the first control terminal is connected to the gate of the third MOS transistor, and the second control terminal is connected to the gate of the fourth MOS transistor; one end of the ninth resistor is connected to the first serial data terminal, and the other end of the ninth resistor is connected to the second serial data terminal; One end of the tenth resistor is connected to the first serial clock end, and the other end of the tenth resistor is connected to the second serial clock end; The third voltage input terminal is connected between one end of the fuse and the drain of the third MOS tube; the third ground terminal is grounded.

10. The isolated communication circuit according to claim 9, characterized in that: The load circuit includes a second control circuit; the second control circuit is provided with a second control chip, the second control chip is provided with a fourth ground terminal and a fourth voltage input terminal, and the second signal output terminal and the second signal input terminal are both arranged on the second control chip; the fourth ground terminal is connected to the first reference ground, and the fourth voltage input terminal is connected between one end of the fuse and the drain of the third MOS tube.

Images