Battery management system and passive equalization method for battery management system
By setting up a passive equalization circuit for some of the battery cells in the battery pack, and using high-power, low-resistance equalization resistors and high-power MOS tubes, the existing passive equalization technology has high complexity, increased cost and low balance efficiency. The problem has achieved the effect of simplifying the structure, reducing costs and improving balanced efficiency.
Patent Information
- Application Number
- CN202411651835.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-02-18
AI Technical Summary
The existing passive equalization technology has problems in battery management systems with high hardware and software design complexity, increased cost, insufficient balance current and inability to balance during charging and discharging.
Use a passive equalization circuit to set up a part of the battery cell in the battery pack, instead of a passive equalization circuit for each battery cell, and use a high-power, low-resistance equalization resistor and a high-power MOS tube, combined with an analog front-end chip. Passive balance control.
The structure of the passive equalization circuit is simplified, the hardware cost is reduced, the passive equalization current is improved, the equalization time is shortened, the passive equalization efficiency is improved, and the equalization can be achieved during the charging and discharging process.
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Figure CN119482835A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of battery management, and in particular to a battery management system and a passive balancing method for the battery management system. Background Art
[0002] The multi-cell energy storage system is composed of multiple battery packs. A battery pack consists of multiple cells connected in series, and the cells have a barrel effect. When one cell in the battery pack reaches the minimum discharge voltage first, the battery pack where this cell is located can no longer continue to discharge. When one cell in the battery pack reaches the maximum charge voltage first, the battery pack where this cell is located can no longer continue to charge. Therefore, a battery management system BMS (Battery Management System) is needed to manage the battery pack. One of the most important and commonly used technologies is to use passive balancing management technology to discharge the excess electricity of the cells in the battery pack, so that each cell in the battery pack has better consistency, so that the battery pack can charge and discharge more electricity.
[0003] The existing passive balancing is to set a passive balancing circuit for each cell in the battery pack, which increases the complexity of hardware and software design and hardware cost. In addition, the current balancing resistor discharges the cell with a maximum current of about 300mA. The balancing discharge time is very long, and balancing cannot be performed during the charging and discharging process, resulting in a poor balancing effect. Summary of the invention
[0004] A first aspect of the present invention provides a battery management system, comprising:
[0005] A battery pack, the battery pack comprising a plurality of battery cells connected in series;
[0006] A plurality of passive balancing circuits, wherein some of the plurality of battery cells are connected to corresponding passive balancing circuits;
[0007] An analog front-end chip, the analog front-end chip is connected to the plurality of passive equalization circuits, and is used to collect voltages of the plurality of battery cells and activate corresponding passive equalization circuits according to the voltages;
[0008] The part of battery cells is a predetermined number of battery cells having the highest voltage among the multiple battery cells during charging or discharging.
[0009] A second aspect of the present invention provides a passive balancing control method for a battery management system, wherein the passive balancing circuit in the battery management system according to the first aspect is used to passively balance corresponding cells, and the passive balancing control method comprises:
[0010] A collection step, when the battery pack is charged or discharged, the analog front-end chip collects the voltage of each battery cell and the onboard temperature of the circuit board on which the balancing resistor is installed;
[0011] The control step determines the battery cells that need to be passively balanced according to the voltage of each battery cell, the onboard temperature, and the communication status between the main board and the slave board in the battery management system, and starts the corresponding passive balancing circuit.
[0012] In the present invention, by providing a passive balancing circuit for a portion of the cells in the battery pack instead of providing a passive balancing circuit for each cell, the structure of the passive balancing circuit can be simplified, the design of the passive balancing circuit can be avoided to be too redundant, the amount of hardware can be reduced, and the cost of the battery management system can be reduced.
[0013] In the present invention, by using high-power, low-resistance balancing resistors and high-power MOS tubes, the passive balancing current can be increased, and the passive balancing time can be avoided to be too long, thereby improving the efficiency of passive balancing.
[0014] In the present invention, a passive balancing circuit with a simple structure is used to perform passive balancing control, thereby reducing the complexity of passive balancing control. In addition, the present invention can achieve passive balancing during charging or discharging without performing passive balancing control when the battery pack is stationary. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 According to an embodiment of the present application, a schematic diagram of a battery management system is shown;
[0016] Figure 2 According to an embodiment of the present application, a flow chart of a passive balancing method for a battery management system is shown;
[0017] Figure 3 According to the embodiment of the present application, it is shown Figure 2 Flowchart of the control steps in . DETAILED DESCRIPTION
[0018] The embodiments of the present application will be described in further detail below in conjunction with the accompanying drawings.
[0019] Figure 1 According to an embodiment of the present application, a schematic diagram of a battery management system 100 is shown. Figure 1 As shown, the battery management system 100 includes a battery pack 101 , a plurality of passive balancing circuits 102 , and an analog front end chip (AFE) 103 .
[0020] The battery pack 101 includes a plurality of cells connected in series, such as cells C1-C16. It is understood that Figure 1The number of cells is for example only and can be any number without limitation.
[0021] A portion of the plurality of cells is connected to a corresponding passive balancing circuit. Specifically, the portion of the cells is a predetermined number of cells with the highest voltage among the plurality of cells during charging or discharging. For example, the portion of the cells is half of the number of cells with the highest voltage among the plurality of cells during charging or discharging.
[0022] For example, the battery pack 101 is pre-charged and discharged for 5 times, the voltage of each battery cell during the operation is recorded and counted, and a predetermined number of battery cells with the highest voltage in the battery pack 101 are counted. In other words, the voltage of each battery cell is sorted from high to low, and a predetermined number of battery cells at the front are found.
[0023] In this embodiment, for example, a portion of the cells are cells C11-C16. In the battery pack 101, cells C11-C16 are likely to reach the highest voltage first. Cells C11-C16 are each connected to a corresponding passive balancing circuit 102. That is, not every cell is connected to a corresponding passive balancing circuit. Therefore, the number of hardware of the entire system can be reduced, and the cost can be reduced.
[0024] Each of the battery cells in a portion of the battery cells is connected in parallel with a corresponding passive balancing circuit, and the passive balancing circuit includes a balancing resistor and a MOS tube connected in series, wherein the gate of the MOS tube is connected to the analog front-end chip.
[0025] like Figure 1 As shown, each of the cells C11-C16 is connected in parallel to the corresponding passive equalization circuit 102. Taking the cell C16 as an example, the passive equalization circuit 102 corresponding thereto includes an equalization resistor R16 and a MOS tube MOS1 connected in series. The gate of MOS1 is connected to the pin S16 of the analog front-end chip 103. The structures of the passive equalization circuits 102 of other cells are similar to the passive equalization circuit 102 of the cell C16.
[0026] Furthermore, two passive balancing circuits 102 corresponding to two adjacent cells in a portion of the cells share a balancing resistor. Figure 1 As shown, the cells C14 and C15 are adjacent to each other, and the two passive balancing circuits 102 corresponding to them share a balancing resistor R15. In this way, the hardware quantity of the entire system can be further reduced, and the cost can be further reduced.
[0027] The analog front-end chip 103 is connected to a plurality of passive balancing circuits 102 for collecting the voltages of the plurality of battery cells C11 - C16 , and activates the corresponding passive balancing circuit 102 according to the voltage of each battery cell to perform discharge balancing.
[0028] Specifically, Figure 1 As shown, the gate of each MOS transistor is connected to the corresponding pins S11 to S16 of the analog front-end chip 103 , so the corresponding MOS transistors MOS1 to MOS6 can be controlled respectively by the pins S11 to S16 of the analog front-end chip 103 .
[0029] Each balancing resistor has high power and low resistance. For example, each balancing resistor is a resistor with a power of 16 W and a resistance of 4 Ω.
[0030] Taking a 280Ah 3.2V lithium iron phosphate battery as an example, if the existing passive balancing circuit is used, the passive balancing current is 300mA, and the time required to balance a 10Ah battery cell is 33.33h. However, when the passive balancing circuit with high-power, low-resistance balancing resistors and high-power MOS tubes in the present invention is used, the passive balancing current is increased to 1A, and the time required to balance a 10Ah battery cell is 10h, which greatly improves the efficiency of passive balancing.
[0031] Figure 2 A flowchart of a passive balancing control method for a battery management system according to an embodiment of the present invention is shown. Figure 1 The passive balancing circuit 102 in the battery management system 100 shown in the figure performs passive balancing on corresponding battery cells.
[0032] like Figure 2 As shown, in the acquisition step S21, when the battery pack 101 is charged or discharged, the analog front-end chip 103 acquires the voltage of each battery cell and the onboard temperature of the circuit board on which the balancing resistor is installed.
[0033] In control step S22, the battery cells that need to be passively balanced are determined based on the voltage of each battery cell, the onboard temperature, and the communication status between the main board and the slave board (not shown) in the battery management system 100, and the corresponding passive balancing circuit is turned on for discharge.
[0034] Figure 3 A specific flow chart of the control step S22 is shown.
[0035] like Figure 3 As shown, in the comparison step S221, the lowest voltage among the multiple voltages is taken out, and the difference between the voltage of each battery cell and the lowest voltage is calculated.
[0036] After collecting the voltages of the multiple battery cells C1-C16, the lowest voltage Vmin among these voltages is taken out, and then the difference Vn-Vmin between each battery cell and Vmin is calculated.
[0037] In the voltage judgment step S222, it is determined whether the difference between the voltage of each battery cell and the minimum voltage is greater than a first predetermined threshold value. If the difference is greater than the first predetermined voltage threshold value, the process proceeds to the fault judgment step S223, otherwise, the process proceeds to the prohibition step S226.
[0038] The first predetermined voltage threshold is, for example, 20 mV. For example, if the voltage V15-Vmin of the battery cell C15 is greater than 20 mV, then the process goes to the fault judgment step S223.
[0039] In the fault judgment step S223, the communication status between the main board and the slave board is judged. If the communication status is fault-free, then enter the temperature judgment step S224, otherwise enter the prohibition step S226.
[0040] For example, if the communication status is no fault, that is, there is no fault in the communication between the main board and the slave board, then enter the temperature judgment step S224.
[0041] In the temperature determination step S224, it is determined whether the onboard temperature is greater than a predetermined temperature threshold. If the onboard temperature is not greater than the predetermined temperature threshold, the process proceeds to the passive balancing step S225, otherwise, the process proceeds to the prohibition step S226.
[0042] For example, the predetermined temperature threshold is 90° C. If the onboard temperature is not greater than 90° C., then the passive balancing step S225 is entered.
[0043] In the passive balancing step S225, the passive balancing circuit corresponding to the cell is turned on. In this embodiment, for example, the passive balancing circuit 102 corresponding to the cell C15 is turned on to discharge the cell C15.
[0044] It is understandable that in the prohibition step S226, the passive balancing circuit corresponding to the battery cell is not turned on. In this embodiment, for example, the passive balancing circuit 102 corresponding to the battery cell C15 is not turned on.
[0045] During the process of passively balancing the battery cell C15, the voltage of the battery cell C15 is collected in real time. When the voltage V15 of the battery cell C15 is less than the second predetermined temperature threshold, the passive balancing circuit corresponding to the battery cell C15 is stopped.
[0046] For example, the second predetermined temperature threshold is 15 mV. When the voltage V15 of the battery cell C15 is less than 15 mV, the passive balancing circuit corresponding to the battery cell C15 is stopped, and the discharge ends.
[0047] In the present invention, by providing a passive balancing circuit for a portion of the cells in the battery pack instead of providing a passive balancing circuit for each cell, the structure of the passive balancing circuit can be simplified, the design of the passive balancing circuit can be avoided to be too redundant, the amount of hardware can be reduced, and the cost of the battery management system can be reduced.
[0048] In the present invention, by using high-power, low-resistance balancing resistors and high-power MOS tubes, the passive balancing current can be increased, and the passive balancing time can be avoided to be too long, thereby improving the efficiency of passive balancing.
[0049] In the present invention, a passive balancing circuit with a simple structure is used to perform passive balancing control, thereby reducing the complexity of passive balancing control. In addition, the present invention can achieve passive balancing during charging or discharging without performing passive balancing control when the battery pack is stationary.
[0050] In the accompanying drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be required. Instead, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of structural or method features in a particular figure does not mean that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.
[0051] Although the present application has been illustrated and described with reference to certain preferred embodiments thereof, it will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.
Claims
1. A battery management system, characterized in that: include: A battery pack, the battery pack comprising a plurality of battery cells connected in series; A plurality of passive balancing circuits, wherein some of the plurality of battery cells are connected to corresponding passive balancing circuits; An analog front-end chip, the analog front-end chip is connected to the plurality of passive equalization circuits, and is used to collect voltages of the plurality of battery cells and activate corresponding passive equalization circuits according to the voltages; The part of battery cells is a predetermined number of battery cells having the highest voltage among the multiple battery cells during charging or discharging.
2. The battery management system according to claim 1, characterized in that: The portion of battery cells refers to half of the battery cells having the highest voltage among the plurality of battery cells during charging or discharging.
3. The battery management system according to claim 1, characterized in that: Each of the battery cells in the portion of battery cells is connected in parallel to a corresponding passive balancing circuit, wherein the passive balancing circuit includes a balancing resistor and a MOS tube connected in series, wherein a gate of the MOS tube is connected to the analog front-end chip.
4. The battery management system according to claim 3, characterized in that: The balancing resistor has high power and low resistance, and the MOS tube is a high-power MOS tube.
5. The battery management system according to claim 3, characterized in that: The two passive balancing circuits corresponding to two adjacent battery cells in the part of battery cells share one balancing resistor.
6. A passive balancing control method for a battery management system, characterized in that: The passive balancing circuit in the battery management system according to any one of claims 1 to 5 is used to passively balance the corresponding battery cells, and the passive balancing control method includes: A collection step, when the battery pack is charged or discharged, the analog front-end chip collects the voltage of each battery cell and the onboard temperature of the circuit board on which the balancing resistor is installed; The control step determines the battery cells that need to be passively balanced according to the voltage of each battery cell, the onboard temperature, and the communication status between the main board and the slave board in the battery management system, and starts the corresponding passive balancing circuit.
7. The passive balancing control method according to claim 6, characterized in that: The controlling step further comprises: A comparison step, taking out the lowest voltage among the plurality of voltages, and calculating the difference between the voltage of each battery cell and the lowest voltage; A voltage judgment step, judging whether the difference between the voltage of each battery cell and the minimum voltage is greater than a first predetermined threshold value, if the difference is greater than the first predetermined voltage threshold value, entering a fault judgment step, otherwise entering a prohibition step; A fault judgment step, judging the communication status between the main board and the slave board, if the communication status is no fault, then entering the temperature judgment step, otherwise entering the prohibition step; a temperature judging step, judging whether the onboard temperature is greater than a predetermined temperature threshold, if the onboard temperature is not greater than the predetermined temperature threshold, entering a passive balancing step, otherwise entering a prohibition step; Passive balancing step, starting the passive balancing circuit corresponding to the battery cell; The prohibition step does not start the passive balancing circuit corresponding to the battery cell.
8. The passive balancing control method according to claim 7, characterized in that: When the voltage of the battery cell is less than the second predetermined temperature threshold, the passive balancing circuit corresponding to the battery cell is stopped.
Citation Information
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