Instruction scheduling decision-making method and device, equipment and medium

Abstract

The invention relates to the technical field of computers, and provides an instruction scheduling decision method which comprises the following steps: establishing a dependency graph based on a to-be-executed instruction sequence; according to the dependency relationship and the time delay between the instruction nodes, establishing constraint conditions including dependency relationship constraints; a plurality of candidate decisions are constructed, any candidate decision meets the constraint condition, and each candidate decision comprises the execution states of all the instructions in the whole execution period of the instruction sequence to be executed; obtaining a total consumption value for scheduling and executing the instruction according to each candidate decision, wherein any total consumption value comprises a time consumption value and a resource consumption value when the instruction is scheduled and executed according to the corresponding candidate decision; and taking the candidate decision with the minimum total consumption value as an instruction scheduling strategy. According to the method, the global optimality of scheduling can be ensured, and the possible negative influence of the local optimal solution on the overall performance is effectively avoided, so that the performance and efficiency of the VLIW processor can be remarkably improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to an instruction scheduling decision method, device, equipment and medium. Background Art

[0002] With the continuous development of computer architecture, Very Long Instruction Word (VLIW) processors have been widely used in high-performance computing and embedded systems due to their efficient parallel computing capabilities. VLIW processors greatly improve computing efficiency by packaging multiple operations in one instruction word and executing them in parallel. However, the instruction scheduling problem is one of the core challenges of the VLIW architecture. Unlike superscalar processors, VLIW processors transfer the responsibility of instruction scheduling from hardware to the compiler, so that the compiler must efficiently resolve the dependency problems between instructions and reasonably allocate hardware resources to avoid conflicts. Traditional VLIW instruction scheduling strategies usually rely on heuristic algorithms. These methods can quickly generate feasible scheduling solutions, but it is often difficult to guarantee the global optimality. Especially in the face of complex dependencies and resource constraints, the problems of scheduling efficiency and insufficient utilization of parallelism are particularly prominent.

[0003] In the instruction scheduling process of the VLIW processor, multiple interrelated optimization problems need to be solved. The first is the dependency between instructions, including data dependency, control dependency and resource dependency. Data dependency requires that some instructions can only be executed after the predecessor instruction is executed, while control dependency involves the execution order of instructions in the branch structure. In addition, the number of hardware resources under the VLIW architecture is limited, such as integer arithmetic units, floating-point arithmetic units, and storage units, so the compiler needs to balance the use of these resources during the scheduling process to avoid resource conflicts. For example, if multiple instructions compete for the same type of functional unit at the same time, the compiler must make appropriate scheduling arrangements to maximize parallelism without causing resource conflicts.

[0004] Therefore, in view of the problems existing in the current VLIW processor instruction scheduling, such as insufficient parallelism utilization and unreasonable resource allocation, there is an urgent need for an instruction scheduling solution based on precise optimization algorithm to further improve the computing efficiency and performance of VLIW processors. Summary of the invention

[0005] The main purpose of the embodiments of the present application is to provide an instruction scheduling decision method, device, equipment and medium, aiming to solve at least one of the problems existing in the current VLIW processor instruction scheduling in the related technology, such as insufficient parallelism utilization, unreasonable resource allocation, etc.

[0006] In a first aspect, an embodiment of the present application provides an instruction scheduling decision method, the method comprising: A dependency graph is established based on the sequence of instructions to be executed, wherein the dependency graph includes a plurality of instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between the corresponding instructions, and the weight values ​​of the edges represent the delay between the connected instruction nodes; Establishing a constraint condition including dependency constraints according to the dependency relationships and delays between the various instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; Constructing a plurality of candidate decisions, any candidate decision meets the constraint condition, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the sequence of instructions to be executed; The total consumption value of scheduling and executing instructions according to each candidate decision is obtained, and any total consumption value includes the time consumption value and resource consumption value when scheduling and executing instructions according to the corresponding candidate decision.

[0007] Optionally, establishing a constraint condition including a dependency constraint according to the dependency and delay between the various instruction nodes includes: Traversing target instruction node pairs with dependency relationships, and establishing dependency constraints based on a dependency path length between two instruction nodes in the target instruction node pairs; the dependency path length is obtained based on the delay of two instruction nodes connected thereto; The constraint condition is obtained according to the dependency constraints of each target node pair.

[0008] Optionally, establishing a dependency constraint based on a dependency path length between two instruction nodes in a target instruction node pair includes: If there is a unique dependency path between two instruction nodes, a dependency constraint is established based on the length of the dependency path; If there are multiple dependency paths between two instruction nodes, the length of each dependency path is obtained; and Construct a dependency constraint based on the longest dependency path among multiple dependency paths.

[0009] Optionally, the constraint condition also includes one of the following: Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide; Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once; Timing constraints, configured to control the earliest and latest execution times for each instruction; and The instruction issuance constraint condition is configured to constrain various instructions that can be scheduled at the same time.

[0010] Optionally, constructing multiple candidate decisions includes: Introducing a decision variable for the execution state of each instruction at each moment, wherein the decision variable is a binary variable, and different values ​​represent different execution states, wherein the execution state includes execution or non-execution; By traversing the feasible value combinations of the decision variables of each instruction at each moment, candidate decisions are obtained, each value combination corresponds to a candidate decision, and any candidate decision meets the constraint conditions.

[0011] Optionally, at least one candidate decision scheduling instruction exists in each candidate decision and is executed in parallel; the specific content included in the constraint condition is adjusted based on hardware resources and performance targets.

[0012] Optionally, obtain the instruction scheduling policy from multiple candidate decisions by minimizing the following objective function: O = l + β × C Among them, O is the total consumption value of a candidate decision; l is the total scheduling length of a candidate decision, which means the total time required for all instructions to complete execution when the execution instructions are scheduled based on the candidate decision; C is the maximum number of virtual registers that can survive at the same time, and the virtual registers are used to ensure the execution of each instruction; β is a weight factor used to adjust the relative importance of l and C in the decision.

[0013] In a second aspect, an embodiment of the present application provides an instruction scheduling decision device, which has the function of implementing the instruction scheduling decision method provided in the first aspect. The function can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, and the modules can be software and / or hardware.

[0014] In one embodiment, the instruction scheduling decision device includes: A first building module is configured to establish a dependency graph, wherein the dependency graph includes a plurality of instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between corresponding instructions, and the weight values ​​of the edges represent the delay between the connected instruction nodes; A second building module is configured to establish a constraint condition including a dependency constraint according to the dependency relationship and delay between each instruction node, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; A third building module is configured to build a plurality of candidate decisions, any candidate decision meets the constraint condition, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the to-be-executed instruction sequence; an acquisition module configured to acquire a total consumption value for scheduling and executing instructions according to each candidate decision, wherein any total consumption value includes a time consumption value and a resource consumption value when scheduling and executing instructions according to the corresponding candidate decision; and The decision module is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy.

[0015] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, which includes instructions, which, when executed on a computer, enables the computer to execute the instruction scheduling decision method described in the first aspect.

[0016] In a fourth aspect, an embodiment of the present application provides a computing device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the instruction scheduling decision method described in the first aspect when executing the computer program.

[0017] Compared with the prior art, the embodiment of the present application proposes a new instruction scheduling decision method, which is based on the sequence of instructions to be executed. First, a dependency graph is constructed, which is composed of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependencies between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Then, based on the dependencies between these instruction nodes and their corresponding time delays, a series of constraints containing dependency constraints are formulated. The number of dependency constraints contained in these constraints is less than the total number of dependency paths in the dependency graph, which achieves effective simplification and management of complex dependencies.

[0018] In order to obtain different scheduling possibilities, multiple candidate decision schemes are constructed. Each candidate decision strictly follows the above dependency constraints and fully covers the execution status of all instructions in the execution cycle of the instruction sequence to be executed.

[0019] Subsequently, the total cost value of each candidate decision when executing instructions is evaluated. This total cost value is a comprehensive indicator that includes not only the time cost value, that is, the total time required for instruction scheduling and execution, but also the resource cost value, that is, the various resource costs required during the execution process.

[0020] Finally, by comparing the total consumption values ​​of each candidate decision, the candidate decision with the smallest total consumption value is selected as the instruction scheduling strategy. This strategy effectively ensures the execution order and efficiency of instructions while also minimizing the time and resource costs during execution.

[0021] In summary, this method can ensure the global optimality of scheduling and effectively avoid the negative impact of local optimal solutions on the overall performance, thereby significantly improving the performance and efficiency of VLIW processors and meeting the needs of modern computing tasks for efficient parallel computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] By reading the detailed description of the embodiments of the present application with reference to the accompanying drawings, the objectives, features and advantages of the embodiments of the present application will become easy to understand. Among them: Figure 1 A schematic diagram of a flow chart of the instruction scheduling decision method according to an embodiment of the present application; Figure 2 A partial schematic diagram of a dependency graph of an embodiment of the present application; Figure 3 A schematic diagram of the structure of the instruction scheduling decision device according to an embodiment of the present application; and Figure 4 A schematic diagram of the structure of a computing device according to an embodiment of the present application.

[0023] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0025] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0026] It should be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0027] The embodiments of the present application provide an instruction scheduling decision method, apparatus, device and medium. The instruction scheduling decision method can be applied to a terminal device, which can be an electronic device such as a tablet computer, a laptop computer, a desktop computer, a personal digital assistant and a wearable device. The terminal device can be a server or a server cluster.

[0028] Some embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0029] Please refer to Figure 1 , Figure 1 A flowchart of an instruction scheduling decision method provided in an embodiment of the present application.

[0030] like Figure 1 As shown, the instruction scheduling decision method includes steps S101 to S105.

[0031] Step S101: Establish a dependency graph based on a sequence of instructions to be executed.

[0032] In the embodiment of the present application, the sequence of instructions to be executed may be a plurality of instructions waiting to be scheduled and executed based on VLIW, and there may be some dependencies between the instructions. The dependency graph is established based on the dependencies between the instructions in the sequence of instructions to be executed, and the dependency graph may be a directed acyclic graph (DAG), such as Figure 2 As shown, the dependency graph includes multiple instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between the corresponding instructions, and the weight value of the edge represents the delay between the connected instruction nodes. Figure 2 In the figure, load, add, and store represent an instruction node respectively. Each instruction node corresponds to an instruction. The edge between load and add represents the dependency relationship between the two. The arrow indicates the direction of the dependency. The weight 7 indicates that the delay between instruction load and instruction add is 7.

[0033] In the VLIW architecture, dependencies include data dependency and control dependency. Data dependency means that the output of one instruction is the input of another instruction; control dependency involves control structures such as conditional branches or loops, where the execution of one instruction depends on the result of another instruction.

[0034] In the embodiment of the present application, the delay between instruction nodes represents the execution delay or preparation time between corresponding instructions, which is crucial for optimizing the execution order of instructions and reducing waiting time. Through global dependency analysis, the compiler or processor can identify which instructions can be executed in parallel (i.e., there is no direct dependency between them) and which instructions must be executed in a specific order (due to the existence of dependencies).

[0035] In an embodiment of the present application, by constructing the sequence of instructions to be executed as a directed acyclic dependency graph, the relationship between the instructions can be analyzed based on the DAG graph, which helps to generate efficient instruction packages. These instruction packages can be executed in parallel in a single long instruction word while ensuring that all dependencies are met, thereby avoiding execution errors and performance degradation, allowing the processor to more effectively utilize parallel processing capabilities and improve overall computing efficiency.

[0036] Step S102: establishing constraint conditions including dependency constraints according to the dependency relationships and delays between various instruction nodes.

[0037] In the embodiment of the present application, each dependency constraint can be directly established based on the dependency and delay between each instruction node in the dependency graph, and each dependency constraint can be used as a constraint condition. Specifically, the edges and weights between each instruction node can be converted into dependency constraints, that is, each feasible dependency path is converted into a dependency constraint. For example, referring to Figure 2 ,based on Figure 2 From the dependency shown in , we can get the four dependency constraints: time(store)- time(load)>= 7, time(store) - time(add)>= 4, time(add) - time(load)>= 7, time(store) - time(load)>= 11, and based on this, we can get the constraint conditions.

[0038] In a parallel processing environment of a VLIW architecture, processing dependencies between instructions is a complex and critical task. In the embodiment of the present application, in order to optimize the execution order and efficiency of instructions, constraints can be constructed based on the dependencies and delays between instruction nodes. These constraints are intended to ensure that all necessary dependencies are met while minimizing strict restrictions on the execution order to better utilize the parallel processing capabilities of the processor.

[0039] First, the direct dependencies between instructions are determined based on the dependency graph. In the DAG, each edge represents a dependency, and its weight represents the delay between instructions. However, when constructing constraints, it is not necessary to convert each edge in the DAG into a dependency constraint. This is because some dependencies may be indirect or redundant, that is, they can be derived from other direct dependencies or replaced by other dependencies.

[0040] Therefore, a more efficient approach can be adopted to identify critical direct dependencies or dependencies that are sufficient to replace other dependencies through global dependency analysis, and convert these dependencies into dependency constraints. These dependency constraints ensure that all necessary dependencies are satisfied while allowing more instructions to execute in parallel without direct dependencies.

[0041] In a preferred embodiment of the present application, the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph. Figure 2 , Figure 2 This is a partial schematic diagram of an instruction dependency graph of an embodiment of the present application. Since not all dependencies in a dependency graph are valid for the optimal decision of instruction scheduling, a large number of redundant dependencies may increase the time to obtain the optimal decision of instruction scheduling. Figure 2 It can be seen that the path length from the load instruction through the add instruction to the store is 11, which is greater than the path length from the load instruction directly to the store. Therefore, when establishing dependency constraints, there is no need to create the constraint of time(store) - time(load)>= 7. Figure 2 When creating dependency constraints, the number of dependency constraints (for example, 3) is less than Figure 2 The number of all dependency paths in , which is 4.

[0042] In the embodiment of the present application, the dependency path in the dependency graph represents the path between two instructions with a dependency relationship. The dependency relationship is not only a direct dependency relationship, but also an indirect dependency relationship. Therefore, Figure 2 In the dependency graph shown, there are a total of 4 dependency paths, that is, in addition to the 3 edges representing direct dependencies, there is also a dependency path from the instruction load through add to the store.

[0043] It is understandable that although redundant constraints will increase the complexity of obtaining the optimal scheduling decision, appropriate redundant constraints will also accelerate the process of obtaining the optimal scheduling decision, which is equivalent to limiting the original solution space of a function without constraints through constraints. Figure 2 In the example shown, based on the creation of dependency constraints of time(store) - time(add)>= 4 and time(add) - time(load)>= 7, a dependency constraint of time(store) - time(load)>= 11 can be created. This will speed up the propagation of constraint conditions in the solution space for solving the optimal scheduling decision.

[0044] In an optional embodiment of the present application, in order to obtain dependency constraints less than the number of dependency paths based on the dependency graph, step S102 may include the following steps S1021 to S1022: Step S1021 , traverse the target instruction node pairs with dependency relationships, and establish dependency constraints based on the dependency path length between two instruction nodes in the target instruction node pairs.

[0045] In an embodiment of the present application, in order to establish dependency constraints, it is necessary to obtain all instructions with dependencies. Therefore, it is first necessary to traverse the dependency graph and obtain all instruction nodes with dependencies, that is, target instruction node pairs. After obtaining each target instruction node pair in the dependency graph, each dependency constraint can be established based on the dependency path length between each target instruction node pair. It can be understood that the dependency path length between a target instruction node pair can be obtained based on the delay of the two instruction nodes connected to it (that is, the two instruction nodes included in the target instruction node pair). For example, refer to Figure 2 , a target instruction node pair is load and add, then the dependency path length is 7, and the corresponding dependency constraint is time(add) - time(load)>= 7.

[0046] It is understandable that the dependency path between instruction nodes is constructed based on the dependency and delay between each instruction for convenience. Thus, in some embodiments, the target node pair and the dependency path length can also be obtained based on the dependency and delay between the instructions to establish the dependency relationship. Specifically, some basic data structures can be defined to store each instruction node, the dependency and delay information of each instruction node. Each instruction node can include the following attributes: a unique identifier for each instruction, the time required for the execution of the instruction, other instructions that depend on the instruction, and delay information. An adjacency list is used to represent all instruction nodes and their dependencies, wherein each instruction node is indexed by its ID and stores its dependent instruction nodes and delay information.

[0047] Then calculate the dependency path length between the two instruction nodes, which usually involves all paths from the source node to the destination node and calculates the total delay on these paths. In order to calculate the dependency path length between two instruction nodes, it is necessary to traverse all possible paths and calculate the total delay on the path. This can be done through a depth-first search or breadth-first search algorithm. Considering that there may be multiple paths between two instruction nodes, you can usually only care about the shortest path or the longest path, that is, only build dependency constraints based on the longest path or the shortest path.

[0048] Finally, according to the calculated path length, the corresponding dependency constraints can be established. For example, if the shortest path length between two nodes exceeds a certain threshold, a constraint can be set to ensure that the two nodes cannot be executed at the same time, or to adjust their execution order.

[0049] In the embodiment of the present application, a dependency constraint is established based on the dependency path length between two instruction nodes in the target instruction node pair, including the following steps I-III: Step I: If there is a unique dependency path between two instruction nodes, a dependency constraint is established according to the length of the dependency path.

[0050] In an embodiment of the present application, when processing dependencies between instruction nodes, if there is a dependency path between two instruction nodes, a dependency constraint needs to be established based on the length of the dependency path. If there is only one unique dependency path between two instruction nodes, the dependency constraint is established directly based on the length of this path. This means that before executing the instruction corresponding to the destination instruction node, it is necessary to wait for the instruction corresponding to the source instruction node to complete, and the waiting time is at least equal to the length of this path (that is, the sum of all delays on the path). For example, refer to Figure 2 , where there is only one dependency path between instruction node load and instruction node add, and the length of the dependency path is 7, then the dependency constraint time(add) - time(load)>= 7 can be established between the two instructions.

[0051] Step II: if there are multiple dependency paths between two instruction nodes, the length of each dependency path is obtained.

[0052] If there are multiple dependency paths between two instruction nodes, it is necessary to consider the lengths of all dependency paths and establish dependency constraints based on the longest path, because the longest path represents the longest waiting time required to execute the target instruction node.

[0053] Specifically, first determine all dependent paths between two instruction nodes. Then, for each path, calculate the sum of all delays on the path. Find the longest path among all paths, and establish dependency constraints to ensure that the target instruction node can only be executed after the source instruction node is completed and the waiting time is at least equal to the length of the longest path. For example, refer to Figure 2, where there are two dependency paths between instruction node load and instruction node store, one is from instruction node load directly to instruction node store, and the other is from instruction node load through instruction node add to instruction node store, where the path length of the direct dependency path is 7, and the path length of the dependency path through instruction node add is 11, and therefore the dependency constraint time(store) - time(load)>= 11 can be established between the two instructions.

[0054] To implement these steps, a graph algorithm (such as breadth-first search BFS or depth-first search DFS) can be used to traverse the dependencies between instruction nodes and calculate the path length to obtain the longest path length. Technicians in this field can perform operations according to actual needs, which will not be described in detail here.

[0055] Step III: construct dependency constraints based on the longest dependency path among multiple dependency paths.

[0056] In the embodiment of the present application, steps I-III are used to exemplify a method of constructing dependency constraints based on a dependency graph, but are not limited thereto. A person skilled in the art may also select other methods based on the dependencies between the instructions in the sequence to be executed according to actual conditions to construct each dependency constraint.

[0057] Step S1022: Obtain the constraint conditions according to the dependency constraints of each target node pair.

[0058] In the embodiment of the present application, after the dependency constraints between each target node pair are obtained, these dependency constraints can be integrated to form a complete set of dependency constraints, i.e., constraint conditions. These constraint conditions are usually used to ensure that the dependency between instruction nodes is properly maintained during the execution process, i.e., the instructions corresponding to the dependent instruction nodes are executed first, and then the instructions corresponding to the instruction nodes that depend on them are executed.

[0059] The following are the steps to derive constraints from dependency constraints: For each pair of target nodes (A, B), check whether there is a dependency path from A to B. If there is a dependency path, determine whether the dependency path is the only dependency path, or whether there is a longest path among multiple dependency paths. For the determined dependency path, calculate the total time required to execute all nodes on the dependency path. If there are multiple dependency paths, select the length of the longest dependency path as the dependency length.

[0060] For each pair of nodes (A, B) with a dependency relationship, a constraint is formed, indicating that the execution of B must be carried out after A is completed and the waiting time is at least equal to the dependency length.

[0061] Combine all the dependency constraints formed into a constraint set. Make sure that each constraint in the constraint set is clear and executable, that is, there are no circular dependencies or unsatisfiable dependencies. In practical applications, you may need to verify the validity of the constraint set to ensure that it can correctly guide the execution order of the nodes.

[0062] This can be verified by simulating the execution process or using a specialized scheduling algorithm. Once the constraint set is verified to be valid, it can be applied to the actual execution process. During execution, the scheduler (compiler in VLIW processing) or execution engine will follow these constraints to ensure that the dependencies between instructions are correctly maintained.

[0063] It is understandable that reliable execution of instructions not only requires solving the dependencies between different instructions, but also requires appropriate computing resources, execution time, etc. Therefore, in the embodiment of the present application, the constraint condition also includes at least one of the following: Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide; Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once; Timing constraints, configured to control the earliest and latest execution time of each instruction; The instruction issuance constraint condition is configured to constrain various instructions that can be scheduled at the same time.

[0064] Specifically, they work together to ensure efficient use of system resources, correct execution order of instructions, and timing requirements. The following is a detailed explanation of these constraints: Resource constraints are designed to ensure that at any given moment, the processing unit resources (such as CPU cores, memory, IO devices, etc.) allocated to each instruction do not exceed the total resources that the system can provide. This can be achieved through a resource manager or scheduler, which tracks available resources and allocated resources, and recycles or reallocates resources when necessary. At each moment, the processing unit resources allocated to each instruction cannot exceed the total resources that the system can provide. In particular, register resources are not strictly restricted from exceeding the physical register upper limit, but are included in the optimization goal of the objective function (used to calculate and solve the optimal instruction scheduling strategy). In subsequent scheduling, instructions that overflow register data to memory can be added to ensure that the registers in the final scheduling result do not exceed the upper limit.

[0065] The instruction scheduling constraints are to ensure that each instruction must and can only be scheduled once, to avoid resource waste or data inconsistency caused by repeated execution. Specifically, the scheduler can maintain an instruction status table to record the current status of each instruction (such as unscheduled, scheduled, executing, completed, etc.). When scheduling a new instruction, the scheduler will check whether the instruction has been scheduled, and decide whether to add it to the execution queue accordingly.

[0066] The purpose of time constraints is to control the earliest and latest execution time of each instruction to meet specific timing requirements. Specifically, time constraints are usually implemented through timestamps or time windows. Each instruction is assigned an earliest start time and a latest completion time. The scheduler takes these time constraints into account when scheduling instruction execution to ensure that the instructions are executed within the specified time range.

[0067] Instruction issuance constraints are designed to ensure compatibility between instructions that can be scheduled at the same time (such as not occupying the same resources at the same time or causing data conflicts). Specifically, instruction issuance constraints are usually determined by the dependencies between instructions and resource usage. The scheduler checks the dependencies between instructions before issuing instructions and ensures that instructions issued at the same time do not violate any resource usage restrictions or data consistency requirements.

[0068] These constraints play a vital role in the instruction execution process. Together, they ensure the stability, reliability, and performance of the system. In actual applications, these constraints may be adjusted and optimized according to the specific hardware platform, software architecture, and application requirements. For example, in high-performance computing or real-time systems, time constraints and instruction issuance constraints may be more stringent; while in resource-constrained embedded systems, resource constraints may be more critical.

[0069] By carefully selecting these key dependencies and converting them into constraints, the correctness and efficiency of instruction execution can be ensured. At the same time, since the number of dependency constraints is less than the number of dependency paths in the DAG, more flexibility is provided for the parallel execution of instructions.

[0070] Ultimately, these constraints are used to guide the scheduling and execution of instructions to ensure that all dependencies are satisfied while maximizing the efficiency of parallel processing.

[0071] S103: Construct multiple candidate decisions.

[0072] In the embodiment of the present application, any candidate decision meets the constraint conditions, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the instruction sequence to be executed. Specifically, the execution status of each instruction at each moment can be determined and output as a candidate decision. For example, referring to Figure 2 , assuming that the sequence of instructions to be executed is load, add, and store, then the candidate decision can be to execute the load instruction at time 1-7 (other instructions are not executed), execute the add instruction at time 8-11 (other instructions are not executed), and execute the store at time 12 (other instructions are not executed).

[0073] In order to more conveniently construct candidate decisions, in an embodiment of the present application, step S103 may include the following steps S1031 to S1032: Step S1031: Introduce decision variables for the execution status of each instruction at each moment.

[0074] The decision variable is a binary variable, and different values ​​represent different execution states, including execution or non-execution. For example, the value of the binary variable can be 0 or 1, or other feasible values, which are not limited here. Different values ​​can represent different execution states, for example, 1 can be set to execution and 0 can be set to non-execution.

[0075] In the embodiment of the present application, in the planning, scheduling or optimization problem, the decision variable is introduced to accurately and quantitatively describe the behavior of the system, and a more intuitive and accurate method (such as linear programming, integer programming, etc.) can be used to solve the optimal solution. Specifically, a binary (0-1) decision variable can be introduced for each instruction at each moment to indicate whether the instruction is executed. If the instruction is executed at a certain moment, the variable takes the value of 1, otherwise it takes the value of 0.

[0076] Assume there is a time range T={t1, t2, ..., t n} and a set of instructions I = {i1, i2, ..., i m}, then we can define a binary decision variable x it Corresponding to the execution state of instruction i at time t: if x it =1, if instruction i is executed at time t if x it =0, if instruction i is not executed at time t.

[0077] This decision variable can help express various constraints and goals about the execution of instructions when constructing candidate decisions. For example, if you want an instruction to be executed only within a specific time period, you can add the corresponding constraints; if you want to minimize or maximize the number of executions of certain instructions, you can add relevant parameters to the goal.

[0078] By properly setting these decision variables and the associated constraints and goals, algorithms such as path planning can be used to find a solution that satisfies all constraints while optimizing the goal, that is, the optimal instruction scheduling strategy.

[0079] S1032. Obtain candidate decisions by traversing feasible value combinations of decision variables of each instruction at each moment.

[0080] Each value combination corresponds to a candidate decision, and any candidate decision meets the constraint condition.

[0081] In an embodiment of the present application, a method for traversing feasible value combinations of decision variables of each instruction at each moment to obtain candidate decisions involves exhaustively enumerating all possible execution states to ensure that each value combination meets the constraints.

[0082] Specifically: First, clarify all instructions and time points, and establish a two-dimensional matrix or similar structure, in which each element represents a binary decision variable x it ; Then explicitly define all dependency constraints and other constraints. For example, some instructions must be executed before other instructions, or some instructions cannot be executed at the same time, etc. For each decision variable, try its two possible values ​​(0 or 1) and generate all possible state combinations. For each generated combination, check whether all constraints are met. Only combinations that meet these constraints can be considered as candidate decisions. From all candidate decisions that meet the constraints, select an optimal solution based on the optimization goal (such as minimizing cost, maximizing resource utilization, etc.).

[0083] In the embodiment of the present application, steps S1031 to S1032 provide an exemplary method for constructing candidate decisions, but are not limited thereto. For example, in the embodiment of the present application, candidate decisions for the instruction sequence to be executed can also be constructed through a 0-1 integer linear programming model.

[0084] It is understandable that in order to achieve the best resource and time consumption of instruction scheduling execution and improve the efficiency of processor resource utilization as much as possible, in the embodiment of the present application, there is at least one candidate decision scheduling instruction for parallel execution in each candidate decision, that is, when there are instructions that can be executed in parallel in the instruction sequence to be executed, the candidate decision must include a scheduling scheme for parallel execution of instructions to maximize the efficiency of instruction execution. In addition, it is understandable that the execution of instructions requires the consumption of computing resources, that is, the instructions are limited by the need to rely on the limitations of computing resources, and the scheduling execution scheme of instructions needs to achieve the optimization goal as much as possible, so the specific content included in the constraint conditions is based on the hardware resources and performance target adjustment. For example, if resources are limited, the resource constraints in the constraints need to be set to the maximum resource consumption that the system can bear.

[0085] S104: Obtain the total consumption value of scheduling and executing instructions according to each candidate decision.

[0086] Among them, any total consumption value includes the time consumption value and resource consumption value when the instruction scheduling execution is performed according to the corresponding candidate decision.

[0087] In the embodiment of the present application, in order to obtain the total consumption value of scheduling and executing instructions according to each candidate decision, it is necessary to calculate the time consumption value and resource consumption value under each candidate decision respectively.

[0088] Specifically, the total cost of scheduling and executing instructions based on each candidate decision can be obtained by the following formula: O = l + β × C Among them, O is the total consumption value of a candidate decision; l is the total scheduling length of a candidate decision, which means the total time required for all instructions to complete execution when the execution instructions are scheduled based on the candidate decision; C is the maximum number of virtual registers that can survive at the same time, and the virtual registers are used to ensure the execution of each instruction; β is a weight factor used to adjust the relative importance of l and C in the decision.

[0089] Based on the above formula, an objective function for finding the optimal instruction scheduling strategy can be obtained. By minimizing the objective function, the instruction scheduling strategy can be obtained from multiple candidate decisions. Specifically, once a mathematical model containing decision variables, objective functions, and constraints is established, an appropriate solver (such as CPLEX, Gurobi, etc.) can be used to find the optimal solution. These tools can efficiently handle complex integer programming problems and provide feasible scheduling solutions.

[0090] Specifically, the time consumption value is the total scheduling length l for executing a candidate decision, which represents the total time required for all instructions to complete execution when the instructions are scheduled based on the candidate decision. First, all possible instruction scheduling decisions (i.e., candidate decisions) can be listed. Each candidate decision is simulated and the total time taken from the start of the instruction execution to the completion is recorded. This can be done by using a dedicated simulator or running on actual hardware to compare the time consumption values ​​under different candidate decisions to find the optimal solution.

[0091] The resource consumption value is the maximum number of virtual registers that can survive at the same time, C, which is used to ensure the execution of each instruction. In addition, the resource consumption value can also include CPU time, memory usage, IO operations, etc. In order to calculate the resource consumption value, the following steps can be taken: When executing instruction scheduling, use system monitoring tools (such as the / usr / bin / time command in Linux) to collect resource usage data. Based on the collected data, calculate the resource consumption value under each candidate decision.

[0092] Finally, the time consumption value and resource consumption value are weighted and summed to obtain the total consumption value of each candidate decision. This value can be used to compare the advantages and disadvantages of different candidate decisions and thus select the optimal instruction scheduling decision.

[0093] In an optimization problem, the weight factor β is used to adjust the relative importance of different objectives or constraints. The value of β depends on the specific business needs and priorities. For example, if time is the most critical factor (such as a real-time system), a smaller β value can be chosen so that the time consumption value l(D) plays a more important role in the decision. If resource efficiency is more important (such as an environment with limited energy), a larger β value can be chosen so that resource consumption C(D) becomes the main consideration.

[0094] If a balance needs to be struck between time and resources, β can be adjusted according to the actual situation to ensure that both are properly valued. In practical applications, the choice of weight factor β may not be fixed but dynamically adjusted. For example, in some stages, time may be the most important, while in other stages, resource efficiency may be more critical. Therefore, the value of β can be adjusted in time to meet different needs according to the operating status of the system or changes in external conditions.

[0095] In the embodiment of the present application, it is assumed that there are two candidate decisions D1 and D2, and their time consumption and resource consumption are shown in Table 1: Table 1

[0096] If β=0.6 is set, the total consumption values ​​are: f(D1)=(1−0.6)⋅10+0.6⋅5=4+3=7 f (D2)=(1−0.6)⋅8+0.6⋅7=3.2+4.2=7.4 In this case, although D2 is better in terms of time, D1 has a slightly lower total consumption value because β is more biased towards resource consumption, so it may be selected as a better decision.

[0097] S105: Using the candidate decision with the smallest total consumption value as the instruction scheduling strategy In an embodiment of the present application, it is possible to directly traverse the possible value combinations of decision variables for different instructions in all candidate decisions, and obtain the total consumption value of each candidate decision to obtain the optimal candidate decision as the instruction scheduling strategy. More efficient algorithms and techniques can also be used to improve the solution efficiency, for example: using commercial solvers (such as CPLEX, Gurobi, open source solvers or-tools) to handle complex constraints.

[0098] Through the above method, each candidate decision can be systematically evaluated and the one with the smallest total consumption value can be selected as the final instruction scheduling strategy. This method not only takes into account time and resource consumption, but also allows the balance between the two to be dynamically adjusted through the weight factor β, thereby better adapting to different business needs and priorities.

[0099] The embodiment of the present application proposes a new instruction scheduling strategy method, which is based on the sequence of instructions to be executed. First, a dependency graph is constructed, which is composed of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependencies between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Then, based on the dependencies between these instruction nodes and their corresponding time delays, a series of constraints containing dependency constraints are formulated. The number of dependency constraints contained in these constraints is less than the total number of dependent paths in the dependency graph, which achieves effective simplification and management of complex dependencies.

[0100] In order to obtain different scheduling possibilities, the embodiment of the present application constructs multiple candidate decision schemes. Each candidate decision strictly follows the above dependency constraints and fully covers the execution status of all instructions in the to-be-executed instruction sequence during the entire execution cycle.

[0101] Subsequently, the total cost value of each candidate decision when executing instructions is evaluated. This total cost value is a comprehensive indicator that includes not only the time cost value, that is, the total time required for instruction scheduling and execution, but also the resource cost value, that is, the various resource costs required during the execution process.

[0102] Finally, by comparing the total consumption values ​​of each candidate decision, the candidate decision with the smallest total consumption value is selected as the instruction scheduling strategy. This strategy effectively ensures the execution order and efficiency of instructions while also minimizing the time and resource costs during execution.

[0103] This exemplary embodiment proposes an instruction scheduling decision device, referring to Figure 3 , Figure 3 A structural schematic diagram of an instruction scheduling decision device is shown, which can be applied to a server in a scenario where an instruction scheduling decision method needs to be determined.

[0104] The instruction scheduling decision device in the embodiment of the present application can realize the above Figure 1 The functions based on the instruction scheduling decision method executed in the corresponding embodiment. The functions implemented by the instruction scheduling decision device can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, and the modules can be software and / or hardware. In the examples of this application, see Figure 3 The instruction scheduling decision device 1 includes: a first building module 11, a second building module 12, a third building module 13, an acquisition module 14 and a decision module 15, wherein: A first building module 11 is configured to build a dependency graph; In the embodiment of the present application, in order to accurately maintain the correct order of instruction execution, the first construction module 11 constructs a dependency graph (DAG, i.e., directed acyclic graph) of the instruction sequence, in which each node represents a specific instruction, and each edge symbolizes the dependency relationship between instructions. The weight of the edge is given the actual meaning of the execution delay between instructions.

[0105] The second building module 12 is configured to establish constraint conditions including dependency constraints according to the dependency and delay between the various instruction nodes; In the embodiments of the present application, in order to optimize the execution order and efficiency of instructions, constraints may be constructed based on the dependencies and delays between instruction nodes.

[0106] The second building module 12 establishes a constraint condition including dependency constraints according to the dependency relationships and delays between the various instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph.

[0107] These constraints are designed to ensure that all necessary dependencies are satisfied while minimizing strict restrictions on the order of execution to better exploit parallel processing capabilities.

[0108] A third building module 13 is configured to build a plurality of candidate decisions; In the embodiment of the present application, in order to construct multiple candidate decisions and ensure that each candidate decision complies with the dependency constraint and includes the execution status of all instructions in the entire execution cycle, multiple candidate decisions are constructed by the third construction module 13, any candidate decision complies with the dependency constraint, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the instruction sequence to be executed. This method not only ensures that all instructions are taken into account, but also ensures the effectiveness and feasibility of the scheduling scheme.

[0109] The acquisition module 14 is configured to acquire a total consumption value of scheduling and executing instructions according to each candidate decision.

[0110] In the embodiment of the present application, in order to obtain the total consumption value of scheduling and executing instructions according to each candidate decision and ensure that each total consumption value includes the time consumption value and the resource consumption value, it is necessary to calculate the time consumption value and the resource consumption value under each candidate decision respectively. The acquisition module 14 obtains the total consumption value of scheduling and executing instructions according to each candidate decision, and any total consumption value includes the time consumption value and the resource consumption value when scheduling and executing instructions according to the corresponding candidate decision.

[0111] The decision module 15 is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy.

[0112] In the embodiment of the present application, in order to optimize system performance, reduce execution time and resource usage, it is a reasonable decision method to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy. The decision module 15 uses the candidate decision with the smallest total consumption value as the instruction scheduling strategy. This strategy effectively ensures the execution order and efficiency of instructions, and also minimizes the time and resource costs during the execution process.

[0113] The embodiment of the present application proposes an instruction scheduling decision device, which is based on the instruction sequence to be executed. First, through the first construction module 11, a dependency graph is constructed, and the graph is composed of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependency between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Then, based on the dependency between these instruction nodes and their corresponding time delays, the second construction module 12 constructs a series of constraint conditions containing dependency constraints. The number of dependency constraints contained in these constraint conditions is less than the total number of dependency paths in the dependency graph, which realizes the effective simplification and management of complex dependencies.

[0114] In order to obtain different scheduling possibilities, the third construction module 13 constructs multiple candidate decision schemes. Each candidate decision strictly follows the above constraints and fully covers the execution status of all instructions in the to-be-executed instruction sequence in the entire execution cycle.

[0115] Subsequently, the total consumption value of each candidate decision when executing the instruction is evaluated. The acquisition module 14 is configured to obtain the total consumption value of scheduling and executing the instruction according to each candidate decision. This total consumption value is a comprehensive indicator, which not only includes the time consumption value, that is, the total time required for the instruction scheduling and execution, but also covers the resource consumption value, that is, the various resource costs required during the execution process.

[0116] Finally, by comparing the total consumption values ​​of each candidate decision, the decision module 15 selects the candidate decision with the smallest total consumption value as our instruction scheduling strategy. This strategy effectively ensures the execution order and efficiency of instructions while also minimizing the time and resource costs during the execution process.

[0117] In summary, the device can ensure the global optimality of scheduling and effectively avoid the negative impact that local optimal solutions may have on the overall performance, thereby significantly improving the performance and efficiency of the VLIW processor and meeting the needs of modern computing tasks for efficient parallel computing.

[0118] To achieve the above purpose, the present application also provides a computer device 2, see Figure 4 , Figure 4 A schematic diagram of a structure of a computing device according to an embodiment of the present application is shown in FIG. Figure 4 In the embodiment, the computer device 2 includes multiple computer devices, and the components of the instruction scheduling decision device 1 can be dispersed in different computer devices 2. The computer device 2 can be a smart phone, tablet computer, laptop computer, desktop computer, rack server, blade server, tower server or cabinet server (including independent server, or server cluster composed of multiple servers) that executes the program. The computer device 2 of this embodiment includes at least but is not limited to: a memory 21, a processor 23, a network interface 22 and an instruction scheduling decision device 1 (refer to Figure 4 ). It should be pointed out that Figure 4 Only a computer device 2 having components is shown, but it should be understood that implementing all of the components shown is not a requirement and more or fewer components may alternatively be implemented.

[0119] In this embodiment, the memory 21 includes at least one type of computer-readable storage medium, and the readable storage medium includes flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, disk, optical disk, etc. In some embodiments, the memory 21 can be an internal storage unit of the computer device 2, such as a hard disk or memory of the computer device 2. In other embodiments, the memory 21 can also be an external storage device of the computer device 2, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the computer device 2. Of course, the memory 21 can also include both the internal storage unit of the computer device 2 and its external storage device. In this embodiment, the memory 21 is generally used to store the operating system and various application software installed on the computer device 2, such as the program code of the instruction scheduling decision method of the present application. In addition, the memory 21 can also be used to temporarily store various types of data that have been output or are to be output.

[0120] The processor 23 may be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chips in some embodiments. The processor 23 is generally used to control the overall operation of the computer device 2, such as executing control and processing related to data interaction or communication with the computer device 2. In this embodiment, the processor 23 is used to run the program code stored in the memory 21 or process data, such as running the instruction scheduling strategy device 1, etc.

[0121] The network interface 22 may include a wireless network interface or a wired network interface, and the network interface 22 is generally used to establish a communication connection between the computer device 2 and other computer devices 2. For example, the network interface 22 is used to connect the computer device 2 to an external terminal through a network, and to establish a data transmission channel and a communication connection between the computer device 2 and the external terminal. The network may be a wireless or wired network such as an Intranet, the Internet, the Global System of Mobile communication (GSM), Wideband Code Division Multiple Access (WCDMA), a 4G network, a 5G network, Bluetooth, or Wi-Fi.

[0122] It should be pointed out that Figure 4 Only computer device 2 is shown with components 21 - 23 , but it should be understood that implementation of all of the components shown is not a requirement, and more or fewer components may alternatively be implemented.

[0123] In this embodiment, the instruction scheduling strategy device 1 stored in the memory 21 can also be divided into one or more program modules, and the one or more program modules are stored in the memory 21 and executed by one or more processors (processor 23 in this embodiment) to complete this application.

[0124] To achieve the above purpose, the present application also provides a computer-readable storage medium, which includes multiple storage media, such as flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, disk, CD, server, App application store, etc., on which a computer program is stored, and the program realizes the corresponding function when executed by the processor 23. The computer-readable storage medium of this embodiment is used to store the instruction scheduling decision device 1, and when executed by the processor 23, the instruction scheduling decision method of the embodiment of the present application is realized.

[0125] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0126] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0127] In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

[0128] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0129] In addition, each functional module in each embodiment of the present application can be integrated into a processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The above-mentioned integrated module can be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium.

[0130] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0131] The computer program product includes one or more computer instructions. When the computer program is loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means to another website site, computer, server, or data center. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.

[0132] The technical solutions provided in the embodiments of the present application are introduced in detail above. The principles and implementation methods of the embodiments of the present application are explained by using specific examples in the embodiments of the present application. The description of the above embodiments is only used to help understand the methods and core ideas of the embodiments of the present application. At the same time, for those skilled in the art, according to the ideas of the embodiments of the present application, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the embodiments of the present application.

Claims

1. An instruction scheduling decision method, characterized in that: include: A dependency graph is established based on the sequence of instructions to be executed, wherein the dependency graph includes a plurality of instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between the corresponding instructions, and the weight values ​​of the edges represent the delay between the connected instruction nodes; Establishing a constraint condition including dependency constraints according to the dependency relationships and delays between the various instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; Constructing a plurality of candidate decisions, any candidate decision meets the constraint condition, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the sequence of instructions to be executed; Obtaining a total consumption value for scheduling and executing instructions according to each candidate decision, wherein any total consumption value includes a time consumption value and a resource consumption value when scheduling and executing instructions according to the corresponding candidate decision; The candidate decision with the smallest total consumption value is used as the instruction scheduling strategy.

2. The method of claim 1, wherein: The step of establishing constraint conditions including dependency constraints according to the dependency relationships and delays between the various instruction nodes includes: Traversing target instruction node pairs with dependency relationships, and establishing dependency constraints based on a dependency path length between two instruction nodes in the target instruction node pairs; the dependency path length is obtained based on the delay of two instruction nodes connected thereto; The constraint condition is obtained according to the dependency constraints of each target node pair.

3. The method of claim 2, wherein the step of establishing a dependency constraint based on a dependency path length between two instruction nodes in a target instruction node pair comprises: If there is a unique dependency path between two instruction nodes, a dependency constraint is established based on the length of the dependency path; If there are multiple dependency paths between two instruction nodes, the length of each dependency path is obtained; and Construct a dependency constraint based on the longest dependency path among multiple dependency paths.

4. The method of claim 1, wherein: The constraint condition also includes one of the following: Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide; Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once; Timing constraints, configured to control the earliest and latest execution times for each instruction; and The instruction issuance constraint condition is configured to constrain various instructions that can be scheduled at the same time.

5. The method of claim 1, wherein: The step of constructing multiple candidate decisions includes: Introducing a decision variable for the execution state of each instruction at each moment, wherein the decision variable is a binary variable, and different values ​​represent different execution states, wherein the execution state includes execution or non-execution; By traversing the feasible value combinations of the decision variables of each instruction at each moment, candidate decisions are obtained, each value combination corresponds to a candidate decision, and any candidate decision meets the constraint conditions.

6. The method of claim 1, wherein: There is at least one candidate decision scheduling instruction in each candidate decision that is executed in parallel; The specific contents of the constraint conditions are adjusted based on hardware resources and performance targets.

7. The method of claim 1, wherein: The instruction scheduling policy is obtained from multiple candidate decisions by minimizing the following objective function: O = l + β × C Among them, O is the total consumption value of a candidate decision; l is the total scheduling length of a candidate decision, which means the total time required for all instructions to complete execution when the execution instructions are scheduled based on the candidate decision; C is the maximum number of virtual registers that can survive at the same time, and the virtual registers are used to ensure the execution of each instruction; β is a weight factor used to adjust the relative importance of l and C in the decision.

8. An instruction scheduling decision device, comprising: A first building module is configured to establish a dependency graph, wherein the dependency graph includes a plurality of instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between corresponding instructions, and the weight values ​​of the edges represent the delay between the connected instruction nodes; A second building module is configured to establish a constraint condition including a dependency constraint according to the dependency relationship and delay between each instruction node, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; A third building module is configured to build a plurality of candidate decisions, any candidate decision meets the constraint condition, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the to-be-executed instruction sequence; An acquisition module is configured to acquire a total consumption value for scheduling and executing instructions according to each candidate decision, wherein any total consumption value includes a time consumption value and a resource consumption value when scheduling and executing instructions according to the corresponding candidate decision; as well as The decision module is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy.

9. A computing device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium comprising instructions, which, when executed on a computer, causes the computer to perform the method according to any one of claims 1 to 7.

11. A computer program product comprising computer instructions, characterized in that: When the computer instructions are executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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