Ultrasonic sensor based on piezoelectric MEMS chip and preparation method

By using a structural layer instead of top silicon in a piezoelectric MEMS chip and forming a horn on the structural layer, the problems of high resonance frequency and low yield in traditional technology are solved, and the efficient design and manufacturing of low-frequency ultrasonic sensors are realized.

CN119555200APending Publication Date: 2025-03-04HEFEI NAVIGATION MICROSYSTEM INTEGRATION CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411365354.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-29
Publication Date
2025-03-04

AI Technical Summary

Technical Problem

The traditional piezoelectric MEMS chips have high resonance frequency due to the high Young's modulus and process stress of silicon, which is not conducive to the production, design and manufacturing of low-frequency ultrasonic sensors. At the same time, the traditional horn process increases the device size and process steps, reducing the yield rate.

Method used

The structural layer is used instead of the traditional top silicon, with the neutral surface located in the structural layer, reducing the resonance frequency, and forming a horn barrel by opening grooves on the structural layer, improving the horn barrel generation process, simplifying the process steps and improving the consistency of the equipment.

Benefits of technology

It effectively reduces the resonant frequency, is suitable for the design and manufacturing of low-frequency devices, improves yield, reduces the packaging volume, and can limit the field of view of the chip sound waves according to actual requirements.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119555200A_ABST
    Figure CN119555200A_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of semiconductor technologies, in particular to an ultrasonic sensor based on a piezoelectric MEMS chip and a preparation method thereof.The ultrasonic sensor comprises a substrate, a piezoelectric layer is formed on the front face of the substrate, a back cavity is formed in the substrate in a penetrating mode, a structural layer is formed on the surface of the piezoelectric layer, and the thickness of the structural layer is larger than that of a piezoelectric film in the piezoelectric layer; the neutral surface is located in the transverse projection area range of the structural layer; a groove is formed in the structural layer to form a horn for determining a sound wave field of view. The preparation method comprises the following steps: growing the piezoelectric layer on the front surface of the substrate; etching the piezoelectric layer; growing a structural layer; etching the structural layer and forming a horn; a back cavity is formed through the etching substrate. Silicon oxide is adopted as the structural layer, the resonant frequency is effectively reduced, on the basis, the structural layer forms the horn capable of limiting the sound wave view field, the equipment consistency is improved, the horn is formed while the structural layer is etched, the sound pressure level of the horn is improved, process steps do not need to be increased, and the yield is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor process for manufacturing ultrasonic sensors based on piezoelectric MEMS chips, and in particular to an ultrasonic sensor based on a piezoelectric MEMS chip and a preparation method thereof. Background Art

[0002] Ultrasonic sensors are sensors that convert ultrasonic signals into other energy signals (usually electrical signals). Ultrasonic waves are mechanical waves with a vibration frequency higher than 20kHz. They have the characteristics of high frequency, short wavelength, small diffraction phenomenon, especially good directionality, and the ability to propagate in a directional manner as rays. Ultrasonic waves have a great ability to penetrate liquids and solids, especially in solids that are opaque to sunlight. When ultrasonic waves encounter impurities or interfaces, they will produce significant reflections to form reflected echoes, and when they encounter moving objects, they can produce the Doppler effect. Ultrasonic sensors are widely used in industry, national defense, biomedicine, etc.

[0003] In the prior art, low-frequency ultrasonic sensors are needed in technical fields such as long-distance measurement, monitoring, and remote information transmission using ultrasound. Therefore, low-frequency MEMS chip devices also have a large market. However, traditional piezoelectric MEMS chips are composed of a stacked SOI substrate with a back cavity and a piezoelectric layer. The top silicon in the SOI substrate serves as a structural layer and assumes the function of a neutral plane. Silicon has a high Young's modulus and high process stress, which leads to a high resonant frequency, which is not conducive to the production design and manufacturing of low-frequency devices. On this basis, traditional ultrasonic sensors use a horn to increase their own sound pressure level. The horn is used to limit the field of view of the sound wave. In reality, most of them adopt a horn set on the packaging structure or bond the horn to the device. The former will increase the size of the device, and the latter will lead to reduced consistency of the chip. At the same time, it increases the process steps, increases the possibility of chip damage, and reduces the yield rate.

[0004] In summary, the present application now proposes an ultrasonic sensor based on a piezoelectric MEMS chip and a preparation method thereof to solve the above-mentioned problems. Summary of the invention

[0005] In view of the above-mentioned problems, the purpose of the present invention is to propose an ultrasonic sensor based on a piezoelectric MEMS chip and a method for preparing the same. The structural layer is used instead of the traditional top silicon to effectively reduce the resonant frequency. On this basis, the structural layer is formed into a horn that can limit the sound wave field of view, thereby improving the horn production process and increasing the yield rate.

[0006] The object of the present invention can be achieved by the following technical scheme: an ultrasonic sensor based on a piezoelectric MEMS chip, comprising a substrate, the substrate having a front side and a back side opposite to each other, a piezoelectric layer formed on the front side of the substrate, a back cavity penetrating the piezoelectric layer is opened on the back side of the substrate, a structural layer is formed on the surface of the piezoelectric layer, the thickness of the structural layer is greater than the thickness of the piezoelectric film in the piezoelectric layer, so that the neutral plane is located within the lateral projection area of ​​the structural layer;

[0007] Grooves are provided inside the structural layer to form a horn for determining the sound wave field of view.

[0008] The neutral plane is located in the structural layer, replacing the traditional top silicon. It has low process stress and can effectively reduce the resonant frequency, which is beneficial to the production design and manufacturing of low-frequency devices. The horn can limit the field of view of the chip sound waves according to actual requirements.

[0009] As a further solution of the present invention, the material of the structural layer is silicon oxide.

[0010] As a further solution of the present invention, the structural layer is a double-layer structure or a triple-layer structure in which silicon nitride and silicon oxide are alternately stacked.

[0011] Silicon oxide / silicon nitride is used as the main layer of the structural layer. Silicon oxide / silicon nitride has a low Young's modulus and low process stress, which can effectively reduce the resonant frequency and is beneficial to the production design and manufacturing of low-frequency devices.

[0012] As a further solution of the present invention, the groove forming the horn is a cylindrical structure.

[0013] As a further solution of the present invention, the groove forming the horn is a frustum structure, and the diameter of the groove forming the horn gradually increases from the direction close to the piezoelectric layer to the direction away from the piezoelectric layer.

[0014] As a further solution of the present invention, the groove forming the horn is a frustum-like structure, and the diameter of the groove forming the horn gradually increases from the direction close to the piezoelectric layer to the direction away from the piezoelectric layer.

[0015] As a further solution of the present invention, the structural layer is used as a mass block to increase the vibration range of the ultrasonic sensor diaphragm.

[0016] The horn can be formed in one piece, which can improve the consistency of the equipment, further reduce the packaging volume, and limit the field of view of the chip sound wave according to actual requirements.

[0017] A preparation method for the piezoelectric ultrasonic transducer, the preparation method comprising the following steps:

[0018] S1, preparing a substrate, the substrate having a front side and a back side opposite to each other, and growing a piezoelectric layer on the front side of the substrate;

[0019] S2, etching the piezoelectric layer to pattern the piezoelectric layer;

[0020] S3, growing a structural layer on the surface of the patterned piezoelectric layer;

[0021] S4, etching the structural layer to pattern the structural layer;

[0022] Among them, a horn for determining the sound wave field of view is formed inside the structural layer due to etching;

[0023] S5, etching through the substrate to form a back cavity;

[0024] The thickness of the structural layer is greater than the thickness of the piezoelectric film in the piezoelectric layer, so that the neutral plane is located within the lateral projection area of ​​the structural layer.

[0025] Through the above processing method, the neutral plane is moved up, the process stress is low, and the resonant frequency can be effectively reduced. At the same time, the sub-modules are connected by bending beams to reduce the generated resonant frequency. At the same time, the horn can limit the field of view of the chip sound wave according to actual requirements.

[0026] As a further solution of the present invention, the PECVD process is adopted when growing the structural layer on the surface of the piezoelectric layer in step S3.

[0027] As a further solution of the present invention, the back cavity process in S5 is:

[0028] Firstly, a dry process is used to etch part of the substrate from the back side of the substrate, and then a wet process is used to etch through the back cavity of the substrate.

[0029] Beneficial effects of the present invention:

[0030] 1. The piezoelectric ultrasonic transducer and preparation method thereof of the present invention adopts silicon oxide / silicon nitride as the structural layer, and the neutral plane is raised to the structural layer to replace the traditional top silicon. Silicon oxide / silicon nitride has a low Young's modulus and low process stress, which can effectively reduce the resonant frequency and is conducive to the design and manufacture of low-frequency devices.

[0031] 2. The present invention adopts the PECVD process to deposit the structural layer. While etching the structural layer to form a pattern, a horn is formed inside the structural layer by etching, replacing the original bonding process, so that the horn is formed in one piece, simplifying the process steps, improving the yield rate, improving the consistency of the equipment, further reducing the packaging volume, and limiting the field of view of the chip sound wave according to actual requirements.

[0032] 3. Compared with the traditional preparation process, the preparation method of the piezoelectric ultrasonic transducer of the present invention first grows the piezoelectric layer and patterns it, then grows the structural layer on the surface of the piezoelectric layer, and then patterns the structural layer. The patterning steps of the piezoelectric layer and the structural layer are independent and do not interfere with each other. The piezoelectric layer does not need to be hollowed out unnecessary due to the patterning of the structural layer, thereby ensuring the integrity of the piezoelectric layer to the greatest extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 Schematic diagram of the structure of the ultrasonic sensor based on the piezoelectric MEMS chip proposed in this embodiment;

[0034] Figure 2 for Figure 1 A front view of

[0035] Figure 3 for Figure 1 A top view of

[0036] Figure 4 for Figure 1 Schematic diagram of the horn structure in the middle structural layer;

[0037] Figure 5-Figure 7 for Figure 4 Vertical cross-sectional views of three different embodiments;

[0038] Figure 8-12 Schematic diagram of the preparation method proposed in this embodiment.

[0039] In the reference numerals:

[0040] 1. Substrate;

[0041] 2. Piezoelectric layer; 21. Bottom electrode; 22. Piezoelectric film; 23. Top electrode;

[0042] 3. Structural layer; 31. First structural layer; 32. Second structural layer; 33. Third structural layer. DETAILED DESCRIPTION

[0043] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar symbols throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0044] Example 1

[0045] See also Figure 1-3 The ultrasonic sensor based on the piezoelectric MEMS chip proposed in this embodiment includes a substrate 1, a piezoelectric layer 2 and a structural layer 3 which are stacked in sequence.

[0046] The substrate 1 has a front side and a back side opposite to each other. A back cavity is opened from the back side of the substrate 1 through the substrate 1. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection range of the back cavity are diaphragms. The back cavity provides a vibration space for the diaphragm.

[0047] The piezoelectric layer 2 includes a bottom electrode 21, a piezoelectric film 22 and a top electrode 23 which are sequentially stacked on the surface of the substrate 1. The thickness of the structural layer 3 is greater than that of the piezoelectric film 22, so that the neutral plane is located within the lateral projection area of ​​the structural layer 3.

[0048] The material of the structural layer 3 is silicon oxide, and the Young's modulus of silicon oxide is lower than that of silicon.

[0049] Optionally, the structural layer 3 includes a first structural layer 31 and a second structural layer 32, and the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31. Preferably, the material of the first structural layer 31 is silicon nitride (Si3N4), and the material of the second structural layer 32 is silicon oxide (SiO2). Optionally, when the material of the first structural layer 31 is silicon oxide, the material of the second structural layer 32 is silicon nitride.

[0050] Preferably, the structural layer 3 includes a first structural layer 31, a second structural layer 32 and a third structural layer 33, and the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31 and / or the third structural layer 33. Preferably, the material of the first structural layer 31 is silicon nitride (Si3N4), the material of the second structural layer 32 is silicon oxide (SiO2), and the material of the third structural layer 33 is silicon nitride. Optionally, when the material of the first structural layer 31 is silicon oxide, the material of the second structural layer 32 is silicon nitride, and the material of the third structural layer 33 is silicon oxide.

[0051] In this embodiment, the main structure of the structural layer 3 of the three-layer structure is the second structural layer 32. The second structural layer 32 mainly has the function of adjusting the neutral plane of the chip. The device performance is mainly determined by the material and thickness of the second structural layer 32. The main function of the first structural layer 31 is to improve the adhesion of the middle layer and improve the film forming quality. The third structural layer 33 increases the flexibility of the structural layer 3. The three-layer structure is more stable and reliable, and the yield rate is improved.

[0052] The piezoelectric ultrasonic sensor (PMUT) based on the MEMS chip proposed in this embodiment uses silicon oxide instead of silicon as the material of the structural layer 3. Silicon oxide has a low Young's modulus and low process stress, which can effectively reduce the resonant frequency and is conducive to the design and manufacture of low-frequency devices.

[0053] Optionally, the substrate 1 is a silicon wafer substrate 1, and the silicon wafer substrate 1 is used to replace the SOI substrate to reduce costs.

[0054] Further, such as Figure 4As shown, when the structural layer 3 is patterned, the structural layer 3 is cylindrical in shape, and a groove penetrating the structural layer 3 is provided inside the structural layer 3, so that the structural layer 3 forms a horn, and the horn is used to determine the field of view of sound wave transmission.

[0055] Embodiment 2:

[0056] Based on Example 1, the inner groove surface of the horn can present different structures to improve the performance of sound wave transmission.

[0057] Optional, such as Figure 5 As shown, the structural layer is cylindrical in shape, the inner groove of the horn is a cylindrical structure, and the inner groove runs through the structural layer 3, which is conducive to determining the field of view of sound wave transmission.

[0058] Optional, such as Figure 6 As shown, the inner groove of the horn is a frustum structure, and the diameter of the groove forming the horn gradually increases linearly from the direction close to the piezoelectric layer 2 to the direction away from the piezoelectric layer 2.

[0059] Optional, such as Figure 6 As shown, the angle θ between the oblique side of the groove forming the horn and the horizontal plane is in the range of 135°≤θ≤150°. A suitable angle θ is helpful to determine the field of view of sound wave transmission and improve the performance of sound wave transmission of the piezoelectric ultrasonic sensor.

[0060] Optional, such as Figure 7 As shown, the inner groove forming the horn is a frustum-like structure, and the diameter of the groove forming the horn increases nonlinearly from the direction close to the piezoelectric layer 2 to the direction away from the piezoelectric layer 2, so that the vertical cross-section of the structural layer 3 is roughly in the shape of a trumpet.

[0061] Optional, such as Figure 7 As shown, the cross-sectional line of the groove side wall forming the horn is a curve, and the theoretical formula of the curve is:

[0062] S=S T e mx (1)

[0063] Where m is the meander constant. The smaller m is, the smaller the rate of change of the horizontal cross-sectional area of ​​the horn is, and the lower the cut-off frequency fc is. S is the area of ​​the side of the groove forming the horn away from the substrate. S T is the area of ​​the side of the groove forming the horn close to the substrate, and S T Not greater than S.

[0064] The present invention uses a PECVD process to deposit the structural layer 3. While etching the structural layer 3 to form a pattern, a horn is formed inside the structural layer 3 by etching, replacing the original bonding process, so that the horn is integrally formed, the consistency of the equipment is improved, the packaging volume is further reduced, and the field of view of the chip sound wave can be limited according to actual requirements.

[0065] Furthermore, the horn formed by the grooves in the structural layer 3 is also formed as a mass block on the surface of the diaphragm, which can increase the displacement limit of the diaphragm, thereby improving the performance of the piezoelectric ultrasonic sensor.

[0066] Example 3

[0067] With respect to the piezoelectric ultrasonic transducer based on the MEMS chip of Example 1 or 2, this embodiment discloses a preparation method applied to the above-mentioned piezoelectric ultrasonic transducer, the steps comprising:

[0068] See also Figure 8 S1, preparing a substrate 1, the substrate 1 having a front side and a back side opposite to each other, and growing a piezoelectric layer 2 on the front side of the substrate 1, specifically comprising:

[0069] S1-1, sputtering and growing a bottom electrode 21 on the front surface of the substrate 1;

[0070] S1-2, sputtering and growing a piezoelectric film 22 on the surface of the bottom electrode 21;

[0071] S1 - 3 , a top electrode 23 is sputtered and grown on the surface of the piezoelectric film 22 .

[0072] See also Fig. 9 , S2, etching the piezoelectric layer 2 to pattern the piezoelectric layer 2, specifically comprising:

[0073] S2-1, using IBE dry etching to pattern the top electrode 23;

[0074] S2-2, wet etching the piezoelectric film 22 to pattern the piezoelectric film 22;

[0075] S2-3, using IBE dry etching to etch the bottom electrode 21, so as to pattern the bottom electrode 21.

[0076] See also Fig.10 , S3, using PECVD process to deposit the structural layer 3 on the surface of the piezoelectric layer 2, the thickness of the structural layer 3 is greater than the thickness of the piezoelectric film 22, so that the neutral plane is located within the lateral projection area of ​​the structural layer 3.

[0077] Preferably, the structural layer 3 includes a first structural layer 31, a second structural layer 32 and a third structural layer 33, the material of the first structural layer 31 and the third structural layer 33 is silicon nitride, the material of the second structural layer 32 is silicon oxide, and the thickness of the second structural layer 32 is much greater than the thickness of the first structural layer 31 and / or the third structural layer 33.

[0078] See also Fig.11 a, S4, the structural layer 3 is etched by an ICP dry process to pattern the structural layer 3. At the same time, the structural layer 3 is etched to form a horn for determining the sound wave field of view.

[0079] See also Fig.12 a, S5, etching through the back side of the substrate 1 to form a back cavity, the piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of ​​the back cavity are the diaphragm, and the back cavity provides a vibration space for the diaphragm.

[0080] Compared with the traditional preparation process, the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in this embodiment first grows the piezoelectric layer 2 and patterns it, then grows the structural layer 3 on the surface of the piezoelectric layer 2, and then patterns the structural layer 3. Therefore, the patterning steps of the piezoelectric layer 2 and the structural layer 3 are independent and do not interfere with each other. The piezoelectric layer 2 does not need to be unnecessary hollowed out due to the patterning of the structural layer 3, thereby ensuring the integrity of the piezoelectric layer 2 to the greatest extent.

[0081] Example 4

[0082] As a preferred solution of Example 3, please refer to Fig.11 b, S4, etching the structural layer 3 to pattern the structural layer 3, specifically including:

[0083] S4-1, etching the structure layer 3 by dry process to pattern the structure layer 3, and the third structure layer 33 forms a corresponding pattern due to etching;

[0084] S4-2, the second structure layer 32 is etched by a wet process, and the third structure layer 33 and the second structure layer 32 together form a horn for determining the sound wave field of view due to the etching.

[0085] The present invention adopts the PECVD process to deposit the structural layer 3. While etching the structural layer 3 to form a pattern, a horn is formed inside the structural layer 3 by etching, replacing the original bonding process, so that the horn is integrally formed, simplifying the process steps, improving the consistency of the equipment, further reducing the packaging volume, and limiting the field of view of the chip sound wave according to actual requirements.

[0086] See also Fig.12 b, S5, etching through the back side of the substrate 1 to form a back cavity, the piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of ​​the back cavity are the diaphragm, and the back cavity provides a vibration space for the diaphragm.

[0087] When the back cavity process is opened, a dry process may be used to first etch a portion of the substrate 11 from the back side of the substrate 11, and then a wet process may be used to etch through the back cavity of the substrate 11, specifically including:

[0088] S5-1, etching the back side of the substrate 1 by DIRE. The substrate 1 will not be penetrated here because the piezoelectric layer 2 will be damaged by IBE etching. Therefore, 5-15% of the thickness of the substrate 1 will remain after DIRE etching.

[0089] S5-2, etching the back side of the substrate 1 by a wet process, completely penetrating the remaining 5-15% thickness of the substrate 1, forming a U-shaped support structure, and forming a back cavity.

[0090] The preparation method is for a piezoelectric MEMS chip based on a silicon wafer substrate 1. When the SOI substrate 1 is etched, the buried oxide layer serves as a cutoff line, and a back cavity can be formed by penetrating the buried oxide layer. Pure dry etching may damage the piezoelectric layer 2. In order to improve the yield rate, a part of the silicon wafer substrate 1 is dry-etched, and then the remaining part is etched through by a wet process. The wet process will not affect the piezoelectric layer 2.

[0091] Example 5

[0092] As a preferred embodiment of Example 3 or 4, please refer to Fig.11 c, S4, etching the structural layer 3 to pattern the structural layer 3, specifically including:

[0093] S4-1, using ICP dry etching to pattern the structure layer 3, and the third structure layer 33 forms a corresponding pattern due to etching;

[0094] S4-2, etching the second structure layer 32 by a wet process, so that the second structure layer 32 forms a corresponding pattern;

[0095] S4-3, the first structure layer 31 is etched by ICP dry method, and the third structure layer 33, the second structure layer 32 and the first structure layer 31 together form a horn for determining the sound wave field of view due to the etching.

[0096] The present invention adopts the PECVD process to deposit the structural layer 3. While etching the structural layer 3 to form a pattern, a horn is formed inside the structural layer 3 by etching, replacing the original bonding process, so that the horn is integrally formed, simplifying the process steps, improving the consistency of the equipment, further reducing the packaging volume, and limiting the field of view of the chip sound wave according to actual requirements.

[0097] See also Fig.12 c, S5, etching through the back side of the substrate 1 to form a back cavity. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of ​​the back cavity are the diaphragm, and the back cavity provides a vibration space for the diaphragm.

[0098] When the back cavity process is opened, a dry process may be used to first etch a portion of the substrate 11 from the back side of the substrate 11, and then a wet process may be used to etch through the back cavity of the substrate 11, specifically including:

[0099] S5-1, etching the back side of the substrate 1 by DIRE. The substrate 1 will not be penetrated here because the piezoelectric layer 2 will be damaged by IBE etching. Therefore, 5-15% of the thickness of the substrate 1 will remain after DIRE etching.

[0100] S5-2, etching the back side of the substrate 1 by a wet process, completely penetrating the remaining 5-15% thickness of the substrate 1, forming a U-shaped support structure, and forming a back cavity.

[0101] The preparation method is for a piezoelectric MEMS chip based on a silicon wafer substrate 1. When the SOI substrate 1 is etched, the buried oxide layer serves as a cutoff line, and a back cavity can be formed by penetrating the buried oxide layer. Pure dry etching may damage the piezoelectric layer 2. In order to improve the yield rate, a part of the silicon wafer substrate 1 is dry-etched, and then the remaining part is etched through by a wet process. The wet process will not affect the piezoelectric layer 2.

[0102] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

[0103] It should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0104] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

Claims

1. An ultrasonic sensor based on a piezoelectric MEMS chip, comprising a substrate (1), wherein the substrate (1) has a front side and a back side opposite to each other, and a piezoelectric layer (2) is formed on the front side of the substrate (1), characterized in that: The back side of the substrate (1) is provided with a back cavity penetrating to the piezoelectric layer (2), and a structural layer (3) is formed on the surface of the piezoelectric layer (2), the thickness of the structural layer (3) being greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the lateral projection area of ​​the structural layer (3); The structural layer (3) has grooves formed inside to form a horn for determining the sound wave field of view.

2. The ultrasonic sensor based on the piezoelectric MEMS chip according to claim 1, characterized in that: The material of the structural layer (3) is silicon oxide.

3. The ultrasonic sensor based on the piezoelectric MEMS chip according to claim 1, characterized in that: The structural layer (3) is a double-layer structure or a triple-layer structure in which silicon nitride and silicon oxide are alternately stacked.

4. The integrated ultrasonic sensor based on adjusting the field of view according to claim 1, characterized in that: The slot forming the horn is a cylindrical structure.

5. The ultrasonic sensor based on the piezoelectric MEMS chip according to claim 1, characterized in that: The groove forming the horn is a frustum structure, and the diameter of the groove forming the horn gradually increases along the direction from approaching the piezoelectric layer (2) to away from the piezoelectric layer (2).

6. The ultrasonic sensor based on the piezoelectric MEMS chip according to claim 1, characterized in that: The groove forming the horn is a frustum-like structure, and the diameter of the groove forming the horn gradually increases in a direction from approaching the piezoelectric layer (2) to being away from the piezoelectric layer (2).

7. The ultrasonic sensor based on the piezoelectric MEMS chip according to claim 1, characterized in that: The structural layer (3) serves as a mass block and is used to increase the vibration range of the ultrasonic sensor diaphragm.

8. A method for preparing the piezoelectric ultrasonic transducer according to any one of claims 1 to 7, characterized in that: The preparation method comprises the following steps: S1, preparing a substrate (1), the substrate (1) having a front side and a back side opposite to each other, and growing a piezoelectric layer (2) on the front side of the substrate (1); S2, etching the piezoelectric layer (2) to pattern the piezoelectric layer (2); S3, growing a structural layer (3) on the surface of the patterned piezoelectric layer (2); S4, etching the structural layer (3) to pattern the structural layer (3); Wherein, a horn for determining the sound wave field of view is formed inside the structural layer (3) due to etching; S5, etching through the substrate (1) to form a back cavity; The thickness of the structural layer (3) is greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the lateral projection area of ​​the structural layer (3).

9. The preparation method according to claim 8, characterized in that: In the step S3, the PECVD process is used to grow the structural layer (3) on the surface of the piezoelectric layer (2).

10. The preparation method according to claim 8, characterized in that: The back cavity opening process in S5 is as follows: Firstly, a dry process is used to etch a portion of the substrate (1) from the back side of the substrate (1), and then a wet process is used to etch through the back cavity of the substrate (1).