Dense wavelength division multiplexing oriented silicon-on-insulator array waveguide grating chip
By introducing a wavelength thermal tuning structure into the SOI array waveguide grating chip, the refractive index of the array waveguide is modulated by the thermomodulation electrode, the wavelength offset problem caused by process error is solved, and the precise tuning of the AWG channel wavelength and the control of the output spectrum center wavelength are achieved, which improves the device's application performance in the fields of optical communication and microwave photons.
Patent Information
- Application Number
- CN202411970828.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2044-12-30
AI Technical Summary
The existing SOI array waveguide grating chips have limited process accuracy, resulting in large phase errors, affecting device performance. Especially when wavelength shifts, the target center wavelength does not match the design value, affecting the application in optical communication and microwave photon fields.
A silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing is designed, including an AWG structure and a wavelength thermally tuned structure. The wavelength thermal tuning structure is connected to an external control circuit through a thermomodulation electrode, and the refractive index of the array waveguide is used to heat modulate the refractive index of the AWG channel wavelength and precise control of the output spectrum center wavelength.
In the case of wavelength shift caused by process error, this design can maintain the alignment of the target center wavelength and the target wavelength channel, realize multi-wavelength dense wavelength division multiplexing, and has the advantages of small size and high reliability, and is suitable for integrated microwave photons and optical communication network systems.
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Figure CN119596452A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of integrated silicon photonics, and in particular to a silicon-on-insulator (SOI) array waveguide grating chip for dense wavelength division multiplexing. Background Art
[0002] As the data traffic in the global optical network shows an exponential growth, the demand for high-speed and large-capacity data transmission has made optical communication devices the focus of researchers. In order to expand the communication capacity of optical networks and increase the transmission rate, an effective means is to use wavelength division multiplexing technology, which allows multiple independent wavelength carrier optical signals to be transmitted simultaneously in the same optical fiber or optical waveguide, which can greatly increase the transmission capacity of optical networks and has broad application prospects in technical fields such as microwave photonics and optical communication networks. Optical wavelength division multiplexers can be roughly divided into arrayed waveguide grating (AWG) type, dielectric thin film filter (TFF) type and comb filter type. Among them, AWG, as a planar waveguide component based on optical integration technology, has the advantages of mass production, small size, and a large number of channels. Therefore, compared with other wavelength division multiplexing technologies, it has a good research and use value.
[0003] AWG generally consists of five parts: input waveguide, first slab waveguide, array waveguide, second slab waveguide and output waveguide, which can realize wavelength multiplexing and demultiplexing. Specifically, after the multiplexed signal light containing multiple wavelengths is output through the central input channel waveguide, it is diffracted in the input slab waveguide, reaches the input concave grating for power distribution, and is coupled into the array waveguide area. Because the end face of the array waveguide is located on the circumference of the grating circle, the diffracted light arrives at the end face of the array waveguide with the same phase. After being transmitted through the array waveguide, because the adjacent array waveguides maintain the same length difference ΔL, the output light of a certain wavelength of adjacent array waveguides on the output concave grating has the same phase difference. For light of different wavelengths, this phase difference is different, so light of different wavelengths is diffracted in the output slab waveguide and focused to different output channel waveguide positions. After being output through the output channel waveguide, the wavelength distribution, i.e., demultiplexing function, is completed. The reverse process of this process, that is, if the signal light is input in reverse, the multiplexing function can be realized.
[0004] The SOI platform has the advantages of large refractive index difference, good light confinement effect, compatibility with CMOS process, and mass production. At the same time, it also faces challenges such as small process tolerance and high design difficulty. For example, the disclosed invention patent CN 114755764A has solved the current design problem of 32-channel 100GHz compact dense wavelength division multiplexer. However, the refractive index difference between the core layer and cladding of silicon-based materials is large, the current chip process accuracy is limited, and the phase error has a great impact on device performance. The performance of the device prepared by the process flow will have a large deviation from the design value. For example, the center wavelength offset does not match the ITU standard channel wavelength, which will affect the application of the device in the field of optical communication and microwave photonics. Summary of the invention
[0005] The purpose of the present application is to provide an arrayed waveguide grating chip based on an SOI platform, which has the characteristics of a large number of optical channels, tunable wavelength, high integration, large process tolerance, and CMOS process compatibility. It can be used in optical technology fields with dense wavelength division multiplexing requirements such as multi-beam microwave photonic systems and large-capacity optical communication systems, and improve the optical information capacity and on-chip integration level of the system.
[0006] The technical solution of the present application is: to provide a silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing, the silicon array waveguide grating chip comprises an AWG structure and a wavelength thermal tuning structure, wherein the wavelength thermal tuning structure is located above the AWG structure;
[0007] The AWG structure is composed of an input waveguide, a first slab waveguide, an array waveguide, a second slab waveguide and an output waveguide connected in sequence according to the direction of the optical path, and the AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals;
[0008] One side of the first planar waveguide is connected to the input waveguide through an adiabatic transition structure, and the other side is connected to the array waveguide through an adiabatic transition structure; one side of the second planar waveguide is connected to the output waveguide through an adiabatic transition structure, and the other side is connected to the array waveguide through an adiabatic transition structure; the adiabatic transition structure is used to achieve mode field transition of the waveguides on both sides connected thereto by gradually changing the cross-sectional dimensions of the waveguide;
[0009] The wavelength thermal tuning structure includes a thermal tuning electrode, which is arranged directly above the array waveguide. The thermal tuning electrode is connected to an external control circuit and is used to generate Joule heat according to a voltage input by the external control circuit, and achieve tuning of the AWG channel wavelength by heating the array waveguide, wherein the square of the voltage amplitude is positively correlated with the drift amount of the AWG channel wavelength toward the long wavelength direction.
[0010] Furthermore, a side of the first slab waveguide close to the input waveguide is located on the circumference of the Rowland circle, and a side of the first slab waveguide close to the array waveguide is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.
[0011] Furthermore, ports of the first slab waveguide for connecting to the input waveguide are arranged at equal intervals on the circumference of the Rowland circle side of the first slab waveguide, and ports of the first slab waveguide for connecting to the array waveguide are arranged at equal intervals on the circumference of the grating circle side of the first slab waveguide.
[0012] Furthermore, the array waveguide includes a group of strip waveguides arranged at equal intervals, and the same length difference is set between adjacent strip waveguides. One end of a single strip waveguide is connected to the first planar waveguide through an adiabatic transition structure, and the other end is connected to the second planar waveguide through an adiabatic transition structure.
[0013] Furthermore, a single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length of the straight waveguide is greater than the length of the curved waveguide, the width of the straight waveguide is greater than the width of the curved waveguide, and a width gradient transition structure is provided at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.
[0014] Further, a side of the second slab waveguide close to the output waveguide is located on the circumference of the Rowland circle, and a side of the second slab waveguide close to the array waveguide is located on the circumference of the grating circle;
[0015] The ports of the second slab waveguide used for connecting to the output waveguide are arranged at equal intervals on the circumference of the second slab waveguide on the Rowland circle side, the central output waveguide of the output waveguide is located at the central position of the Rowland circle side of the second slab waveguide, and the ports of the second slab waveguide used for connecting to the array waveguide are arranged at equal intervals on the circumference of the second slab waveguide on the grating circle side.
[0016] Furthermore, a first passivation layer is provided between the thermal adjustment electrode and the arrayed waveguide, and the first passivation layer is an insulating passivation layer.
[0017] Furthermore, the wavelength thermal tuning structure further includes a metal electrode, and the thermal tuning electrode is connected to an external control circuit via the metal electrode.
[0018] Furthermore, a second passivation layer and a third passivation layer are sequentially arranged on the first passivation layer from bottom to top, the second passivation layer is located above the thermal adjustment electrode, a metal electrode passivation layer opening is arranged in the third passivation layer, and a conductive through hole for accommodating the metal electrode is arranged in the second passivation layer between the metal electrode passivation layer opening and the thermal adjustment electrode;
[0019] The top end of the metal electrode is arranged in the opening of the metal electrode passivation layer, and the bottom end of the metal electrode passes through the conductive through hole of the second passivation layer and is connected to the thermal adjustment electrode.
[0020] The technical solution of the present application also provides an application of a silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing in AWG channel wavelength tuning, including:
[0021] S101: Determine the magnitude of the applied voltage according to the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is:
[0022] Δλ=γ·V 2
[0023] Where Δλ is the wavelength drift of the AWG channel, γ is the proportionality coefficient, and V is the voltage amplitude;
[0024] S102: applying a voltage of a predetermined amplitude by using an external control circuit, the thermal adjustment electrode generates heat under the action of the voltage and heats the array waveguide, and the wavelength of the AWG channel drifts by an amount Δλ toward a longer wavelength.
[0025] The beneficial effects of this application are:
[0026] First, the number of channels N included in the arrayed waveguide grating in the technical solution of this application ch The free spectral range of the AWG structure is proportional to the channel spacing Δλ, so that the free spectral range (FSR) of the AWG satisfies the formula FSR = N ch ·Δλ condition, this design enables the channels in adjacent FSRs to compensate for the channel wavelengths in the designed central wavelength range when wavelength shift occurs, so that the target central wavelength channels can all work normally. Compared with the devices that cannot meet the conditions in the prior art, the AWG structure in the technical solution of this application can still align the target central wavelength with the target wavelength channel when the wavelength shift is caused by process errors; the AWG structure in the technical solution of this application can realize multi-wavelength dense wavelength division multiplexing on a compact chip, with the advantages of small size and high reliability, and is suitable for integrated microwave photonics and optical communication network systems. The technical solution of this application can be prepared using the SOI platform, and its preparation can be compatible with the CMOS process to achieve mass production and effectively reduce the cost of chip manufacturing.
[0027] Second, the technical solution of the present application sets up a wavelength thermal tuning structure in the silicon array waveguide grating chip. The structure is located above the AWG and is connected to an external control circuit. It can generate Joule heat under the action of an external control voltage, and change the effective refractive index of the array waveguide area by heating the array waveguide, modulate the phase characteristics of the light after passing through the array waveguide area, so that the central wavelength of the output spectrum changes, thereby achieving precise control of the passband wavelength of the wavelength division multiplexer and meeting the application requirements of multi-wavelength optical networks. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The advantages of the above and / or additional aspects of the present application will become apparent and easily understood in the description of the embodiments in conjunction with the following drawings, in which:
[0029] Figure 1 is a schematic diagram of an AWG planar structure according to an embodiment of the present application;
[0030] Figure 2 is a schematic diagram of an AWG cross-sectional structure according to an embodiment of the present application;
[0031] Figure 3 is a simulated spectrum diagram of an AWG according to an embodiment of the present application.
[0032] Among them, 1-input waveguide, 2-adiabatic transition structure, 3-first planar waveguide, 4-array waveguide, 5-thermal adjustment electrode, 6-metal electrode, 7-metal electrode passivation layer opening, 8-second planar waveguide, 9-output waveguide, 10-first passivation layer, 11-second passivation layer, 12-third passivation layer. DETAILED DESCRIPTION
[0033] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.
[0034] In the following description, many specific details are elaborated to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present application is not limited to the specific embodiments disclosed below.
[0035] like Figures 1 to 2 As shown, this embodiment provides a silicon-on-insulator array waveguide grating (AWG) chip for dense wavelength division multiplexing. The AWG chip is prepared based on an SOI wafer platform, wherein the SOI wafer consists of a silicon substrate, a buried oxide layer and a top silicon layer.
[0036] The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing includes an AWG structure and a wavelength thermal tuning structure. The wavelength thermal tuning structure is arranged above the AWG structure. The AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals. The wavelength thermal tuning structure is used to tune the wavelength of the AWG channel by heating, thereby causing the change of the central wavelength of the output spectrum of the AWG structure, realizing precise control of its passband wavelength, and meeting the application requirements of multi-wavelength optical networks.
[0037] like Figure 1 As shown, the AWG structure is composed of an input waveguide 1, a first slab waveguide 3, an array waveguide 4, a second slab waveguide 8 and an output waveguide 9 which are connected in sequence along the direction of the optical path.
[0038] The input waveguide 1 is connected to the first planar waveguide 3 through the adiabatic transition structure 2; the input waveguide 1 serves as an input port of multi-wavelength multiplexed light when the AWG structure realizes the optical signal demultiplexing function, and serves as an output port of multi-wavelength multiplexed light when the AWG structure realizes the optical signal multiplexing function.
[0039] In this embodiment, the input waveguide 1 can adopt a single-mode waveguide (a single-mode waveguide means that the optical signal maintains a single mode during transmission to reduce mode interference. The mode refers to the electromagnetic field distribution form when the light wave is transmitted in the waveguide), and the number thereof is one or more. Each input waveguide 1 is connected to the first planar waveguide 3 through an adiabatic transition structure 2.
[0040] The adiabatic transition structure 2 is used to achieve the mode field transition of the waveguides on both sides connected thereto by gradually changing the waveguide cross-sectional dimensions (width or height) (i.e., to achieve the continuous transition of the waveguide mode, the waveguide mode refers to the propagation mode of the light wave inside the waveguide, specifically manifested as the distribution of the electromagnetic field on the waveguide cross section), thereby reducing the loss and crosstalk caused by the mode mutation; for example, the adiabatic transition structure 2 disposed between the input waveguide 1 and the first slab waveguide 3 can achieve the mode field transition between the input waveguide 1 and the first slab waveguide 3, thereby reducing the loss and crosstalk in the transmission of the optical signal. In this embodiment, the waveguide cross-sectional dimensions of the end where the adiabatic transition structure 2 is connected to the input waveguide 1 are small, and the waveguide cross-sectional dimensions of the end where the adiabatic transition structure 2 is connected to the first slab waveguide 3 are large, and the waveguide cross-sectional dimensions gradually increase from the input waveguide 1 to the first slab waveguide 3.
[0041] It should be noted that the structure of the adiabatic transition structure 2 includes but is not limited to a linear gradient type and a parabolic type, and its waveguide structure characteristics can be a full etching type or a partial shallow etching type. The full etching type means that the top silicon of the SOI is completely etched, and the shallow etching type means that the top silicon of the SOI is not completely etched.
[0042] One side of the first slab waveguide 3 is connected to the input waveguide 1 through the adiabatic transition structure 2 , and the other side of the first slab waveguide 3 is connected to the array waveguide 4 through the adiabatic transition structure 2 .
[0043] In this embodiment, the waveguide cross-section size at the end where the adiabatic transition structure 2 is connected to the arrayed waveguide 4 is small, and the waveguide cross-section size at the end where the adiabatic transition structure 2 is connected to the first slab waveguide 3 is large, and the waveguide cross-section size gradually decreases from the first slab waveguide 3 to the arrayed waveguide 4. For example, one end of the adiabatic transition structure is connected to the input waveguide (or arrayed waveguide) through a fully etched waveguide with a gradually varying width, and the other end is connected to the slab waveguide through a shallowly etched ridge waveguide.
[0044] The side of the first slab waveguide 3 connected to the input waveguide 1 is located on the circumference of the Rowland circle, and the side of the first slab waveguide 3 connected to the array waveguide 4 is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.
[0045] The ports of the first slab waveguide 3 for connecting to the input waveguide 1 are arranged at equal intervals on the circumference of the Rowland circle side of the first slab waveguide 3 , and the ports of the first slab waveguide 3 for connecting to the array waveguide 4 are arranged at equal intervals on the circumference of the grating circle side of the first slab waveguide 3 .
[0046] In this embodiment, except for the Rowland circle side and the grating circle side of the first slab waveguide 3, the remaining boundary positions can be shallowly etched or not etched to reduce interface reflection crosstalk.
[0047] In this embodiment, when the AWG implements wavelength demultiplexing, the first slab waveguide 3 is used as the diffraction area of the multi-wavelength multiplexed light to expand and diffract the multi-wavelength multiplexed light from the input waveguide 1, and couple it to the array waveguide 4 with the same phase. After the light wave is transmitted through the array waveguide 4 with a constant difference in the length of adjacent waveguides, a phase difference is generated. Due to the different phase differences, the light of different wavelengths is focused by the second slab waveguide 8 to different positions on the output waveguide 9 for output, thereby completing wavelength demultiplexing. When the AWG implements wavelength multiplexing (i.e., the inverse process of demultiplexing), monochromatic lights of different wavelengths are input from different ports of the output waveguide 9, and converge to the same port of the input waveguide 1 after passing through the second slab waveguide 8, the array waveguide 4, and the first slab waveguide 3, thereby achieving wavelength multiplexing.
[0048] The array waveguide 4 includes a group of strip waveguides arranged at equal intervals, and the same length difference is set between adjacent strip waveguides (for example, the length difference of adjacent waveguides is set to △L. In the array waveguide 4, if the length of the strip waveguides in the first column is x, the length of the second column can be x+△L, and the length of the third column can be x+2△L). One end of a single strip waveguide is connected to the first planar waveguide 3 through an adiabatic transition structure 2, and the other end is connected to the second planar waveguide 8 through an adiabatic transition structure 2. When the AWG implements wavelength demultiplexing, the optical signal enters the array waveguide 4 after passing through the first planar waveguide 3, and is transmitted along the strip waveguide in the array waveguide 4 to the second planar waveguide 8, and then is output by the second planar waveguide 8. Similarly, when the AWG implements wavelength multiplexing, the optical signal enters the array waveguide 4 after passing through the second planar waveguide 8, and is transmitted along the strip waveguide in the array waveguide 4 to the first planar waveguide 3, and then is output by the first planar waveguide 3.
[0049] In this embodiment, the maximum number of channels of the AWG structure (the number of channels is the maximum number of wavelengths that the AWG can multiplex or demultiplex), the free spectral range, and the channel spacing satisfy the following formula:
[0050] FSR ≥ N ch ·Δλ
[0051] Where FSR is the free spectral range of the AWG structure, Δλ is the channel spacing, and N ch is the maximum number of channels; when FSR = N ch ·Δλ, N ch Get the maximum value.
[0052] A single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length and width of the straight waveguide are respectively greater than the length and width of the curved waveguide, and a width gradient transition structure is arranged at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.
[0053] In this embodiment, a single strip waveguide in the array waveguide 4 can be arranged in a saddle shape, an S shape, or other arrangement modes. When arranging, the length of the curved waveguide is reduced to the minimum value within the allowable range, and the straight waveguide is widened, which can reduce the phase noise introduced by the process error. A gradual width transition structure is used at the connection between the straight waveguide and the curved waveguide, which can make the light field slowly transition between the single-mode and multi-mode waveguides, reducing the loss and crosstalk caused by the mode mutation.
[0054] In this embodiment, the structural form of a straight waveguide plus a curved waveguide refers to a waveguide structure that includes two parts of different forms in the propagation path, one part is a straight waveguide, and the other part is a curved waveguide, such as the common saddle-shaped and S-shaped waveguide structures, which are both structural forms of a straight waveguide plus a curved waveguide. The saddle-shaped waveguide structure presents a shape similar to a saddle, usually the waveguide is bent in one direction and has different degrees of curvature in another direction, and the S-shaped waveguide layout presents a shape similar to the letter S, and the waveguide makes one or more turns in the propagation path, usually bending along a plane or spatial direction to form two corners of 90 degrees or more.
[0055] The output waveguide 9 is connected to the second planar waveguide 8 through the adiabatic transition structure 2; the output waveguide 9 serves as an output port of single-wavelength demultiplexed light when the AWG implements the optical signal demultiplexing function, and serves as an input port of single-wavelength demultiplexed light when the AWG implements the optical signal multiplexing function.
[0056] In this embodiment, the output waveguide 9 can be a strip waveguide, the number of which is greater than or equal to the actual number of AWG channels (usually one wavelength channel corresponds to one output waveguide, and the output waveguide can be redundant), and each output waveguide 9 is connected to the second planar waveguide 8 through the adiabatic transition structure 2.
[0057] One side of the second slab waveguide 8 is connected to the output waveguide 9 through the adiabatic transition structure 2 , and the other side of the second slab waveguide 8 is connected to the array waveguide 4 through the adiabatic transition structure 2 .
[0058] The side of the second slab waveguide 8 connected to the output waveguide 9 is located on the circumference of the Rowland circle, and the side of the second slab waveguide 8 connected to the array waveguide 4 is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.
[0059] The ports of the second slab waveguide 8 for connecting to the output waveguide 9 are arranged at equal intervals and symmetrically on the circumference of the Rowland circle side of the second slab waveguide 8. The central output waveguide of the output waveguide 9 is located at the intersection of the extension line of the array waveguide 4 and the Rowland circle, that is, located at the central position of the Rowland circle side of the second slab waveguide 8. The ports of the second slab waveguide 8 for connecting to the array waveguide 4 are arranged at equal intervals on the circumference of the grating circle side of the second slab waveguide 8.
[0060] In this embodiment, the structure of the second slab waveguide 8 is similar to that of the first slab waveguide 3. Except for the Rowland circle side and the grating circle side, the remaining boundary positions of the second slab waveguide 8 can be shallowly etched or not etched to reduce interface reflection crosstalk.
[0061] In this embodiment, when the AWG implements wavelength demultiplexing, the second slab waveguide 8 serves as an interference radiation area of the multi-wavelength light, and is used to interfere with the multi-wavelength light from the array waveguide 4, and the light of different wavelengths will be focused to different port positions on the Rowland circle side interface of the second slab waveguide 8, and the wavelength demultiplexed light is output through different ports between the second slab waveguide 8 and the output waveguide 9 to achieve wavelength demultiplexing; when the AWG implements wavelength multiplexing, monochromatic light of different wavelengths is input from different ports of the output waveguide 9, and converges to the same port of the input waveguide 1 after passing through the second slab waveguide 8, the array waveguide 4, and the first slab waveguide 3, thereby achieving wavelength multiplexing.
[0062] In this embodiment, when lights of different wavelengths transmitted through the array waveguide 4 are at the grating circle side interface of the second slab waveguide 8, lights of the same wavelength have different phase differences. These lights with different phase differences will interfere in the second slab waveguide 8 and focus to the same position. Ultimately, lights of different wavelengths will focus to different ports at the Rowland circle side interface.
[0063] In this embodiment, the functions of all the adiabatic transition structures 2 are the same, which are used to achieve mode field transition between two waveguides to reduce the loss and crosstalk caused by mode mutation; their structures include but are not limited to linear gradient type and parabolic type, and the waveguide structure characteristics can be fully etched or partially shallowly etched.
[0064] The wavelength thermal tuning structure includes a thermal tuning electrode 5, which covers the array waveguide 4 and is connected to an external control circuit to generate Joule heat according to the voltage input by the external control circuit, and achieve the tuning of the AWG channel wavelength by heating the array waveguide 4; wherein the square of the voltage amplitude is positively correlated with the drift of the AWG channel wavelength toward the long wavelength direction.
[0065] A first passivation layer 10 is disposed between the thermal tuning electrode 5 and the arrayed waveguide 4. The first passivation layer 10 is an insulating passivation layer disposed between the thermal tuning electrode 5 and the arrayed waveguide 4 by evaporation. The material of the first passivation layer 10 is silicon dioxide or silicon nitride.
[0066] In this embodiment, the function of the thermal tuning electrode 5 is to change the channel wavelength of the AWG by causing FSR (Free Spectral Range, which represents the frequency difference or wavelength difference of adjacent modes in the wavelength space in the AWG) drift by heating the array waveguide 4. The thermal tuning electrode 5 can be formed by a thin film with a certain resistance value formed by evaporation. The evaporation material can be TiN, NiCr, etc., and the evaporation method includes but is not limited to electron beam evaporation, atomic layer deposition, or magnetron sputtering.
[0067] The wavelength thermal tuning structure further includes a metal electrode 6 , and the thermal tuning electrode 5 is connected to an external control circuit via the metal electrode 6 .
[0068] A second passivation layer 11 and a third passivation layer 12 are sequentially arranged on the first passivation layer 10 from bottom to top. The second passivation layer 11 is located above the thermal adjustment electrode 5. A metal electrode passivation layer opening 7 is arranged in the third passivation layer 12. A conductive through hole for accommodating the metal electrode 6 is arranged in the second passivation layer 11 between the metal electrode passivation layer opening 7 and the thermal adjustment electrode 5.
[0069] The top end of the metal electrode 6 is disposed in the metal electrode passivation layer opening 7 , and the bottom end of the metal electrode 6 passes through the conductive through hole of the second passivation layer 11 and is connected to the thermal adjustment electrode 5 .
[0070] The material of the metal electrode 6 is selected from metal materials with low resistivity such as Al, Cu, Au or their alloys. The resistivity of the metal electrode 6 is much smaller than that of the thermal adjustment electrode 5, and the sheet resistance of the metal electrode 6 is ≤0.1Ω / sq.
[0071] The second passivation layer 11 is an insulating passivation layer disposed between the thermal adjustment electrode 5 and the metal electrode passivation layer opening 7 by evaporation. The material of the second passivation layer 11 is silicon dioxide or silicon nitride.
[0072] The third passivation layer 12 is an insulating passivation layer disposed on the second passivation layer 11 by evaporation, and the material thereof is silicon dioxide or silicon nitride.
[0073] In this embodiment, when using the AWG, a voltage is applied to the metal electrode 6 through an external control circuit, so that the thermal tuning electrode 5 can generate Joule heat, and the generated Joule heat is used to heat the array waveguide 4, so that the wavelength of the AWG channel can be tuned. In particular, by controlling the voltage amplitude loaded on the metal electrode 6 to adjust the heat generated by the thermal tuning electrode 5, the channel wavelength of the AWG can be accurately controlled to achieve wavelength adjustment and selection. Specifically, the greater the voltage amplitude applied to the metal electrode 6, the more heat the thermal tuning electrode 5 generates. Since the increase in temperature will cause the refractive index of the silicon waveguide to increase, the greater the refractive index of the array waveguide 4, the greater the phase difference of different light wavelengths, causing the AWG channel wavelength to drift toward the long wavelength direction.
[0074] In this embodiment, a metal electrode passivation layer opening 7 is provided in the third passivation layer 12, and its function is to connect the on-chip electrode to the external control circuit by wire bonding or the like, so as to realize the driving control of the on-chip power-consuming unit by the external control circuit.
[0075] In this embodiment, the first passivation layer 10, the second passivation layer 11 and the third passivation layer 12 are usually made of insulating materials with high hardness such as silicon dioxide or silicon nitride, which can protect the chip surface and provide electrical insulation.
[0076] In this embodiment, the preparation of the AWG chip is based on an SOI wafer, which is generally composed of a silicon substrate, a buried oxide layer and a top silicon layer, wherein the waveguide devices (i.e., the AWG structure) are all located in the top silicon layer, and the waveguide devices include an input waveguide 1, an adiabatic transition structure 2, a first planar waveguide 3, an array waveguide 4, a second planar waveguide 8 and an output waveguide 9; the thickness of the top silicon layer is generally set to 220 nm, and can also be adjusted accordingly according to different usage scenarios.
[0077] This embodiment also provides an application of a silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing in AWG channel wavelength tuning, comprising:
[0078] S101: Determine the magnitude of the applied voltage according to the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is:
[0079] Δλ=γ·V 2
[0080] Wherein, Δλ is the wavelength drift of the AWG channel, γ is the proportionality coefficient, and V is the voltage amplitude. The proportionality coefficient γ is used to describe the relationship between the wavelength drift of the AWG channel and the voltage amplitude. It is a constant. In practice, the size of the proportionality coefficient γ depends on the thermo-optical coefficient of the waveguide material and the thermal characteristics of the waveguide, which can be obtained through experimental measurement.
[0081] S102: Using an external control circuit to apply a voltage of a predetermined amplitude, the thermal adjustment electrode 5 generates heat under the action of the voltage and heats the arrayed waveguide 4, and the wavelength of the AWG channel drifts by an amount Δλ toward a longer wavelength.
[0082] Example: Taking a 32-channel AWG with a C-band and a frequency interval of 100 GHz as an example, the AWG is prepared through micro-nano technology based on an SOI wafer with a typical top silicon thickness of 220 nm (it can be prepared using a standard CMOS process), where the buried oxide layer and silicon substrate layer thickness of the SOI wafer are typically 3 μm and 700 μm, respectively.
[0083] The input waveguide 1 is a strip waveguide with a width of 500 nm, and 9 strips are provided in total. The spacing between adjacent input waveguides 1 is 30 μm. The effective refractive index of the input waveguide 1 is about 2.45, and the group refractive index is about 4.21.
[0084] The adiabatic transition structure 2 adopts a composite structure of linear gradient full etching and parabolic shallow etching, such as Figure 1As shown in the enlarged image on the left, the full etching depth is 220nm and the shallow etching depth is 90nm; the length of the linear gradient structure is 40μm, the length of the parabolic structure is 32μm, and the width of the end of the adiabatic transition structure 2 connected to the input waveguide 1 is 500nm. Its width gradually changes from 500nm to 2μm and then connects to the first planar waveguide 3; this composite structure realizes the mode field transition between the input waveguide and the planar waveguide, reducing the loss and crosstalk caused by mode mutation.
[0085] The grating circle side radius of the first slab waveguide 3 is set to 850 μm, the Rowland circle side radius is set to 425 μm, the ports corresponding to the input waveguide 1 are arranged on the circumference of the Rowland circle side in an axially symmetrical and equally spaced manner, the ports corresponding to the array waveguide 4 are arranged on the circumference of the grating circle side in an axially symmetrical and equally spaced manner, and a 90 nm shallow etching process is performed on the upper and lower boundaries of the first slab waveguide 3 to reduce interface reflection crosstalk.
[0086] The array waveguide 4 uses a group of strip waveguides with a lateral spacing of 2.24 μm and a length spacing of 24.21 μm. The single strip waveguide is arranged in a saddle shape, including the structural forms of straight waveguides and curved waveguides. The width of the straight waveguide is set to 1 μm to reduce the phase noise introduced by the process error. The connection between the straight waveguide and the curved waveguide adopts a width gradient transition structure, and the length of the width gradient transition structure is set to 8 μm. Figure 1 As shown in the enlarged view on the right, the number of array waveguides 4 is set to 149.
[0087] The thermal adjustment electrode 5 is made of TiN material. Specifically, the TiN material is evaporated on the first passivation layer 10 by atomic layer deposition, and the TiN film pattern is prepared by metal etching or stripping process to form a TiN film with a thickness of 50nm. The square resistance of the thermal adjustment electrode 5 is about 11Ω / sq.
[0088] The metal electrode 6 is made of AlCu alloy material. Specifically, a metal electrode passivation layer opening 7 is prepared by a photolithography and etching process, the AlCu alloy material is arranged on the thermal adjustment electrode 5 by electron beam evaporation or vapor deposition, and an AlCu pattern is prepared by a metal etching or stripping process to form a metal electrode 6. The square resistance of the metal electrode 6 is about 0.1Ω / sq; the metal electrode 6 is connected to an external circuit to realize the drive control of the on-chip power unit by the external circuit.
[0089] The output waveguide 9 uses a strip waveguide with a width of 500nm, with a total of 36 strips, which is greater than the actual number of channels 32. The ports corresponding to the output waveguide 9 are arranged on the circumference of the Rowland circle side of the second planar waveguide 8 in an axially symmetrical and equidistant manner, and the output waveguide spacing is set to 6.5μm.
[0090] By using the above AWG structure, the multiplexed light of ITU22-53 with a total of 32 wavelengths is input from the input waveguide 1, and the monochromatic light of 32 wavelengths can be obtained at the output waveguide 9. The output spectrum is shown in the attached figure. Figure 3 As shown, the AWG structure in this example can realize the demultiplexing function, and its reverse process can multiplex 32 wavelengths into one beam of multi-wavelength light to realize wavelength multiplexing. Figure 3 As shown, when the designed central wavelength shifts one channel toward the long wavelength direction, the rightmost channel in the first adjacent FSR will compensate to the leftmost channel of the designed central wavelength, so that all 32 target central wavelength channels can work normally.
[0091] The steps in this application can be adjusted in order, combined, and deleted according to actual needs.
[0092] The units in the device of the present application can be combined, divided and deleted according to actual needs.
[0093] Although the present application is disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely exemplary and are not intended to limit the application of the present application. The scope of protection of the present application is defined by the appended claims and may include various modifications, alterations and equivalents made to the invention without departing from the scope and spirit of the present application.
Claims
1. A silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing, characterized in that: The silicon array waveguide grating chip comprises an AWG structure and a wavelength thermal tuning structure, wherein the wavelength thermal tuning structure is located above the AWG structure; The AWG structure is composed of an input waveguide (1), a first planar waveguide (3), an array waveguide (4), a second planar waveguide (8) and an output waveguide (9) connected in sequence according to the direction of the optical path, and the AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals; One side of the first planar waveguide (3) is connected to the input waveguide (1) via an adiabatic transition structure (2), and the other side is connected to the array waveguide (4) via the adiabatic transition structure (2); one side of the second planar waveguide (8) is connected to the output waveguide (9) via the adiabatic transition structure (2), and the other side is connected to the array waveguide (4) via the adiabatic transition structure (2); the adiabatic transition structure (2) is used to achieve mode field transition of the waveguides on both sides connected thereto by gradually changing the cross-sectional dimensions of the waveguides; The wavelength thermal tuning structure comprises a thermal tuning electrode (5), wherein the thermal tuning electrode (5) is arranged directly above the array waveguide (4), and the thermal tuning electrode (5) is connected to an external control circuit, and is used to generate Joule heat according to a voltage input by the external control circuit, and to achieve tuning of the AWG channel wavelength by heating the array waveguide (4), wherein the square of the voltage amplitude is positively correlated with the drift amount of the AWG channel wavelength toward the long wavelength direction.
2. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The side of the first slab waveguide (3) close to the input waveguide (1) is located on the circumference of the Rowland circle, and the side of the first slab waveguide (3) close to the array waveguide (4) is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.
3. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing as claimed in claim 2, characterized in that: The ports of the first slab waveguide (3) used for connecting to the input waveguide (1) are arranged at equal intervals on the circumference of the Rowland circle side of the first slab waveguide (3), and the ports of the first slab waveguide (3) used for connecting to the array waveguide (4) are arranged at equal intervals on the circumference of the grating circle side of the first slab waveguide (3).
4. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The arrayed waveguide (4) comprises a group of strip waveguides arranged at equal intervals, and the same length difference is set between adjacent strip waveguides; one end of a single strip waveguide is connected to a first planar waveguide (3) via an adiabatic transition structure (2), and the other end is connected to a second planar waveguide (8) via an adiabatic transition structure (2).
5. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing as claimed in claim 4, characterized in that: The single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length of the straight waveguide is greater than the length of the curved waveguide, the width of the straight waveguide is greater than the width of the curved waveguide, and a width gradient transition structure is arranged at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.
6. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The side of the second slab waveguide (8) close to the output waveguide (9) is located on the circumference of the Rowland circle, and the side of the second slab waveguide (8) close to the array waveguide (4) is located on the circumference of the grating circle; The ports of the second slab waveguide (8) for connecting to the output waveguide (9) are arranged at equal intervals on the circumference of the second slab waveguide (8) on the Rowland circle side, the central output waveguide of the output waveguide (9) is located at the central position of the Rowland circle side of the second slab waveguide (8), and the ports of the second slab waveguide (8) for connecting to the array waveguide (4) are arranged at equal intervals on the circumference of the second slab waveguide (8) on the grating circle side.
7. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: A first passivation layer (10) is arranged between the thermal adjustment electrode (5) and the arrayed waveguide (4), and the first passivation layer (10) is an insulating passivation layer.
8. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 7, characterized in that: The wavelength thermal tuning structure also includes a metal electrode (6), and the thermal tuning electrode (5) is connected to an external control circuit via the metal electrode (6).
9. The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing according to claim 8, characterized in that: A second passivation layer (11) and a third passivation layer (12) are sequentially arranged on the first passivation layer (10) from bottom to top, the second passivation layer (11) is located above the thermal adjustment electrode (5), a metal electrode passivation layer opening (7) is arranged in the third passivation layer (12), and a conductive through hole for accommodating a metal electrode (6) is arranged in the second passivation layer (11) between the metal electrode passivation layer opening (7) and the thermal adjustment electrode (5); The top end of the metal electrode (6) is arranged in the metal electrode passivation layer opening (7), and the bottom end of the metal electrode (6) passes through the conductive through hole of the second passivation layer (11) to be connected to the thermal adjustment electrode (5).
10. An application of the silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing as claimed in any one of claims 1 to 9 in AWG channel wavelength tuning, comprising: S101: Determine the magnitude of the applied voltage according to the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is: Δλ=γ·V 2 Where Δλ is the wavelength drift of the AWG channel, γ is the proportionality coefficient, and V is the voltage amplitude; S102: Using an external control circuit to apply a voltage of a predetermined amplitude, the heat-adjusting electrode (5) generates heat under the action of the voltage and heats the arrayed waveguide (4), and the wavelength of the AWG channel drifts by an amount Δλ toward a longer wavelength.
Citation Information
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