Zener diode chip manufacturing method

Abstract

The invention relates to a voltage stabilizing diode chip manufacturing method, and belongs to the field of electronic accessories. According to the method for plating nickel and silver on the metal, the adhesion among all layers of the metal is improved, the metal is not prone to falling off, and the weldability and the uniformity are improved. And by adopting a silicon wafer diffusion method, only one-time photoetching is adopted, so that the cost is greatly reduced. Besides, the glass powder is adopted for glass passivation, the glass powder of the formula is easier and faster to melt after being subjected to high temperature, inconsistent thickness caused by non-uniform melting and cracks of a glass layer are avoided, the uniformity of glass passivation is improved, PN junctions are better protected while the area of the PN junctions is increased, and the reject ratio of electric leakage is avoided. And the working current is improved. According to the method disclosed by the invention, the mode of grooving the glass of which the grooves are removed by the ultraviolet laser on the front surface, grooving the back surface by the infrared laser and then splitting is adopted, so that the loss in the cutting process and the damage to a glass passivation layer are greatly reduced, and the product yield and the yield are effectively improved.

Description

Technical Field

[0001] The invention relates to a method for manufacturing a voltage-stabilizing diode chip, and belongs to the technical field of electronic accessories. Background Art

[0002] The voltage regulator diode, also called the Zener diode, is a voltage regulator diode made by using the reverse breakdown state of the pn junction, where the current can vary over a wide range while the voltage remains basically unchanged. This diode is a semiconductor device with a very high resistance until the critical reverse breakdown voltage. At this critical breakdown point, the reverse resistance is reduced to a very small value. In this low resistance area, the current increases while the voltage remains constant. The voltage regulator diode is divided into grades according to the breakdown voltage. Because of this characteristic, the voltage regulator is mainly used as a voltage regulator or voltage reference element.

[0003] The core structure of the Zener diode is a PN junction, and the reverse breakdown voltage of the Zener diode is usually equal to the reverse breakdown voltage of its PN junction. In the prior art, in order to make a Zener diode, a heavily doped N region (or P region) and a lightly doped P region (or N region) are usually set, and the desired reverse breakdown voltage is achieved by adjusting the doping concentration of the lightly doped region. This method is relatively simple, but the stable voltage of the Zener diode mainly depends on the doping concentration of the lightly doped P region (or N region), and it is found in the practical process that the doping concentration of the lightly doped P region (or N region) is converted into an ion implantation dose in the range of 3E13 to 3E14. This order of magnitude of ion implantation process is often unable to be integrated with other ion implantation process steps in the integrated circuit. Therefore, it is necessary to set up photolithography and doping (ion implantation) process steps specifically for the realization of the Zener diode, which increases the process steps and the manufacturing cost is relatively high. The working current of the Zener diode is used to enhance its voltage stabilization performance. Currently, a common method to increase the operating current of a Zener diode is to increase the area of ​​its PN junction. However, an increase in the PN junction area will also increase the leakage of the Zener diode, which limits the increase in the operating current. Solving the PN junction leakage is a technical problem. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention provides a method for manufacturing a voltage regulator diode chip, which can solve the problem in the prior art that a photolithography and doping process need to be specially set for a lightly doped region of a voltage regulator diode, resulting in high manufacturing costs. The glass powder configuration and coating method in the present invention can better protect the PN junction, reduce the leakage defect rate of the voltage regulator tube, and improve the chip output rate through a lossless cutting method. Through the silver plating technology of the method, the tube core can improve the uniformity and solderability of the coating, and improve the wire bonding yield.

[0005] The technical solution of the present invention is as follows:

[0006] A method for manufacturing a voltage regulator diode chip comprises the following steps:

[0007] (1) Cleaning impurities on the surface of the silicon wafer, cleaning the silicon wafer twice and then drying it;

[0008] (2) High temperature oxidation to form a SiO2 film on the surface of the silicon wafer;

[0009] (3) Single-sided photoresist removal, single-sided oxide layer removal, photoresist removal, and cleaning;

[0010] (4) N-type doped phosphorus source diffusion: The wafer and phosphorus paper (P95A) are placed alternately on the left and right, arranged and pressed in sequence, placed flat on a silicon carbide flat boat, and pushed into a diffusion furnace for source diffusion;

[0011] (5) Wafer splitting after diffusion: Through the acid corrosion process, the borosilicate glass or phosphosilicate glass formed at high temperature is dissolved, the wafers are separated, the glass crystals on the wafer surface are eliminated, and the silicon wafer surface is clean and free of foreign matter;

[0012] (6) Oxide layer cleaning: Soak the wafer in an oxide layer etching solution and observe under a microscope whether the oxide layer inside the photolithography line is clean;

[0013] (7) High-pressure sandblasting (0.4-0.6MPa) to adjust the thickness of silicon wafers. High-pressure diamond sand is used to bombard the wafer surface to adjust the thickness and remove foreign matter such as oxide layer and surface particles on the wafer surface.

[0014] (8) P-type doped boron source diffusion: The phosphorus side of the wafer faces the phosphorus side, and a piece of boron paper (B20) is sandwiched between the empty side (the side where the N-type doped phosphorus source is diffused is called the phosphorus side, and the other side is called the empty side). The wafers are arranged and pressed tightly on the left and right sides, and then placed flat on a silicon carbide flat boat. A silicon blind wafer is placed underneath, and a 1 cm thick silicon pressing sheet is pressed on the surface. The wafers are pushed into the diffusion furnace for source diffusion.

[0015] (9) Wafer segmentation, double-sided sandblasting, and oxide layer cleaning;

[0016] (10) Performing a photolithography process to form a pattern that meets the process requirements on the wafer surface by exposure and development, thereby achieving local protection and achieving the purpose of localized processing;

[0017] (11) Grooving: Turn on the trenching machine (a trenching machine is a device commonly used in the art for etching with acid), place the wafer in a mixed acid tank, press the rocker key to start trenching the sub-line grooves on the side of the diffused phosphorus, and perform trenching in the X and Y directions (grooving is a process of etching with acid) to form a "+"-shaped groove to form a PN junction;

[0018] (12) Apply glass powder for glass passivation: Place the cleaned wafer with the grooved surface facing up on a suction cup, and suck the bottom of the wafer with the suction cup; use a powder-coating spoon to take 1 mL of glass powder on the grooved side of the wafer, and spread it evenly with a scraper. When scraping the powder, do not scrape along the grooves, but scrape the glass paste into the wafer grooves at an angle of 45 degrees along the arrangement angle of the chip. Load the wafer into a quartz boat and push it into a glass sintering furnace for glass passivation;

[0019] (13) Place the passivated wafers in a basket (a basket is a tool used in the art for loading wafers) in turn, soak them in a 5:1 hydrofluoric acid solution for about 5 seconds, flush them with overflow water for 4 minutes, and soak the wafers in a mixed acid solution for 1 second. The mixed acid has the same composition as that in step (11). Take out the overflow and flush them with water for 4 minutes. Place them in a hot cleaning solution (a ham powder solution) for ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times; place them in pure water for overflow ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times;

[0020] (14) Pour 2000 ml of nickel solution and 4000 ml of hot deionized water at 50-70° into a nickel plating tank and heat to 95°C ± 5, then add 600 ml of ammonia water, test the pH value of the nickel solution with a pH test paper to find it is about 8.5, place a flower basket into the nickel plating tank for metal nickel plating, and shake the flower basket up and down continuously during the nickel plating process for 60-120 seconds, flush with overflow water for 5-15 minutes, spin dry at 100-200 rpm / s, and dry in an oven at 100-200°C / 30-60 minutes.

[0021] (15) Cutting the wafer, using an ultraviolet laser scriber to groove the glass passivation surface, using an infrared scriber to groove the back surface, and using a wafer splitter to split the wafer into individual chips;

[0022] (16) Silver plating of the tube core: According to the formula of the silver plating solution, a silver layer is plated on the surface of the electrode to increase the electrode thickness and improve the electrode solderability.

[0023] Preferably, in step (1), the two cleanings are performed using 1# and 2# solutions respectively, wherein the volume ratio of 1# solution is: hydrogen peroxide (hydrogen peroxide): ammonia water: deionized water = 1:1:6; and the volume ratio of 2# solution is: hydrogen peroxide (hydrogen peroxide): hydrochloric acid: deionized water = 1:1:6.

[0024] Preferably, in step (2), the silicon dioxide growth conditions are: oxidation furnace temperature 600-800°C, wet oxygen flow 2-3L / min, time 8-10h; dry oxygen flow 2-3L / min, time 1-2h.

[0025] Preferably, in step (4), the phosphorus source diffusion temperature is 1200-1300° C. and the time is 30-50 h;

[0026] Preferably, in step (5), the solution used in the acid corrosion process is a hydrofluoric acid solution, and the immersion time is 12-48 hours.

[0027] Preferably, in step (6), the volume ratio of the solution used to remove the oxide layer is hydrofluoric acid: ammonium fluoride: water = 1:2:3.

[0028] In step (7), sandblasting removes 3-15 um.

[0029] Preferably, in step (8), the boron source diffusion temperature is 1100-1300° C., and the diffusion time is 10-20 h.

[0030] Preferably, in step (11), the volume ratio of the mixed acid in the mixed acid tank is nitric acid: hydrofluoric acid: glacial acetic acid = 5:3:1, the etching time is 6-15 minutes, the etching depth is 60-80 microns, and the groove width is 100-150 microns.

[0031] Preferably, in step (12), the glass powder is prepared by:

[0032] a. Take 1000g of GP-230S glass powder, 6g of ethyl nitrocellulose, and 460g of ethyl butyl carbitol, put them into an oven at 125°C and bake for 10 minutes;

[0033] b. After fully mixing ethyl nitrocellulose and ethyl butyl carbitol, put them into the oven and bake them for 30 minutes, and stir them evenly with a glass rod to obtain a mixture 1;

[0034] c. Take out the glass powder and mix it with the mixture obtained in step b while stirring, and then stir it with a stirrer for 60 minutes to obtain a mixture II;

[0035] d. Ultrasonic oscillate for 90 minutes to fully mix the mixture 2. Put the mixture 2 into a special bottle and roll it in a powder roller for more than 60 minutes before use.

[0036] Preferably, in step (14), the nickel solution is citric acid: gold chloride: nickel chloride: sodium hyponitrite: water = 2.6kg: 2kg: 1.2kg: 0.4kg: 20L;

[0037] Preferably, in step (15), glass passivation is performed in the "+"-shaped groove, and then the laser is used to make grooves at the position of the glass passivation; the cutting speed of the ultraviolet laser dicing machine is 200-300 mm / s, the power is 2-5 W, and the cutting speed of the infrared dicing machine is 200-400 mm / s, the power is 1-3 W.

[0038] Preferably, in step (16), the preparation method of the silver plating solution is:

[0039] Put 900g of disodium EDTA and 225g of imidazole into a bucket, add 12 liters of water, then add 750mL of ammonia water, stir to dissolve; pour 45g of silver nitrate into a 5L beaker, add 3L of water and stir to dissolve to obtain a silver nitrate solution; pour the silver nitrate solution into the bucket while stirring, pour in 120ml of formaldehyde while stirring, stir evenly and use.

[0040] Anything not described or limited in the above technical solution shall be carried out with reference to the prior art.

[0041] The beneficial effects of the present invention are:

[0042] The method for manufacturing a voltage-stabilizing diode chip of the present invention uses a nickel and silver plating method for metal, which increases the adhesion between metal layers, is not easy to fall off, and improves solderability and uniformity. The method of diffusion silicon wafer is adopted, and only one photolithography is used, which greatly reduces the cost. In addition, the glass powder configuration method adopted by the present invention is used for glass passivation. The glass powder of this formula is easier to melt quickly after being subjected to high temperature, avoiding uneven melting and causing inconsistent thickness, resulting in cracks in the glass layer, improving the uniformity of glass passivation, and better protecting the PN junction while increasing the PN junction area, avoiding leakage defect rate, and improving the working current. The present invention adopts the method of slotting the glass with grooves removed by front ultraviolet laser and slotting by back infrared, and then splitting, which greatly reduces the loss in the cutting process and the damage to the glass passivation layer, and effectively improves the product output rate and yield. DETAILED DESCRIPTION

[0043] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of the present invention are clearly and completely described, but not limited to this. Anything not fully described in the present invention shall be based on conventional techniques in the art.

[0044] Example 1

[0045] A method for manufacturing a voltage regulator diode chip comprises the following steps:

[0046] (1) Clean the impurities on the surface of the silicon wafer, clean the silicon wafer twice and then dry it; the two cleanings are respectively carried out using 1# and 2# solutions, 1# and 2# solutions are heated to 75±5°C, the wafer is immersed for 8 minutes, and the overflow is flushed for 8 minutes;

[0047] The volume ratio in solution #1 is: hydrogen peroxide (hydrogen peroxide): ammonia water: deionized water = 1:1:6; the volume ratio in solution #2 is: hydrogen peroxide (hydrogen peroxide): hydrochloric acid: deionized water = 1:1:6.

[0048] (2) High temperature oxidation, the oxidation furnace temperature is 600°C, wet oxygen is passed at 2L / min, the time is 8h; dry oxygen is passed at 2L / min, the time is 1h, and a layer of SiO2 film is formed on the surface of the silicon wafer. The thickness of the SiO2 film is 8000-10000 angstroms;

[0049] (3) single-sided photoresist removal, single-sided oxide layer removal (step 2), photoresist removal, and cleaning;

[0050] (4) N-type doped phosphorus source diffusion: The wafer and phosphorus paper (P95A) are placed alternately on the left and right sides, arranged and pressed in sequence, and placed flat on a silicon carbide flat boat. The source is pushed into a diffusion furnace for source diffusion at a diffusion temperature of 1200°C for 30 hours.

[0051] (5) Wafer segmentation after diffusion: Corrosion with hydrofluoric acid solution for 12-48 hours to dissolve the borosilicate glass or phosphosilicate glass formed at high temperature, separate the wafers, eliminate glass crystals on the wafer surface, and make the silicon wafer surface clean and free of foreign matter;

[0052] (6) Oxide layer cleaning: Soak the wafer in an oxide layer etching solution, hydrofluoric acid: ammonium fluoride: water = 1:2:3, and observe under a microscope to see if the oxide layer inside the photolithography line is completely removed;

[0053] (7) High-pressure sandblasting (0.4-0.6MPa) to adjust the thickness of silicon wafers. High-pressure diamond sand is used to bombard the wafer surface to adjust the thickness. Sandblasting removes 3-15um and removes foreign matter such as oxide layer and surface particles on the wafer surface.

[0054] (8) Diffusion of P-type doped boron source: The phosphorus side of the wafer is facing the phosphorus side, and a piece of boron paper (B20) is sandwiched between the empty side (the side where the N-type doped phosphorus source is diffused is called the phosphorus side, and the other side is called the empty side). They are arranged left and right and pressed tightly, and then laid flat on a silicon carbide flat boat, with a silicon blind wafer underneath and a 1 cm thick super-thick silicon pressing sheet pressed on the surface. The wafer is pushed into a diffusion furnace for source diffusion. The boron source diffusion temperature is 1100°C, and the diffusion time is 10 h.

[0055] (9) Wafer segmentation, double-sided sandblasting, and oxide layer cleaning;

[0056] (10) Performing a photolithography process to form a pattern that meets the process requirements on the wafer surface by exposure and development, thereby achieving local protection and achieving the purpose of localized processing;

[0057] (11) Grooving: Turn on the trenching machine (a trenching machine is a device commonly used in the art for etching with acid), place the wafer in a mixed acid tank, press the rocker key to start trenching the sub-line grooves on the side of the diffused phosphorus, and perform trenching in the X and Y directions (grooving is a process of etching with acid) to form a "+"-shaped groove to form a PN junction;

[0058] The mixed acid volume ratio of the mixed acid tank is nitric acid: hydrofluoric acid: glacial acetic acid = 5:3:1, the etching time is 6 minutes, the etching depth is 60 microns, and the groove width is 100 microns.

[0059] (12) Apply glass powder for glass passivation: Place the cleaned wafer with the grooved surface facing up on a suction cup, and suck the bottom of the wafer with the suction cup; use a powder-coating spoon to take 1 mL of glass powder on the grooved side of the wafer, and spread it evenly with a scraper. When scraping the powder, do not scrape along the grooves. Scrape the glass paste into the wafer grooves at an angle of 45 degrees along the arrangement angle of the chip. Load the wafer into a quartz boat and push it into a glass sintering furnace for glass passivation. The glass passivation thickness is 35 μm.

[0060] The preparation method of glass powder is:

[0061] a. Take 1000g of GP-230S glass powder, 6g of ethyl nitrocellulose, and 460g of ethyl butyl carbitol, put them into an oven at 125°C and bake for 10 minutes;

[0062] b. After fully mixing ethyl nitrocellulose and ethyl butyl carbitol, put them into the oven and bake them for 30 minutes, and stir them evenly with a glass rod to obtain a mixture 1;

[0063] c. Take out the glass powder and mix it with the mixture obtained in step b while stirring, and then stir it with a stirrer for 60 minutes to obtain a mixture II;

[0064] d. Ultrasonic oscillate for 90 minutes to fully mix the mixture 2. Put the mixture 2 into a special bottle and roll it in a powder roller for more than 60 minutes before use.

[0065] (13) Place the passivated wafers in a basket (a basket is a tool used in the art to load wafers) in turn, soak them in a 5:1 hydrofluoric acid solution for about 5 seconds, rinse them with overflow water for 4 minutes, and soak the wafers in an 11:1 mixed acid solution for 1 second, wherein the ratio of nitric acid to hydrofluoric acid to glacial acetic acid is 5:3:1. Take out the wafers and rinse them with overflow water for 4 minutes, then put them in a hot cleaning solution (hammer powder solution) for ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times; put them in pure water for overflow ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times;

[0066] (14) Pour 2000 ml of nickel solution and 4000 ml of hot deionized water at 50-70° into a nickel plating tank and heat to 95°C ± 5, then add 600 ml of ammonia water, test the pH value of the nickel solution with a pH test paper to find it is about 8.5, place the flower basket into the nickel plating tank for metal nickel plating, and shake the flower basket up and down continuously during the nickel plating process for 60 seconds, flush with overflow water for 5 minutes, spin dry at 100 rpm / s, and dry in an oven at 100°C / 30 minutes.

[0067] Nickel solution is citric acid: gold chloride: nickel chloride: sodium hyponitrite: water = 2.6kg: 2kg: 1.2kg: 0.4kg: 20L;

[0068] (15) Cutting the wafer, using an ultraviolet laser scriber to groove the glass passivation surface, using an infrared scriber to groove the back surface, and using a wafer splitter to split the wafer into individual chips;

[0069] Specifically, the glass is passivated in the "+"-shaped groove, and then the laser is used to groove the glass at the passivated position; the UV laser dicing machine has a dicing speed of 200mm / s, a power of 4W, a line width of 8um, and a grooving depth of 40um; the infrared dicing machine has a cutting speed of 200mm / s, a power of 3W, and a grooving depth of 45um. The line width is 20um, and it is split with the help of a chip splitter to divide it into chips.

[0070] (16) Silver plating of the tube core: According to the silver plating solution formula, a silver layer is plated on the electrode surface to increase the electrode thickness and improve the electrode solderability. The specific process is as follows:

[0071] A. Pour the core into a conical flask, add anhydrous ethanol, and ultrasonicate for 10 minutes at room temperature; B. Pour out the ethanol, rinse with pure water once, add nitric acid solution (1:10), shake for 3 minutes, and rinse with pure water 3 times; C. Add the silver plating solution into the conical flask, heat for 8 minutes (80℃) and shake continuously; D. Rinse with pure water 4 times, and dehydrate with anhydrous ethanol. E. Pour the core into a sieve and heat on a hot plate for 10 minutes (80℃).

[0072] Wherein, the preparation method of silver plating solution is:

[0073] Put 900g of disodium EDTA and 225g of imidazole into a bucket, add 12 liters of water, then add 750mL of ammonia water, stir to dissolve; pour 45g of silver nitrate into a 5L beaker, add 3L of water and stir to dissolve to obtain a silver nitrate solution; pour the silver nitrate solution into the bucket while stirring, pour in 120ml of formaldehyde while stirring, stir evenly and use.

[0074] The tube core after the above drying is the voltage regulator diode chip.

[0075] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for manufacturing a voltage regulator diode chip, characterized in that: The method comprises the following steps: (1) Cleaning impurities on the surface of the silicon wafer, cleaning the silicon wafer twice and then drying it; (2) High temperature oxidation to form a SiO2 film on the surface of the silicon wafer; (3) Single-sided photoresist removal, single-sided oxide layer removal, photoresist removal, and cleaning; (4) N-type doped phosphorus source diffusion: The wafer and phosphorus paper are placed alternately on the left and right, arranged and pressed in sequence, placed flat on a silicon carbide flat boat, and pushed into a diffusion furnace for source diffusion; (5) Wafer splitting after diffusion: Through the acid corrosion process, the borosilicate glass or phosphosilicate glass formed at high temperature is dissolved, the wafers are separated, the glass crystals on the wafer surface are eliminated, and the silicon wafer surface is clean and free of foreign matter; (6) Oxide layer cleaning: Soak the wafer in an oxide layer etching solution and observe under a microscope whether the oxide layer inside the photolithography line is clean; (7) High-pressure sandblasting to adjust the thickness of the silicon wafer and remove foreign matter such as the oxide layer and surface particles on the wafer surface; (8) P-type doped boron source diffusion: The phosphorus side of the wafer faces the phosphorus side, and a piece of boron paper is clamped on the empty side. They are arranged and pressed tightly on the left and right sides, and then placed flat on a silicon carbide flat boat. A silicon blind sheet is placed underneath, and a 1 cm thick silicon pressing sheet is pressed on the surface. The wafer is pushed into the diffusion furnace for source diffusion. (9) Wafer segmentation, double-sided sandblasting, and oxide layer cleaning; (10) Performing a photolithography process to form a pattern on the wafer surface by exposure and development, thereby realizing local protection and achieving the purpose of localized processing; (11) Grooving: Turn on the groover, place the wafer in the mixed acid tank, and press the rocker key to start making sub-line grooves on the side of the diffused phosphorus. Grooves are made in the X and Y directions to form "+"-shaped grooves to form PN junctions; (12) Apply glass powder for glass passivation: Place the cleaned wafer with the grooved surface facing upward on a suction cup, and the suction cup sucks the bottom of the wafer; use a powder-coating spoon to take 1 mL of glass powder on the grooved side of the wafer, and spread it evenly with a scraper. When scraping the powder, scrape the glass slurry into the wafer groove at an angle of 45 degrees along the arrangement angle of the chip. Load the wafer into a quartz boat and push it into a glass sintering furnace for glass passivation; (13) Place the passivated wafers in a basket, soak them in a 5:1 hydrofluoric acid solution for 5 seconds, rinse them with overflow water for 4 minutes, soak them in the mixed acid solution for 1 second, take them out and rinse them with overflow water for 4 minutes, put them in a hot cleaning solution for ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times; put them in pure water for overflow ultrasonic cleaning for 10-15 minutes, and shake the basket up and down for at least 10 times; (14) Pour 2000 ml of nickel solution and 4000 ml of hot deionized water at 50-70° into a nickel plating tank and heat to 95°C ± 5, then add ammonia water, test the pH value of the nickel solution with a pH test paper to find it is 8.5, place the flower basket into the nickel plating tank for metal nickel plating, and shake the flower basket up and down continuously during the nickel plating process for 60-120 seconds, flush with overflow water for 5-15 minutes, spin dry at 100-200 rpm / s, and dry in an oven at 100-200°C / 30-60 minutes; (15) Cutting the wafer, using an ultraviolet laser scriber to groove the glass passivation surface, using an infrared scriber to groove the back surface, and using a wafer splitter to split the wafer into individual chips; (16) Silver plating of the tube core: According to the formula of the silver plating solution, a silver layer is plated on the surface of the electrode to increase the electrode thickness and improve the electrode solderability.

2. The method for manufacturing a voltage zener diode chip according to claim 1, characterized in that: In step (1), the two cleanings are performed using 1# and 2# solutions respectively, wherein the volume ratio of 1# solution is: hydrogen peroxide: ammonia water: deionized water = 1:1:6; and the volume ratio of 2# solution is: hydrogen peroxide: hydrochloric acid: deionized water = 1:1:

6.

3. The method for manufacturing a voltage regulator diode chip according to claim 2, characterized in that: In step (2), the silicon dioxide growth conditions are: oxidation furnace temperature 600-800°C, wet oxygen flow 2-3L / min, time 8-10h; dry oxygen flow 2-3L / min, time 1-2h.

4. The method for manufacturing a voltage regulator diode chip according to claim 3, characterized in that: In step (4), the phosphorus source diffusion temperature is 1200-1300° C. and the time is 30-50 h; Preferably, in step (5), the solution used in the acid corrosion process is a hydrofluoric acid solution, and the immersion time is 12-48 hours.

5. The method for manufacturing a voltage regulator diode chip according to claim 4, characterized in that: In step (6), the volume ratio of the solution used to remove the oxide layer is hydrofluoric acid: ammonium fluoride: water = 1:2:3; In step (7), sandblasting removes 3-15 um.

6. The method for manufacturing a voltage regulator diode chip according to claim 5, characterized in that: In step (8), the boron source diffusion temperature is 1100-1300° C., and the diffusion time is 10-20 h.

7. The method for manufacturing a voltage regulator diode chip according to claim 6, characterized in that: In step (11), the mixed acid volume ratio of the mixed acid tank is nitric acid: hydrofluoric acid: glacial acetic acid = 5:3:1, the etching time is 6-15 minutes, the etching depth is 60-80 microns, and the groove width is 100-150 microns.

8. The method for manufacturing a voltage regulator diode chip according to claim 7, characterized in that: In step (12), the glass powder is prepared by: a. Take 1000g of GP-230S glass powder, 6g of ethyl nitrocellulose, and 460g of ethyl butyl carbitol, put them into an oven at 125°C and bake for 10 minutes; b. After fully mixing ethyl nitrocellulose and ethyl butyl carbitol, put them into the oven and bake them for 30 minutes, and stir them evenly with a glass rod to obtain a mixture 1; c. Take out the glass powder and mix it with the mixture obtained in step b while stirring, and then stir it with a stirrer for 60 minutes to obtain a mixture II; d. Ultrasonic oscillate for 90 minutes to fully mix the mixture 2. Put the mixture 2 into a special bottle and roll it in a powder roller for more than 60 minutes before use.

9. The method for manufacturing a voltage regulator diode chip according to claim 8, characterized in that: In step (14), the nickel solution is citric acid: gold chloride: nickel chloride: sodium hyponitrite: water = 2.6kg: 2kg: 1.2kg: 0.4kg: 20L; Preferably, in step (15), glass passivation is performed in the "+"-shaped groove, and then the laser is used to make grooves at the position of the glass passivation; the cutting speed of the ultraviolet laser dicing machine is 200-300 mm / s, the power is 2-5 W, and the cutting speed of the infrared dicing machine is 200-400 mm / s, the power is 1-3 W.

10. The method for manufacturing a voltage regulator diode chip according to claim 9, characterized in that: In step (16), the preparation method of the silver plating solution is: Put 900g of disodium EDTA and 225g of imidazole into a bucket, add 12 liters of water, then add 750mL of ammonia water, stir to dissolve; pour 45g of silver nitrate into a 5L beaker, add 3L of water and stir to dissolve to obtain a silver nitrate solution; pour the silver nitrate solution into the bucket while stirring, pour in 120ml of formaldehyde while stirring, stir evenly and use.