HgCdTe infrared chip and bottom filling method thereof
By tilting the infrared chip and using capillary effect to fill the glue, the problem of filling the voids at the bottom of the mercury cadmium telluride infrared chip was solved, achieving uniform stress distribution and good performance testing results.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-06
- Publication Date
- 2026-04-07
AI Technical Summary
During the bottom filling process of mercury cadmium telluride infrared chips, the existing placement method can easily lead to voids in the filler, resulting in uneven stress distribution on the chip and affecting subsequent performance testing.
By using an inclined placement method for the infrared chip, the capillary effect is utilized to allow the bottom filler to rise and fill the filler space, thus avoiding the formation of voids.
This effectively avoids voids in the filler, ensures uniform stress distribution on the chip, and improves the reliability of subsequent performance testing.
Smart Images
Figure CN121815780A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of cooled infrared detector technology, and in particular to a mercury cadmium telluride infrared chip and its bottom filling method. Background Technology
[0002] In recent years, the main technological routes adopted for the development of area-array HgCdTe infrared focal plane array devices have been CdZnTe-based, GaAs-based, and silicon-based HgCdTe focal plane array technologies. The array size has evolved from 320×256 to medium-to-large-scale 640×512, 1k×512, and 1k×1k focal plane array devices, as well as 2k×512 and 2k×2k focal plane array devices. Simultaneously, the pixel size of the area-array focal plane array has increased from 30μm, 25μm, and 18μm to 15μm.
[0003] For the current 320×256 (area array size) and 640×512 (pixel pitch 15μm) mercury cadmium telluride infrared chips, horizontal placement during bottom filling prevents the formation of large voids within the chip. However, for the 1280×1024 and 2048×2048 chips with pixel pitches of 30μm, 15μm, and 10μm respectively, horizontal placement during filling results in incomplete filling and voids due to edge effects. This uneven stress distribution negatively impacts subsequent performance testing.
[0004] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention
[0005] The purpose of this invention is to provide a mercury cadmium telluride infrared chip and its bottom filling method to solve the problem of voids in the adhesive filling.
[0006] To solve the above technical problems, the present invention provides a bottom filling method for a mercury cadmium telluride infrared chip, comprising: providing an infrared chip, the infrared chip having a readout circuit board and a photoelectric material layer, wherein the readout circuit board and the photoelectric material layer are interconnected by indium pillars, and a filler space is provided between the readout circuit board and the photoelectric material layer, wherein the area array size of the infrared chip is not less than 1280×1024;
[0007] The infrared chip is placed horizontally with the side containing the readout circuit board facing down;
[0008] Apply adhesive from one side of the infrared chip into the filling space;
[0009] After setting a predetermined amount of underfill adhesive, the infrared chip is rotated around the side where the adhesive is applied, tilting it at a predetermined angle to utilize capillary effect to allow the underfill adhesive to rise until it fills the adhesive space.
[0010] Preferably, the distance between the indium pillars is the pixel pitch, and the pixel pitch ranges from 10μm to 30μm.
[0011] Preferably, for infrared chips with the same area array, the smaller the pixel pitch, the smaller the numerical range of the predetermined angle; for infrared chips with the same pixel pitch, the larger the area array, the smaller the numerical range of the predetermined angle.
[0012] Preferably, the infrared chip has an array size of 1280×1024, a pixel pitch of 30μm, and a predetermined angle of 10°-80°.
[0013] Preferably, the infrared chip has an array size of 2048×2048, a pixel pitch of 30μm, and a predetermined angle of 30°-80°.
[0014] Preferably, the infrared chip has an array size of 1280×1024, a pixel pitch of 15μm, and a predetermined angle of 30°-80°.
[0015] Preferably, the infrared chip has an array size of 2048×2048, a pixel pitch of 15μm, and a predetermined angle of 40°-80°.
[0016] Preferably, the infrared chip has an array size of 1280×1024, a pixel pitch of 10μm, and a predetermined angle of 45°-80°.
[0017] Preferably, the infrared chip has an array size of 2048×2048, a pixel pitch of 10μm, and a predetermined angle of 55°-80°.
[0018] A mercury cadmium telluride infrared chip is fabricated using the bottom filling method for mercury cadmium telluride infrared chips described above.
[0019] In the bottom filling method of the mercury cadmium telluride infrared chip provided by the present invention, after the mercury cadmium telluride infrared chip is dispensed, it is tilted at a certain angle and the dispensed side is placed at the bottom and upside down. The capillary effect is used to make the glue flow upward until the gap is filled, avoiding the formation of glue voids and preventing uneven stress distribution of the chip from affecting subsequent performance testing.
[0020] The mercury cadmium telluride infrared chip provided by this invention and the bottom filling method of the mercury cadmium telluride infrared chip provided by this invention belong to the same inventive concept. Therefore, the mercury cadmium telluride infrared chip provided by this invention has at least all the advantages of the bottom filling method of the mercury cadmium telluride infrared chip provided by this invention, which will not be repeated here. Attached Figure Description
[0021] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:
[0022] Figure 1 This is a schematic diagram of existing technology for filling infrared chips with adhesive;
[0023] Figure 2 This is a schematic diagram illustrating the voids that appear when filling infrared chips using existing technology;
[0024] Figure 3 This is a schematic diagram of an infrared chip structure according to an embodiment of the present invention;
[0025] Figure 4 This is a schematic diagram of filling an infrared chip with adhesive according to an embodiment of the present invention;
[0026] Figure 5 This is a schematic diagram of the adhesive filling of a 1280×1024 infrared chip with a pixel pitch of 30μm according to an embodiment of the present invention;
[0027] Figure 6 This is a chart of experimental data from an embodiment of the present invention regarding the filling of a 1280×1024 infrared chip with a pixel pitch of 30μm with adhesive.
[0028] Figure 7 This is a schematic diagram of the adhesive filling of a 2048×2048 infrared chip with a pixel pitch of 30μm according to an embodiment of the present invention;
[0029] Figure 8 This is a chart of experimental data from an embodiment of the present invention regarding the application of adhesive to a 2048×2048 infrared chip with a pixel pitch of 30μm.
[0030] Figure 9 This is a schematic diagram of the adhesive filling of a 1280×1024 infrared chip with a pixel pitch of 15μm according to an embodiment of the present invention;
[0031] Figure 10 This is a chart of experimental data from an embodiment of the present invention regarding the application of adhesive to a 1280×1024 infrared chip with a pixel pitch of 15μm.
[0032] Figure 11 This is a schematic diagram of the adhesive filling of a 2048×2048 infrared chip with a pixel pitch of 15μm according to an embodiment of the present invention;
[0033] Figure 12 This is a chart of experimental data from an embodiment of the present invention regarding the application of adhesive to a 2048×2048 infrared chip with a pixel pitch of 15μm.
[0034] Figure 13 This is a schematic diagram of the adhesive filling of a 1280×1024 infrared chip with a pixel pitch of 10μm according to an embodiment of the present invention;
[0035] Figure 14 This is a chart of experimental data from an embodiment of the present invention regarding the application of adhesive to a 1280×1024 infrared chip with a pixel pitch of 10μm.
[0036] Figure 15 This is a schematic diagram of the adhesive filling of a 2048×2048 infrared chip with a pixel pitch of 10μm according to an embodiment of the present invention;
[0037] Figure 16 This is a chart of experimental data from an embodiment of the present invention regarding the filling of a 2048×2048 infrared chip with a pixel pitch of 10μm with adhesive.
[0038] Figure 17 This is a flowchart of an embodiment of the present invention for filling an infrared chip with adhesive.
[0039] In the attached image:
[0040] 100. Infrared chip.
[0041] 10. Substrate; 20. Optoelectronic material layer; 30. Passivation layer; 40. Metal electrode; 50. Readout circuit board; 60. Indium pillar. Detailed Implementation
[0042] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0043] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; the term “at least two” is generally used to mean “two or more”; furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," and "third" may explicitly or implicitly include one or at least two of those features. The term "proximal" typically refers to the end closer to the operator, and the term "distal" typically refers to the end closer to the patient. "One end" and "the other end," as well as "proximal" and "distal," generally refer to two corresponding parts, including not only endpoints. The terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can be fixed connections, detachable connections, or integral connections; they can be mechanical connections or electrical connections; they can be direct connections or indirect connections through an intermediate medium; they can be internal connections between two elements or interactions between two elements. Furthermore, as used in this invention, the placement of one element on another element generally only indicates a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of another element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0044] Research has found that when filling infrared chips with adhesive, the chip is typically placed horizontally, and the dispensing pen is placed on one side of the chip to apply the adhesive. The adhesive gradually flows and fills the gaps. Figure 1 As shown, when using the same filling method to fill a large-area infrared chip, voids are easily formed, affecting the stress distribution of the chip. Figure 2 As shown.
[0045] Based on this, the core idea of the present invention is to adjust the filling method of the infrared chip, and after dispensing, place the infrared chip at an appropriate angle, and use the capillary effect to make the bottom filling glue flow upward until it fills the gaps of the infrared chip, thus avoiding the occurrence of filling voids.
[0046] For details, please refer to Figures 3-17 This is a schematic diagram of an embodiment of the present invention. Figure 17 As shown, a method for bottom filling of a mercury cadmium telluride infrared chip includes:
[0047] Step 1, as follows Figure 3 As shown, an infrared chip 100 is provided, the infrared chip 100 having a readout circuit board 50 and a photoelectric material layer 20, and the readout circuit board 50 and the photoelectric material layer 20 are interconnected by indium pillars 60, and there is a filler space between the readout circuit board 50 and the photoelectric material layer 20, the area array size of the infrared chip 100 is not less than 1280×1024.
[0048] Step 2: Place the infrared chip 100 horizontally with the side of the readout circuit board 50 facing down.
[0049] Step 3: Apply adhesive from one side of the infrared chip 100 into the adhesive filling space.
[0050] Step four: After setting a predetermined amount of bottom filler, rotate the infrared chip 100 with the side of the glued part as the axis to tilt it at a predetermined angle, so as to use capillary effect to make the bottom filler rise until the glue filling space is filled.
[0051] like Figure 4 As shown, the infrared chip 100 and the readout circuit board 50 are inverted with one side facing down and placed horizontally. The amount of adhesive is controlled during the dispensing operation. Then, the dispensing side is tilted at a certain angle and placed at the bottom inverted position. The adhesive is used to flow upwards by utilizing the capillary effect until the gaps of the infrared chip 100 are filled, thereby avoiding the occurrence of adhesive voids.
[0052] In step one, the structure of the infrared chip 100 is as follows: Figure 3 As shown, substrate 10 is a CZT zinc cadmium telluride substrate, and a photoelectric material layer 20 is disposed on substrate 10. The material of photoelectric material layer 20 is, for example, MCT mercury cadmium telluride. A passivation layer 30 is encapsulated at the bottom of photoelectric material layer 20. The material of passivation layer 30 is, for example, ZnS. Metal electrodes 40 are also disposed on passivation layer 30. Metal electrodes 40 are also disposed on the surface of readout circuit board 50. Indium pillars 60 are disposed between metal electrodes 40 for connection. The area between readout circuit board 50 and photoelectric material layer 20 where indium pillars 60 are not disposed is the required filler space.
[0053] In step two, the readout circuit board 50 is inverted with its face down. In step three, adhesive is applied from one side of the infrared chip 100. After setting a predetermined amount of underfill adhesive, the adhesive-applied side is fixed, and the other side of the infrared chip 100 is lifted, so that the underfill adhesive, under the action of capillary effect, rises from the adhesive-applied side to the other side, thereby filling the entire filling space. Then, it is baked at high temperature for curing.
[0054] like Figure 3 As shown, the distance between the indium pillars 60 is the pixel pitch, i.e. Figure 3The pixel spacing in the L-marker ranges from 10μm to 30μm.
[0055] By selecting an appropriate inversion tilt angle, the filler void rate of large-area chips is significantly reduced. For infrared chips 100 with the same area array, the smaller the pixel pitch, the smaller the range of the predetermined angle; for infrared chips 100 with the same pixel pitch, the larger the area array, the smaller the range of the predetermined angle. Large-area 1280×1024 and 2048×2048 chips are inverted at a certain angle. For chips with the same pixel pitch, the larger the area array, the smaller the range of the inversion tilt angle; while for chips with the same area array, the smaller the pixel pitch, the smaller the range of the inversion tilt angle.
[0056] In one embodiment, the infrared chip 100 has an array size of 1280×1024, a pixel pitch of 30μm, and a predetermined angle of 10°-80°.
[0057] like Figure 6 As shown, when a 1280×1024 cadmium telluride infrared chip with a pixel pitch of 30μm is horizontally filled with adhesive, the bottom void ratio is nearly 20%. For example... Figure 5 and Figure 6 As shown, with the existing amount of adhesive, after horizontal dispensing, tilting the device at a 10° angle reduces the void rate to 5%; while increasing the tilt angle to 20° eliminates any voids in the adhesive filling. Based on the filling time and void rate, a tilt angle of 20° is preferred.
[0058] In one embodiment, the infrared chip 100 has an array size of 2048×2048, a pixel pitch of 30μm, and a predetermined angle of 30°-80°.
[0059] like Figure 8 As shown, when a 2048×2048 HCd infrared chip with a pixel pitch of 30μm is horizontally filled with adhesive, the bottom void ratio is as high as 40% or more. For example... Figure 7 and Figure 8 As shown, with the existing amount of adhesive, inverting the container at a 30° angle reduces the void ratio to 8%; while increasing the tilt angle to 45° results in slight voids in the adhesive filling. Based on the filling time and void ratio, a tilt angle of 45° is preferred.
[0060] In one embodiment, the infrared chip 100 has an array size of 1280×1024, a pixel pitch of 15μm, and a predetermined angle of 30°-80°.
[0061] like Figure 10 As shown, when a 1280×1024 cadmium telluride infrared chip with a pixel pitch of 15μm is horizontally filled with adhesive, the bottom void ratio is nearly 35%. For example... Figure 9 and Figure 10 As shown, with the existing amount of adhesive, inverting the container at a 30° angle reduces the void rate to 7%; while increasing the tilt angle to 45° eliminates any voids in the adhesive filling. Based on the filling time and void rate, a tilt angle of 45° is preferred.
[0062] In one embodiment, the infrared chip 100 has an array size of 2048×2048, a pixel pitch of 15μm, and a predetermined angle of 40°-80°.
[0063] like Figure 12 As shown, when a 2048×2048 HCd infrared chip with a pixel pitch of 15μm is horizontally filled with adhesive, the bottom void ratio reaches over 55%. For example... Figure 11 and Figure 12 As shown, with the existing amount of adhesive, inverting and tilting at 40° reduces the void rate to 8%; while increasing the tilt angle to 55° eliminates the void phenomenon. Based on the filling time and void rate, a tilt angle of 55° is preferred.
[0064] In one embodiment, the infrared chip 100 has an array size of 1280×1024, a pixel pitch of 10μm, and a predetermined angle of 45°-80°.
[0065] like Figure 14 As shown, when a 1280×1024 cadmium telluride infrared chip with a pixel pitch of 10μm is horizontally filled with adhesive, the bottom void ratio is nearly 50%. For example... Figure 13 and Figure 14 As shown, with the existing amount of adhesive, inverting the container at a 45° angle reduces the void rate to 8%; while increasing the tilt angle to 60° results in fewer voids in the adhesive filling. Based on the filling time and void rate, a tilt angle of 60° is preferred.
[0066] In one embodiment, the infrared chip 100 has an array size of 2048×2048, a pixel pitch of 10μm, and a predetermined angle of 55°-80°.
[0067] like Figure 16 As shown, when a 2048×2048 HCd infrared chip with a pixel pitch of 10μm is horizontally filled with adhesive, the bottom void ratio is as high as 65% or more. For example... Figure 15 and Figure 16 As shown, with the existing amount of adhesive, inverting the container at a 55° angle reduces the void rate to 10%; while increasing the tilt angle to 70° results in almost no voids in the adhesive filling. Based on the filling time and void rate, a tilt angle of 70° is preferred.
[0068] Based on the same technical concept, the present invention also provides a mercury cadmium telluride infrared chip, which is manufactured using the bottom filling method of the mercury cadmium telluride infrared chip described above.
[0069] The above-described filling method can be used in the fabrication of cooled infrared chips. The mercury cadmium telluride infrared chip 100 is a large-area array chip with dimensions of 1280×1024 and 2048×2048. It is inverted at a predetermined angle. By selecting a suitable inversion angle, the void ratio in the filler of the large-area array chip is significantly reduced. For chips with the same pixel pitch, the larger the array size, the smaller the range of inversion angles; conversely, for chips with the same array size, the smaller the pixel pitch, the smaller the range of inversion angles.
[0070] For the 1280×1024 infrared chip 100: pixel pitch 30μm, tilt angle 10°-80°; pixel pitch 15μm, tilt angle 30°-80°; pixel pitch 10μm, tilt angle 45°-80°. For the 2048×2048 infrared chip 100: pixel pitch 30μm, tilt angle 30°-80°; pixel pitch 15μm, tilt angle 40°-80°; pixel pitch 10μm, tilt angle 55°-80°. By adjusting the filling method of the infrared chip 100, after dispensing, the infrared chip 100 is placed at an appropriate tilt, utilizing capillary effect to allow the underfill adhesive to flow upwards until it fills the gaps of the infrared chip 100, avoiding the formation of filling voids.
[0071] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.
Claims
1. A method for bottom filling of a mercury cadmium telluride infrared chip, characterized in that, include: An infrared chip is provided, the infrared chip having a readout circuit board and a photoelectric material layer, wherein the readout circuit board and the photoelectric material layer are interconnected by indium pillars, and there is a filler space between the readout circuit board and the photoelectric material layer, and the area array size of the infrared chip is not less than 1280×1024; The infrared chip is placed horizontally with the side containing the readout circuit board facing down; Apply adhesive from one side of the infrared chip into the filling space; After setting a predetermined amount of underfill adhesive, the infrared chip is rotated around the side where the adhesive is applied, tilting it at a predetermined angle to utilize capillary effect to allow the underfill adhesive to rise until it fills the adhesive space.
2. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 1, characterized in that, The distance between the indium pillars is the pixel pitch, which ranges from 10μm to 30μm.
3. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, For infrared chips with the same area array, the smaller the pixel pitch, the smaller the numerical range of the predetermined angle; for infrared chips with the same pixel pitch, the larger the area array, the smaller the numerical range of the predetermined angle.
4. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 1280×1024, a pixel pitch of 30μm, and a predetermined angle of 10°-80°.
5. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 2048×2048, a pixel pitch of 30μm, and a predetermined angle of 30°-80°.
6. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 1280×1024, a pixel pitch of 15μm, and a predetermined angle of 30°-80°.
7. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 2048×2048, a pixel pitch of 15μm, and a predetermined angle of 40°-80°.
8. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 1280×1024, a pixel pitch of 10μm, and a predetermined angle of 45°-80°.
9. The bottom filling method for the mercury cadmium telluride infrared chip according to claim 2, characterized in that, The infrared chip has an array size of 2048×2048, a pixel pitch of 10μm, and a predetermined angle of 55°-80°.
10. A mercury cadmium telluride infrared chip, characterized in that, It is fabricated using the bottom filling method of the mercury cadmium telluride infrared chip as described in any one of claims 1-9 above.