Embedded circuit board

Abstract

The utility model provides an embedded circuit board, which comprises a circuit board and a chip with double-sided pins, the circuit board comprises a first surface and a second surface deviating from the first surface, the first surface of the circuit board is provided with a first circuit layer, the second surface of the circuit board is provided with a second circuit layer, and the outer surface of the chip is provided with an anti-oxidation layer. The chip is embedded in an insulating layer of the circuit board, a connecting layer is formed on the anti-oxidation layer at the position of a chip pin through sintering, a metalized blind hole is formed in the position, corresponding to the chip pin, of the circuit board, the blind hole is fixed with the chip pin through the connecting layer, and the first circuit layer and the second circuit layer are electrically connected with the chip pin through the blind hole respectively.

Description

Technical Field

[0001] The utility model relates to the field of circuit board manufacturing, in particular to an embedded circuit board. Background Art

[0002] Currently, in embedded chip circuit boards, the connection methods between the chip and the circuit board are mainly divided into two categories: pad connection and hole connection.

[0003] Pad connection is to mount the corresponding chip components on the pads on the surface of the circuit board by mounting. After the connection is formed, the components and circuit board patterns are filled and buried with insulating resin to form an embedded structure. For details, see the attached manual. Figure 1 However, this connection method cannot be applied to the embedding of double-sided pin chips, and it also has great limitations for embedding chips in circuit boards with a high number of layers.

[0004] Hole connection is to place and fix the chip in the placement groove of the circuit board, fill it with insulating resin to cover the entire chip and circuit board, and form an embedded structure. It is also necessary to process the hole and metallize the hole of the insulating medium so that the chip and the circuit board are connected to realize the interconnection function. For details, see the attached manual Figure 2 The hole connection process is combined with the layer increase to produce a chip embedded circuit board with a high number of layers.

[0005] During the chip manufacturing process, the surface of the chip will be treated with anti-oxidation treatment such as gold deposition. The gold and nickel on the surface metal layer affect the connection reliability between the surface and the blind hole, and seriously affect its interconnection function. In order to avoid the influence of the gold and nickel layers on the bonding force at the bottom of the blind hole, thereby improving the connection reliability between the chip pins and the blind hole, for embedded chips, the chip cannot be treated with gold plating, nickel plating or other surface treatments during chip manufacturing; however, such treatment will have a great impact on the anti-oxidation ability of the chip surface pins. Utility Model Content

[0006] Based on this, it is necessary to provide an embedded circuit board.

[0007] In order to solve the above technical problems, the utility model provides an embedded circuit board, comprising a circuit board and a chip with double-sided pins, the circuit board comprising a first surface and a second surface away from the first surface, the first surface of the circuit board is provided with a first circuit layer, the second surface of the circuit board is provided with a second circuit layer, the outer surface of the chip is provided with an anti-oxidation layer, the chip is buried inside the insulating layer of the circuit board, a connection layer is sintered on the anti-oxidation layer at the position of the chip pin, metallized blind holes are provided at the positions of the circuit board corresponding to the chip pins, the blind holes are fixed to the chip pins through the connection layer, and the first circuit layer and the second circuit layer are electrically connected to the chip pins through the blind holes respectively.

[0008] Preferably, the connection layer is a copper layer structure, and the connection layer is formed by pressing the copper foil and the anti-oxidation layer together by sintering.

[0009] Preferably, the anti-oxidation layer comprises a gold layer and a nickel layer, the nickel layer is arranged on the outer surface of the chip, and the gold layer is arranged on the outer surface of the nickel layer.

[0010] Preferably, the shape and size of the connection layer match the distribution position and number of the pins on the chip, and the thickness of the copper foil used in the connection layer is in the range of (10-50) μm.

[0011] Preferably, a first pin is provided on the front side of the chip, a second pin is provided on the back side of the chip, the blind holes include first blind holes distributed on the first surface and second blind holes distributed on the second surface, the first pin is connected to the first blind hole through a connecting layer, and the second pin is connected to the second blind hole through a connecting layer.

[0012] Preferably, the circuit board is a copper-clad plate or an adhesive sheet pressed from one or more materials selected from FR4, ABF, BT, PTFE, PPE, and PCH.

[0013] Preferably, an embedded groove is provided on the circuit board, the chip is located in the embedded groove, the embedded groove is a blind groove, and one end of the embedded groove passes through the first circuit layer; or, one end of the embedded groove passes through the second circuit layer, and insulating material is filled between the embedded groove and the chip.

[0014] Preferably, an embedded groove is provided on the circuit board, the chip is located in the embedded groove, the embedded groove is a through groove, the first end of the embedded groove passes through the first circuit layer, the second end of the embedded groove passes through the second circuit layer, a supporting film for carrying the chip is provided in the embedded groove, the chip is placed on the supporting film, the supporting film is made of insulating material, and insulating material is filled between the embedded groove and the chip.

[0015] The beneficial effects of the utility model are as follows: by covering a layer of metal copper on the gold layer on the surface of the chip as a blind hole receiving layer, the blind hole is directly punched on the metal copper surface, thereby improving the bonding force between the bottom of the blind hole and the surface of the chip, and increasing the connection reliability between the blind hole and the chip. This technology can be used on both sides of the embedded chip, thereby effectively improving the integration density of the chip embedded printed circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other purposes, features and advantages of the present invention will become more apparent through a more specific description of the preferred embodiments of the present invention shown in the accompanying drawings. The same reference numerals in all the accompanying drawings indicate the same parts, and the drawings are not intentionally scaled to the actual size, but the focus is on illustrating the subject matter of the present invention.

[0017] Figure 1 It is a schematic diagram of the cross-sectional structure of a circuit board embedded in a prior art pad connection method;

[0018] Figure 2 It is a schematic diagram of the cross-sectional structure of a buried circuit board in the hole connection method of the prior art;

[0019] Figure 3 It is a schematic diagram of the cross-sectional structure of the embedded circuit board of the preferred embodiment of the utility model;

[0020] In the figure: circuit board 1; chip 2; first surface 21; first circuit layer 210; second surface 22; second circuit layer 220; inner circuit layer 100; anti-oxidation layer 3; gold layer 31; nickel layer 32; connection layer 5; metallized blind hole 6; insulating material 7. DETAILED DESCRIPTION

[0021] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings.

[0022] It should be noted that when an element is considered to be "connected" to another element, it may be directly connected to another element and integrated therewith, or there may be an intermediate element at the same time. The terms "installed", "one end", "the other end" and similar expressions used herein are for illustrative purposes only.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art. The terms used in the specification herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0024] refer to Figure 3The utility model provides an embedded circuit board, comprising a circuit board 1 and a chip 2 with double-sided pins, the circuit board 1 comprising a first surface 21 and a second surface 22 away from the first surface, the first surface 21 of the circuit board 1 is provided with a first circuit layer 210, the second surface 22 of the circuit board 1 is provided with a second circuit layer 220, the outer surface of the chip is provided with an anti-oxidation layer 3, the chip 2 is buried in the insulating material 7 of the circuit board 1, a connection layer 5 is sintered on the anti-oxidation layer 3 at the position of the chip pin, a metalized blind hole 6 is provided at the position of the circuit board 1 corresponding to the chip pin, the blind hole 6 is fixed to the chip pin through the connection layer 5, and the first circuit layer 210 and the second circuit layer 220 are electrically connected to the chip pin through the blind hole 6 respectively.

[0025] By covering the gold layer on the surface of the chip 2 with a layer of metal copper as a blind hole receiving layer, the blind hole 6 is directly punched on the metal copper surface, which improves the bonding strength between the bottom of the blind hole 6 and the surface of the chip 2, and increases the connection reliability between the blind hole 6 and the chip 2. This technology can be used on both sides of the embedded chip 2, thereby effectively improving the integration density of the chip embedded printed circuit board.

[0026] In a preferred embodiment, the connection layer 5 is a copper layer structure, and the connection layer 5 is formed by pressing the copper foil and the anti-oxidation layer 3 together by sintering.

[0027] In a preferred embodiment, the anti-oxidation layer 3 includes a gold layer 31 and a nickel layer 32 . The nickel layer 32 is disposed on the outer surface of the chip 2 , and the gold layer 31 is disposed on the outer surface of the nickel layer 32 .

[0028] In a preferred embodiment, the shape and size of the connection layer 5 match the distribution position and number of the pins on the chip, and the thickness of the copper foil used in the connection layer 5 is in the range of (10-50) μm.

[0029] In a preferred embodiment, a first pin is provided on the front side of the chip 2, and the first pin is distributed on the first surface 21. A second pin is provided on the back side of the chip, and the second pin is distributed on the second surface 22. The blind hole includes a first blind hole distributed on the first surface 21 and a second blind hole distributed on the second surface 22. The first pin is connected to the first blind hole through a connecting layer 5, and the second pin is connected to the second blind hole through a connecting layer 5.

[0030] In a preferred embodiment, the material used for the circuit board 1 is a copper-clad plate or bonding sheet pressed from one or more materials including but not limited to FR4, ABF, BT, PTFE, PPE, and PCH. The circuit board includes an inner circuit layer 100 or other inner layer processes. The circuit board 1 has no specific number of layers, and its thickness must be greater than the thickness of the chip 2 to be embedded.

[0031] In a preferred embodiment, an embedded groove is provided on the circuit board 1, the chip is located in the embedded groove, the embedded groove is a blind groove, and one end of the embedded groove passes through the first circuit layer; or, one end of the embedded groove passes through the second circuit layer, and insulating material is filled between the embedded groove and the chip.

[0032] In a preferred embodiment, an embedded groove is provided on the circuit board, and the chip is located in the embedded groove. The embedded groove is a through groove, and the first end of the embedded groove passes through the first circuit layer, and the second end of the embedded groove passes through the second circuit layer. A supporting film for carrying the chip is provided in the embedded groove, and the chip is placed on the supporting film. The supporting film is made of insulating material, and insulating material is filled between the embedded groove and the chip.

[0033] The manufacturing process of the embedded circuit board of the utility model is briefly described as follows: a cavity for embedding the chip is processed on the circuit board, that is, a chip placement groove, which also serves as a limit for the chip; a special device is used to place the chip in the placement groove of the circuit board; a sintering process is used to sinter the copper layer on the upper and lower sides of the chip, and the copper layer is pressed onto the surface of the chip by adding solder paste for sintering; an insulating resin is used to fill the remaining cavity of the placement groove, and the chip is embedded and pressed, which serves as an insulating protection for the chip. At the same time, the insulating resin is also used as a layer-increasing material for multi-layer circuit boards; a laser is used to process blind holes on both sides of the circuit board with the embedded chip, and after the processed blind holes are metallized and filled with copper, the circuit layer on the outer surface of the circuit board is manufactured or the layer-increasing manufacturing is continuously performed. Then, the circuit board with the blind holes is subjected to the processes of outer layer circuit, ink, surface treatment, etc. in sequence to obtain a circuit board with embedded chips.

[0034] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0035] In the description of this specification, the description with reference to the terms "preferred embodiment", "further embodiment", "other embodiments" or "specific example" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0036] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A buried circuit board, characterized in that: The invention comprises a circuit board and a chip with double-sided pins, wherein the circuit board comprises a first surface and a second surface facing away from the first surface, the first surface of the circuit board is provided with a first circuit layer, the second surface of the circuit board is provided with a second circuit layer, the outer surface of the chip is provided with an anti-oxidation layer, the chip is buried in the insulating layer of the circuit board, a connection layer is sintered on the anti-oxidation layer at the position of the chip pin, metallized blind holes are provided at the position corresponding to the chip pin, the blind holes are fixed to the chip pin through the connection layer, and the first circuit layer and the second circuit layer are electrically connected to the chip pin through the blind holes respectively.

2. The embedded circuit board according to claim 1, characterized in that: The connection layer is a copper layer structure, and the connection layer is formed by pressing and bonding the copper foil and the anti-oxidation layer by sintering.

3. The embedded circuit board according to claim 2, characterized in that: The anti-oxidation layer comprises a gold layer and a nickel layer, wherein the nickel layer is arranged on the outer surface of the chip, and the gold layer is arranged on the outer surface of the nickel layer.

4. The embedded circuit board according to claim 2, characterized in that: The shape and size of the connection layer match the distribution position and quantity of the pins on the chip, and the thickness of the copper foil used in the connection layer has a value range of (10-50) μm.

5. The embedded circuit board according to claim 1, characterized in that: A first pin is arranged on the front side of the chip, a second pin is arranged on the back side of the chip, the blind holes include first blind holes distributed on the first surface and second blind holes distributed on the second surface, the first pin is connected to the first blind hole through a connecting layer, and the second pin is connected to the second blind hole through a connecting layer.

6. The embedded circuit board according to claim 5, characterized in that: The circuit board is a copper-clad plate or bonding sheet pressed from one or more materials selected from FR4, ABF, BT, PTFE, PPE, and PCH.

7. The embedded circuit board according to claim 1, characterized in that: The circuit board is provided with an embedded groove, the chip is located in the embedded groove, the embedded groove is a blind groove, one end of the embedded groove passes through the first circuit layer; or, one end of the embedded groove passes through the second circuit layer, and insulating material is filled between the embedded groove and the chip.

8. The embedded circuit board according to claim 1, characterized in that: The circuit board is provided with an embedded groove, the chip is located in the embedded groove, the embedded groove is a through groove, the first end of the embedded groove passes through the first circuit layer, the second end of the embedded groove passes through the second circuit layer, a supporting film for carrying the chip is provided in the embedded groove, the chip is placed on the supporting film, the supporting film is made of insulating material, and insulating material is filled between the embedded groove and the chip.

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