According to the manufacturing method of the power semiconductor device provided by the invention, the side wall is formed on the side wall of the shielding gate polycrystalline silicon layer, and theside wall is positioned above the trench on the outer side of the shield gate polycrystalline silicon layer, so the connecting holes can be directly formed in the shielding gate polycrystalline silicon layer, a mask plate for defining the area where the connecting holes are connected with the gate is omitted, procedures are reduced, the process cost is reduced, and contact between the connectingholes formed in the shielding gate polycrystalline silicon layer subsequently and the gate polycrystalline silicon layer is avoided. The side wall protects the second oxide layer, the subsequent formation of the source electrode is avoided, ions are implanted into the second oxide layer during N-type ion implantation at the upper part, the performance of the second oxide layer is prevented from being reduced, and N-type ions are prevented from scattering downwards through the thinned part of the second oxide layer to enter a P-type ion implantation region during N-type ion implantation, so that the influence of the N-type ions on a channel is avoided, the threshold voltage of the device is improved, and the electrical property of the power semiconductor device is improved.