Coder and method for coding rate-compatible low-density parity-check codes

A low-density parity and check code technology, which is applied in the direction of error detection coding, coding, and coding components that apply multiple parity bits, and can solve problems such as decoding failure and inability to guarantee the performance of LDPC codes

Inactive Publication Date: 2009-10-28
POTEVIO INFORMATION TECH +1
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Problems solved by technology

[0012] The current rate-compatible codes are all encoding and decoding operations at different rates through punching. This method cannot guarantee the performance of LDPC codes in a large code rate range.
This is because in the case of high bit rate, punching destroys most of the soft information required by the decoder, resulting in decoding failure

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  • Coder and method for coding rate-compatible low-density parity-check codes
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  • Coder and method for coding rate-compatible low-density parity-check codes

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Embodiment Construction

[0049] In order to make the purpose, technical means and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0050] The basic idea of ​​the present invention is: according to the target code rate, expand the mother code matrix into a basic extended matrix that meets the requirements of different target code rates according to the minimum ring length maximization criterion, so as to realize rate-compatible LDPC coding, thereby avoiding The resulting decoding performance is reduced.

[0051] The present invention provides a rate-compatible LDPC encoder, including: a basic extension matrix determination unit, a correction processing unit, an extension unit and a coding unit.

[0052] In the LDPC encoder described above, the LDPC encoding method of the present invention can be implemented. image 3 It is a flow chart of the encoding method of LDPC in the present invention. l...

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Abstract

The invention discloses a method for obtaining parity check matrix of rate-compatible low-density parity-check codes, comprising the following steps of: selecting a mother code matrix and determining the size of a basic extension matrix; dividing the basic extension matrix into six sub-matrixes (see the formula at right side); according to a minimum ring maximum principle, respectively determiningthe value of each sub-matrix; subsequently combining each sub-matrix to form the basic extension matrix; finally correcting the obtained basic extension matrix by using a current extension factor z and extending the corrected basic extension matrix by using a matrix P with the size of z*z, thus obtaining a parity check matrix; and using the parity check matrix to carry out the LDPC coding to thedata to be coded. When the method and the coder are applied,on one hand, the rate compatibility can be realized; on the other hand, as the minimum and maximum principle is adopted to determine the value of each sub-matrix in each basic extension matrix, the decoding performance can be improved compared to the LDPC codes realizing rate-compatibility by a punching way.

Description

technical field [0001] The present invention relates to low-density parity-check code (LDPC) encoding technology, in particular to a rate-compatible LDPC encoding method and encoder. Background technique [0002] Low-Density Parity-Check Codes (Low-Density Parity-Check Codes, LDPC) is a class of linear block codes, and its check matrix can be represented by a binary matrix, such as figure 1 As shown, each column has j 1s (that is, the column weight is j), each row has k 1s (that is, the row weight is k), and other elements are zero, where j≥3, k>j, and j and k are Smaller integer. The check matrix of LDPC can also be represented by a bidirectional graph, which is now generally called a Tanner graph. The Tanner graph corresponds directly to the binary check matrix. like figure 2 As shown, below the Tanner graph is the variable node (s 0 ,s 1 ,...,s 9 ), which can be considered as a bit in a codeword, or a column in a check matrix; the above is a check node (c 0 , c ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/00H03M13/11
Inventor 吴湛击傅婷婷王文博郑辰雷旭胡炜
Owner POTEVIO INFORMATION TECH
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