Semiconductor device and method of fabricating the same

Abstract

In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches havingprotruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.

Description

[0001] related application [0002] This application claims priority from Korean Patent Application No. 10-2008-0076031 filed on Aug. 4, 2008, the entire contents of which are incorporated herein by reference. technical field [0003] The present disclosure relates to semiconductor devices and, more particularly, to transistors in semiconductor devices, and methods of manufacturing the same. Background technique [0004] Recently, as semiconductor devices are highly integrated, design rules have been reduced. Reduced design rules often lead to limitations such as short-channel effects and junction leakage. Such limitations often degrade the refresh characteristics of semiconductor devices. Therefore, the typical approach goes further from the usual planar structure and introduces various transistor structures including recessed structure, fin structure and saddle fin structure. [0005] Manufacturing recessed transistors involves etching the active region to a certain dep...

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Problems solved by technology

This leads to another limitation, which is to increase the contact resistance

[0021] In addition, if the fin type active area A 1 The length of the upper surface W 3 increases, then the possibility of short circuits also increases during the subsequent process used to form the landing plug contact (LPC)

Therefore, there is an increase in the fin-type active area A 1 Length W 3 There are restrictions

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