Method and system for reading information of memory array cell

Abstract

The invention provides a method and a system for reading information of a memory array cell. Multiple continuous bit lines comprising bit lines of a cell to be read are simultaneously gated, a first reading voltage is applied to one bit line of the memory cell to be read, a second reading voltage which is higher than the first reading voltage is applied to the other bit line of the memory cell to be read, and a voltage equal to the second reading voltage is applied to multiple continuous bit lines adjacent to the bit line which is applied with the second reading voltage, so there is no potential difference between two ends of the multiple memory cells adjacent to the bit line applied with the higher reading voltage, thereby a current leakage problem caused by adjacent memory cells is avoided, and the memory information reading precision of the memory cell is improved.

Description

technical field [0001] The invention relates to the field of information storage, in particular to a storage array unit information reading method and system. Background technique [0002] The core of the entire memory is an array of storage cells. For the method of reading the information of the storage cells in the array, refer to figure 1 , the storage unit takes an ordinary MOS transistor as an example, each storage unit (cell) has three ports, one of which is a control port, which is equivalent to the gate of an ordinary MOS transistor, and the other two ports are equivalent to the source and drain of an ordinary MOS transistor pole. The control ports of the memory cells are connected to the word line, and the control ports of the memory cells in the same row of the array are connected to the same word line WL1. The sources and drains of memory cells in the same row in the memory array are connected end to end in sequence, and the sources and drains of two adjacent me...

AI Technical Summary

Problems solved by technology

[0005] The invention solves the problem that the accuracy of the existing storage array unit information reading method is not high

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