Operation method of FFT (Fast Fourier Transformation) processor

An operation method and processor technology, applied in complex mathematical operations and other directions, can solve the problems of difficult development of floating-point operations, long research and development cycle, and high research and development costs, and achieve the effects of improving the efficiency of floating-point operations, reducing costs, and resolving conflicts.

Active Publication Date: 2015-06-03
南京晶达微电子科技有限公司
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  • Abstract
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  • Application Information

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Problems solved by technology

Therefore, compared with fixed-point calculations, floating-point calculations have disadvantages such as difficult development, long development cycle, an

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  • Operation method of FFT (Fast Fourier Transformation) processor
  • Operation method of FFT (Fast Fourier Transformation) processor
  • Operation method of FFT (Fast Fourier Transformation) processor

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Embodiment Construction

[0015] The following and accompanying appendices illustrating the principles of the invention Figure 1 A detailed description of one or more embodiments of the invention is provided together. The invention is described in connection with such embodiments, but the invention is not limited to any embodiment. The scope of the invention is limited only by the claims and the invention encompasses numerous alternatives, modifications and equivalents. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. These details are provided for the purpose of example and the invention may be practiced according to the claims without some or all of these specific details.

[0016] One aspect of the present invention provides an operation method of an FFT processor. figure 1 is a flowchart of an operation method of an FFT processor according to an embodiment of the present invention.

[0017] FFT is to de...

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Abstract

The invention provides an operation method of an FFT (Fast Fourier Transformation) processor. The method comprises the following steps: setting multiple stages of butterfly operation in an FPGA (Field Programmable Gate Array) program, wherein all the stages share a block floating point shifting factor; performing judgment through data according to the judgment state of the previous block floating point factor before each stage of operation to decide a shifting choice during the output of a data memory; controlling a gain which is output finally through the shifting sum of all the stages. The invention provides a floating point operation method, the contradiction between a fixed point algorithm and a floating point algorithm is solved, the floating point operation efficiency is improved, and the cost is reduced.

Description

technical field [0001] The invention relates to a programmable processor, in particular to an operation method of an FFT processor. Background technique [0002] In communication and radar signal processing, FFT is a commonly used tool, and it is mostly completed by FPGA when the speed requirement is relatively high or the integration degree is high. The vast majority of processors use fixed-point data format to process data, which makes the processing structure relatively simple, but the overflow phenomenon is more serious, and the use of simple fixed-point truncation will submerge small signals in large signals, making the result data Lose the necessary precision. As the requirements for data precision are getting higher and higher, the general fixed-point algorithm can no longer meet the high-precision requirements, and it is necessary to resort to floating-point processors for calculations to avoid overflow problems in applications. Most foreign FFT Cores use fixed-poi...

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Application Information

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IPC IPC(8): G06F17/14
Inventor 黄建喜刘宇波
Owner 南京晶达微电子科技有限公司
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