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A mask plate, an array substrate, a display panel, and a display device

A technology of array substrates and masks, applied in energy conversion devices, instruments, diodes, etc.

Active Publication Date: 2019-04-26
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Embodiments of the present invention provide a mask plate, an array substrate, a display panel, and a display device, which can improve the short-circuit problem between the common electrode and the gate line or pixel electrode in the prior art, and improve the short-circuit problem between the common electrode and the gate line at the same time It can also solve the problem of capacitive coupling between the common electrode and the gate line

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  • A mask plate, an array substrate, a display panel, and a display device
  • A mask plate, an array substrate, a display panel, and a display device
  • A mask plate, an array substrate, a display panel, and a display device

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Embodiment Construction

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0038] An embodiment of the present invention provides an array substrate, such as Figure 4 , Figure 5 , and shown in Fig. 6 (a) and Fig. 6 (b), comprise the gate line 40 that is arranged on the substrate 70, common electrode line 30, and common electrode 10 and pixel electrode 20, common electrode 10 passes common electrode via hole 50 is electrically connected to the common electrode line 30 .

[0039] Wherein, the common electrode 10 includes a hollowed-...

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Abstract

Embodiments of the present invention provide a mask plate, an array substrate, a display panel and a display device, which relate to the field of display technology and can improve the problem of short circuit between common electrodes and gate lines or pixel electrodes in the prior art. The array substrate includes gate lines, common electrode lines, and common electrodes and pixel electrodes arranged on the substrate, and the common electrodes are electrically connected to the common electrode lines through the common electrode via holes; the common electrodes are in the area corresponding to the common electrode via holes It includes a hollowed out part and a reserved part; the reserved part is located between the gate line close to the common electrode line and the pixel electrode close to the common electrode line, and is electrically connected to the common electrode line through the common electrode via hole; wherein, the reserved part is connected to the gate line and the pixel electrode close to the common electrode line. The pixel electrode has no overlap; the hollowed out part is located at least on the side of the reserved part close to the gate line and between the reserved part and the gate line, and / or the hollowed out part is located at least on the side of the reserved part close to the pixel electrode And it is located between the reserved part and the pixel electrode.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a mask plate, an array substrate, a display panel and a display device. Background technique [0002] With the development of liquid crystal display technology, Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) is widely used in various fields. [0003] The existing thin film transistor liquid crystal display includes an array substrate, a liquid crystal layer and a cell substrate. As shown in Figure 1(a) and Figure 1(b), the structure of an array substrate is that the common electrode 10 is arranged on the array substrate, and the common electrode via hole is formed by etching the gate insulating layer 601 and the passivation layer 602 50 to electrically connect the common electrode 10 to the common electrode line 30 . [0004] However, in the manufacturing process of the actual array substrate, due to objective reasons such as equipment and technology, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1343G02F1/1362
CPCG02F1/134309G02F1/136213G02F1/136227G02F2201/121G02F2201/123H01L27/124H01L27/1288H01L27/142
Inventor 张磊李嘉鹏张静陈磊孙东江
Owner BOE TECH GRP CO LTD