Bidirectional conversion circuit of floating point data format based on IEEE 754 and POSIT
A floating-point data, two-way conversion technology, applied in code conversion, electrical components, etc., can solve the problem that floating-point conversion circuits cannot achieve mutual conversion, etc.
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Embodiment 1
[0050] Such as image 3 As shown, the present invention provides a kind of bidirectional conversion circuit based on the floating-point data format of IEEE 754 and POSIT, including data input unit 101, IEEE 754 format field extraction unit 102, Posit format field extraction unit 103, special field detection unit 104, Mantissa reprocessing unit 105, exponent calculation unit 106, IEEE 754 order code reconstruction unit 107, Posit exponent reconstruction unit 108, regime value calculation unit 109, Posit format encoding unit 110, IEEE 754 format encoding unit 111, result encoding output unit 112; of which:
[0051] Described data input unit 101 is used for inputting the first floating-point number, and described first floating-point number is Posit data format or IEEE754 data format;
[0052] The IEEE 754 format field extracting unit 102 is used to extract the different fields of the first floating-point number in the IEEE 754 format of the input, so as to be used in the subseq...
Embodiment 2
[0103] More specifically, such as Figure 6 As shown, a schematic diagram of the circuit structure for converting from the IEEE 754 data format to the Posit data format in this embodiment is given. The circuit structure includes a data input unit 101, an IEEE754 format field extraction unit 102, a special field detection unit 104, a mantissa reprocessing unit 105, an index calculation unit 106, a Posit index reconstruction unit 108, a regime value calculation unit 109, and a Posit format An encoding unit 110 and a result encoding output unit 112 .
[0104] The first floating-point number of the IEEE 754 format to be format converted is input by the data input unit 101, and the first floating-point number of the input is sent to the IEEE 754 format field extraction unit 102, assuming that the bit width of the first floating-point number is N here , the width of the exponent field to which it corresponds is ew, the width of the mantissa field is fw, and the first floating-point...
Embodiment 3
[0121] On the basis of the above examples, if Figure 4 As shown, a schematic diagram of the circuit structure for converting from the Posit data format to the IEEE754 data format in this embodiment is given. In addition to the data input unit 101, special field detection unit 104, and result encoding output unit 112 of the above-mentioned embodiment, this embodiment also includes a Posit format field extraction unit 103, an IEEE754 order code reconstruction unit 107, and an IEEE 754 format encoding unit 111.
[0122] The input of data input unit 101 becomes that the bit width to be converted is N, and the exponent width is the first floating-point number IN of the Posit data format of ES, and the purpose floating-point number format is IEEE 754, and the exponent field (order code) width is ew, mantissa The field width is fw.
[0123]The Posit format field extraction unit 103 includes a splicing device, an XOR circuit, an LOD circuit, a shift device, an adder, and the like. ...
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