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Composition and operation method for multi-system and decimal operation of quantization logic

A computing method and multi-system technology, applied in the computer field, can solve problems such as slow development

Pending Publication Date: 2021-05-28
胡五生
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware to support multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , multiplication, division arithmetic operations and the key circuits of logic operations, which are called "quantization logic" and their circuits

Method used

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  • Composition and operation method for multi-system and decimal operation of quantization logic
  • Composition and operation method for multi-system and decimal operation of quantization logic
  • Composition and operation method for multi-system and decimal operation of quantization logic

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Embodiment Construction

[0179] refer to image 3 , the composition and operation method of the addition operation of the quantization logic are composed of the following parts, and the specific circuit required to realize the addition operation method is composed of the quantization register Quantizer Quantization converter ⑩, full AND logic circuit Fractal operation addition circuit carry operation addition circuit Amplitude Quantizer weight register Composition; the input analog information is quantized by the register Synchronized by the time manager, and then by the quantizer Quantize into multi-ary space information, and the multi-ary space information is input to the full AND logic circuit through the quantization converter ⑩ as needed to perform complement operations all AND logic circuit The output of the fractal circuit simultaneously into the adder Arithmetic circuit, for some arithmetic units that need carry, it can be connected to a carry addition operator The res...

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Abstract

An information processing operation method is composed of the following steps that obtained natural simulation information is quantized into various spatial information with different carry systems through a quantizer, the spatial information with the carry systems is input into a distributed arithmetic unit, and new spatial information obtained after operation of the distributed arithmetic unit is converted into spatial information with different carry systems. Amplitude weight quantization is performed by another amplitude weight quantizer, and the amplitude weight is converted into analog information and outputted.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to the realization of one of the basic hardware of a multi-valued computer "composition and operation method of multi-ary and decimal operations of quantization logic" [0002] technical background [0003] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware supporting multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , Multiplication, division arithmetic operations and key circuits of logi...

Claims

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Application Information

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IPC IPC(8): G06F7/38
CPCG06F7/38
Inventor 胡五生
Owner 胡五生
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