31 results about "Distributed arithmetic" patented technology

A distributed arithmetic system applied to a video monitoring platform comprises a command module (Headquarter), and a plurality of agent modules connected with the command module. The command module is used to cut the video data received by the video monitoring platform into a plurality of video units, and send the plurality of video units to the agent modules respectively, so that the agent modules can carry out video identification and analysis on the received video units; after the agent modules identifies and analyzes the video, the identification and analysis results are transmitted back to the command module, so that the command module can carry out integration.

A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gbps dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45% dynamic power reduction over conventional finite impulse response (FIR) equalizers by utilizing the minimum required resolution for the equalization of each dispersed symbol.

Disclosed herein is a reconfigurable mixed signal distributed arithmetic system including: an array of tunable voltage references operable for receiving a delayed digital input signal; a combination device in electrical communication with the array of tunable floating-gate voltage references that selectively combines an output of the array of tunable voltage references into an analog output signal; and a feedback element in electrical communication with the combination device, wherein the array of tunable voltages and the delayed digital input signal combine to perform a distributed arithmetic function and the reconfigurable mixed signal distributed arithmetic system responsively generates the analog output signal.

Disclosed herein is a reconfigurable mixed signal distributed arithmetic system including: an array of tunable voltage references operable for receiving a delayed digital input signal; a combination device in electrical communication with the array of tunable floating-gate voltage references that selectively combines an output of the array of tunable voltage references into an analog output signal; and a feedback element in electrical communication with the combination device, wherein the array of tunable voltages and the delayed digital input signal combine to perform a distributed arithmetic function and the reconfigurable mixed signal distributed arithmetic system responsively generates the analog output signal.

The invention discloses a shared method of native cache file based on mobile intelligence network. First builds a user alliance pattern based on gunz file shared network through cooperative game model, the user alliance pattern shares allied gather for muti-user file for user; formulates a best file cache strategy and a file shared strategy fora specific user alliance by adopting the user alliance pattern; user downloads from base station corresponding proportional file to local mobile device by the file cache strategy and the file shared strategy. The shared method main forms the shared user alliance of file based on the intelligence network, reduces transmission delay through a local connectivity; a distributed arithmetic of the user alliance pattern is achieved and has unit reasonability, Dhp stability and agreement stability; introduces concept of file popularity index, confirms the best cache strategy through minimized total transmission delay of the user alliance, the mobile network transmission delay can be reduced.

The present invention relates to the field of computer technology, specifically a distributed computer management system, including a collaborative management server, a router, multiple VPN devices, multiple server computing resource clusters, multiple distributed computing resource clusters, and multiple supercomputers Central computing resource cluster; the collaborative management server, router, multiple VPN devices, multiple server computing resource clusters, multiple distributed computing resource clusters, and multiple supercomputer central computing resource clusters are all connected through network interfaces; The setting of screw rod, micro motor, polishing rod and cleaning roller can successfully complete the cleaning of the screen, avoiding the situation that the screen is not able to guarantee the smooth use of the screen due to dust adhered to the screen, and at the same time, it also enables smooth retrieval and improves the efficiency of retrieval.

The invention discloses a hidden Markov related source coding method based on distributed arithmetic coding. The hidden Markov related source coding method includes the following steps of generating sources, coding the Markov related sources, and decoding the Markov related sources by utilizing a forward algorithm. According to the hidden Markov related source coding method, the sources related to memory are compressed through a DAC. In the concrete realization process, the dependency among the sources is modeled to be one hidden Markov process. Experimental results show that execution results of the new scheme are close to the Slepian-Wolf theory bound, and the problems that ambiguous code words can exist on decoding ends and an SWC is asymmetrical after areas are overlapped in the existing SWC technology based on entropy coding are well solved. According to the hidden Markov related source coding method, the existing technology is well utilized, experimental results are good, and good application value is possessed.

The invention discloses a distributed arithmetic code decoding method based on depth-first, and the method comprises the following contents: a data structure and a global variable; depth-first decoding summary; single-path searching; decoder behaviors at a fork node; compression end node pause path list; online memory releasing; optimal pause path selection; and ending conditions. According to the invention, compared with the conventional breadth-first decoding, the depth-first decoding is better in short code execution.

The invention relates to a DA-RNS (distributed arithmetic-residue number system) algorithm based FIR (finite impulse response) filter realizing method. The DA-RNS algorithm based FIR filter realizing method includes steps of firstly, subjecting filter input and filter coefficient to conversion from decimal weighting system to remainder non-weighting system by means of step-by-step table lookup; secondly, decomposing filter input into a single-byte mode; thirdly, subjecting the filter input and the filter coefficient to single-byte convolution operation; fourthly, scaling the filter input after remainder of the filter input is subjected to convolution operation under the remainder non-weighting system; and fifthly, restoring the remainder to decimal system by means of China remainder theorem. Compared with the prior art, the DA-RNS algorithm based FIR filter realizing method has the advantages of low resource consumption, high throughput and the like.

A vehicle diagnostic system is provided. The system includes: a first control module that includes a first processor and that controls a first vehicle subsystem; and second control module that controls a second vehicle subsystem and that validates the functionality of the first processor of the first control module wherein if the second control module determines that the first processor of the first control module is faulty, the second control module shuts down the first control module.

The invention discloses a determination method of a QOS (quality of service) route longevity path of a wireless sensor network in water environment. The determination method comprises the following steps of: firstly, carrying out a network split on an information acquisition region, enabling a Sink node to broadcast all the information after split, and enabling each node to know the taken framework and position; then, carrying out distributed arithmetic on each framework, seeking one or more than one shortest framework path from each framework to the Sink node, and enabling only can two adjacent frameworks transmit data, so as to ensure that the network transmission energy consumption is least when the network is in normal operation; and finally, seeking a suitable path based on an entropy idea, utilizing the entropy to carry out auto patching on the path after operation for a certain time, namely, achieving the self-healing of the structure of the whole network route after the node is vitiate. Compared with algorithms such as Long-term, DBR, DTN(delay / disruption tolerant network), the QOS route algorithm has better properties on the aspects of route reconstruction times, route success rate, network energy consumption and network delay.

Provided herein is an implementation of a finite impulse response (FIR) filter that uses a distributed arithmetic architecture. In one or more example, a data sample with multiple bits is processed through a plurality of bit-level multiply and accumulate circuits, wherein each bit of the data sample corresponds to a bit of the data sample. The output of each bit-level multiply and accumulate circuit can then be shifted by an appropriate amount based on the bit placement of the bit of the data sample that corresponds to the bit-level multiply and accumulate circuit. After each output is shifted by the appropriate amount, the outputs can be aggregated to form a final FIR filter result.

Provided herein is an implementation of a finite impulse response (FIR) filter that uses a distributed arithmetic architecture. In one or more example, a data sample with multiple bits is processed through a plurality of bit-level multiply and accumulate circuits, wherein each bit of the data sample corresponds to a bit of the data sample. The output of each bit-level multiply and accumulate circuit can then be shifted by an appropriate amount based on the bit placement of the bit of the data sample that corresponds to the bit-level multiply and accumulate circuit. After each output is shifted by the appropriate amount, the outputs can be aggregated to form a final FIR filter result.

A distributed arithmetic feed forward equalizer (DAFFE) and method. The DAFFE includes look-up tables (LUTs) in offset binary format. A DA LUT stores sum of partial products values and an adjustment LUT stores adjustment values. DA LUT addresses are formed from same-position bits from all but the most significant bits (MSBs) of a set of digital words of taps and an adjustment LUT address is formed using the MSBs. Sum of partial products values and an adjustment value are acquired from the DA LUT and the adjustment LUT using the DA LUT addresses and the adjustment LUT address, respectively. Reduced complexity downstream adder(s) (which result in reduced power consumption) compute a total sum of the sum of partial products values and the adjustment value (which compensates for using the offset binary format and dropping of the MSBs when forming the DA LUT addresses) to correctly solve a DA equation.

The invention discloses a distributed computing unloading method based on a variable bandwidth channel. In a distributed wireless network, a terminal with a large computing requirement can unload part of data to peripheral terminals for processing, thereby completing data processing within a given time limit tasks, the terminal has differentiated offloading requirements, and can use different amounts of spectrum resources as needed. In addition, the terminal can overlap and use some spectrum resources according to the network topology and other conditions. Through the optimal response learning algorithm, the distributed decision-making method realizes the full Network energy consumption is minimized. The present invention can better adapt differentiated unloading requirements to limited spectrum resources, and the utilization rate of spectrum resources is higher, and terminals can share spectrum resources, the frequency usage mode is more flexible, and communication performance can be improved.