47 results about "Global variable" patented technology

A method, performed by at least one processor of a computing device, for automatically transferring information from one screen to another, includes: outputting a first screen of a first application opened on a platform; outputting a second screen of a second application opened on the platform, while the first screen is output; determining whether a global variable is included for a user input field of the second screen; based on determining that the global variable is included for the user input field of the second screen, obtaining a value of the global variable from the first screen; and including the obtained value of the global variable in the user input field, of the outputted second screen, corresponding to the global variable.

This application provides a method, apparatus, electronic device, and storage medium for detecting atomicity violations, belonging to the field of software testing technology. The method includes: running the program under test using different input variables, identifying global variable access pairs covered during the execution of the program under test; for each global variable access pair, re-running the program under test using the corresponding input variables, and injecting feasible interrupt handlers between the global variable access pairs; if the interrupt handlers access the same global variable, recording the global variable access pair as a candidate global variable access pair; if the candidate global variable access pair simultaneously satisfies both spatial atomicity and temporal atomicity, then determining that the candidate global variable access pair has an atomicity violation risk. This application achieves efficient and accurate detection of atomicity violations by comprehensively covering variable access pairs, actively constructing interrupt scenarios, and establishing a spatiotemporal dual verification model.

The present invention discloses a memory access optimization method for dynamic instruction conversion based on data pre-alignment. By pre-constructing a memory mapping table for the mapping relationship between the x86 segment base address and the ARM page table base address in the ARM system, a data information table is established when loading and executing an executable file in the dynamic instruction conversion mode, and the initialized and uninitialized global variables and static variables are obtained to establish a first variable table and a second variable table respectively. For statically allocated memory, instruction conversion and static pre-alignment of instructions and variables are completed according to the memory mapping table, the data information table, the first variable table and the second variable table. For dynamically allocated memory, instruction conversion and dynamic pre-alignment of instructions and variables are completed according to the memory mapping table. Finally, based on the address continuity of the memory space, related instructions are merged into batch data transfer instructions to further optimize memory access, realizing memory access optimization during instruction conversion.

The embodiment of the invention provides a program detection method and device and computing equipment, and relates to the technical field of computers. The method comprises the steps of receiving a to-be-detected program, performing code detection on the program, and determining a statement where a global variable in the program is located; according to the library file and the statement where the global variable is located, the program is modified, and the modified program is obtained. According to the embodiment of the invention, the global variable is positioned through code detection, the global variable in a program does not need to be manually positioned, and the positioning efficiency and accuracy of the global variable can be improved. Moreover, the library file provided by the embodiment of the invention can provide a programming interface for realizing variable calculation operation, relation operation, logic operation or bit operation and other operation operations on the weak memory model, a memory barrier instruction does not need to be manually inserted, and the modification difficulty is reduced. Therefore, the program modification efficiency is improved. And through program modification, safe operation of the multi-thread program under the weak memory model is ensured.

Provided are a device and method for detecting a variable vulnerability in software using a machine learning (ML) model. The method performed by an analysis device includes receiving a source code of a program to be analyzed, replacing call functions, variable names, and call stack functions in an execution log generated during execution of the source code with certain identifiers (IDs) to preprocess the execution log, analyzing the preprocessed execution log through a pretrained first learning model to classify whether each pair of a global variable and a call function is at an initialization location, analyzing the preprocessed execution log through a pretrained second learning model to estimate a maximum value and a minimum value of the global variable, and determining whether the global variable is vulnerable on the basis of information output by the first learning model and information output by the second learning model.

The invention relates to the technical field of software architecture application, in particular to a converter software architecture implementation method, device and equipment and a computer readable storage medium. The method comprises the steps that software modules are divided according to hardware resource types, and each hardware resource corresponds to an independent code folder; all code operations related to the resource are limited in the folder; defining all user global variables in a single. C file, and declaring the global variables in a single. H file; a layered structure is adopted to realize a communication interface, and comprises a hardware layer, a protocol analysis layer and an application layer. User variables are configured through a structure table, and each variable supports attribute judgment and read-write operation by taking a group number and a sub-index number as a unique identifier. And a three-layer architecture of a hardware layer, a protocol analysis layer and an application layer is adopted, so that the flexibility and expandability of the system are improved. All global variables are declarated through a single. C file and a single. H file, and the problem of repeated definition of the variables is avoided.

The invention discloses a method for automatically realizing instruction addressing in a pointer mode during inertial device calibration, which comprises the following steps of: A, establishing a global array variable of an instruction set structure body, and defining the size of an array according to the number of actual instruction sets; b, initializing a global variable of the instruction set array defined in the step A so as to assign each element in the array; c, defining a specific performance function instance, that is, each instruction generally has a specific performance function to be executed; and D, automatically addressing the main body part of the performance function by adopting a pointer mode, circularly traversing the global variable array defined in the step A through for, automatically finding the corresponding performance function according to the one-to-one correspondence relationship in the step B, and finally automatically skipping to the performance function instance defined in the step C for execution. Through the method, the problems of low reliability, low real-time performance and low subsequent function expandability in the instruction interaction process between the inertial measurement unit and the PC terminal during data acquisition and performance calibration can be solved.

The invention discloses a software architecture model correctness verification method oriented to a synchronous reaction type component, and relates to the technical field of model verification, in the method, a source model in an XML format is analyzed by means of a Dom4j package, and model nodes, migration and global variable information are extracted, classified and stored. Then, a mapping rule from a software architecture model to PROMELA codes is designed, and conversion of a model structure, data and various elements is covered; security and activity verification attributes are defined by using an SPIN tool, and the branch accessibility of the control node is judged through a control variable and assertion. From the starting node, the model elements are sequentially converted into variables, channels and processes of PROMELA. And finally, generating a verification script, performing grammar check and attribute verification on the converted model, analyzing a verification report to obtain a result, and repeating operation if other attributes need to be verified. The method provides a systematic and effective means for ensuring the correctness of the software architecture model.

The invention discloses a data-driven distributed fault detection method and a data-driven distributed fault detection device, which are used for analyzing and extracting more valuable information from two levels of global variables and local sub-block variables to implement distributed fault detection. The distributed fault detection method disclosed by the invention not only relates to the application of a brand new algorithm of manifold regularization slow feature analysis, but also provides a plurality of improved technical schemes related to variable quantum block division, neighborhood and reconstruction modes thereof, and whitening processing. In order to overcome the defect that feature analysis is only carried out on each sub-block after blocking is completed in the traditional method, the method provided by the invention inherits the modeling thought of mutual staggering from local sub-blocks to global sub-blocks and then to the local sub-blocks, and comprehensively represents the time sequence and spatial distribution features of learning data changes. Besides, the invention further designs a distributed fault detection device based on the same concept, and the central control module can execute the execution process of a manifold regularization slow feature analysis algorithm and also can autonomously divide variable sub-blocks.

The embodiment of the invention relates to a method for controlling program processing logic, and the method comprises the steps: determining whether a preset file directory contains an identification file or not, so as to generate a determination result; based on the determination results, variable values of global variables in a running memory are determined, the running memory is used for loading the target program, and different determination results correspond to different variable values of the global variables; determining the processing logic of the target program based on the variable value of the global variable; and in response to starting of the target program, running the target program according to the processing logic. Therefore, the matching degree between program operation and object requirements can be improved, the iteration efficiency of the program can be improved, the complexity of control program processing logic is reduced, and the operation risk of the program is reduced.

This application provides a method and apparatus for generating code-based module design documents. The method includes: obtaining target code; deleting compiler directives and comments from the target code to obtain code text; identifying and extracting global variables and function structures from the code text; comparing the identifiers in each function structure in parallel with global variables, and comparing the identifiers before the left parenthesis in each function structure in parallel with the function names of other function structures, and associating the global variables and / or function names that match the comparison with the corresponding function structures, wherein the other function structures are the function structures outside the current function structure in each function structure; and generating and outputting a target module design document in a preset format based on each function structure and its associated global variables and / or function names. This achieves efficient and accurate generation of module design documents.

The present application relates to the technical field of firmware emulation, and particularly relates to a fault scene backtracking method and device based on firmware emulation and a readable storage medium, wherein the method comprises the following steps: when an execution command is received, it is determined whether the execution time of the execution command is located at a preset backtracking time point, and the backtracking time point is preset according to a preset period; when the execution time is located at the backtracking time point, a flash memory backtracking position, firmware global variables and host computer information corresponding to the backtracking time point are acquired; according to at least one of the flash memory backtracking position, the firmware global variables and the host computer information, backtracking information of the firmware is determined, so that when an error reporting signal is triggered, the firmware is backtracked to a fault occurrence scene located before the triggering time of the error reporting signal according to the backtracking information. The difficulty of troubleshooting in the firmware emulation process is reduced, and the problem of how to backtrack the data information of the firmware to the time point when the error occurs is solved.

The invention provides a unified operation and maintenance method and device for heterogeneous infrastructures, and belongs to the technical field of computer software, and the method comprises the following steps: obtaining a declarative YAML configuration file defined with resource pool information, global variables and application configuration information, and analyzing the configuration file to obtain a structured configuration object; identifying target resource types contained in application information, global variables and resource pool information in the structured configuration object; matching a corresponding target application template from a predefined template library, and rendering the target application template based on the global variable to generate an execution instruction; based on the execution instruction, generating an independent Ansible execution file for each application; and running the Ansible execution file to complete application installation, and after the application installation is completed, realizing state sharing between the applications based on a context management mechanism. According to the method, the problems of high configuration complexity, difficulty in ensuring consistency and difficulty in hybrid deployment in operation and maintenance management can be solved.

A system and method for generating software components in a multithreaded processing environment that are capable of being executed in a thread-isolated manner to prevent data leakage across threads and that are linked together in a manner that enables the software components to share state includes generating a face template for a thread-specific face in a first thread and initializing a global variable that includes a global handle to a thread-local static variable. Thread-specific faces can then be initialized in threads from the face template. A thread-local static variable is lazy-initialized for each thread-specific face from the global variable in a manner that links the faces together to act as a single component.

This invention belongs to the field of PLC automation technology, specifically relating to a PLC project description method and system. The method includes: describing a PLC project in a development environment based on the TOML markup language; creating corresponding program units, global variable sets, periodic tasks, and devices according to the description of the PLC project, and encapsulating them in the PLC project file, or modifying the attributes of program units, global variable sets, periodic tasks, or devices in the PLC project file according to the description of the PLC project; and exporting the PLC project file. The PLC project and its corresponding program units, global variable sets, periodic tasks, and devices are all edited and generated or modified according to the description format of metadata + object definition, and the object definition section at least defines fields representing the operation mode, fields representing the object path, and fields representing the object type.

The invention provides a global variable integration method, which comprises the following steps of: opening client software of battery detection equipment, opening a step editor on the client software, and editing step flow parameters; after the work step flow parameters are edited, a channel to be tested is selected and clicked to start, the client packages the work step flow parameters and sends the packed work step flow parameters to the server, the server sends the packed work step flow parameters to the middle computer, and the middle computer parses the work step flow parameters and then starts the channel to start testing; the middle computer executes the process step test logic according to the process step flow parameters and synchronously executes the function of global variable integral parameters, and a client channel interface displays the value of a global variable for storing an integral result in real time; and ending the test until the step flow of the test channel is executed. The software code maintenance cost can be reduced; the integral requirements of different test parameters of the user are met, integral objects have diversity, and integral on internal fixed variables, user-defined variables and external variables is supported.

The invention discloses a full-automatic industrial production line analysis method and system, and the method comprises the steps: automatically exporting a PLC code through a Siemens official automation interface, and writing the PLC code into a server file system; performing instrumentation marking on the exported PLC code through a global variable, writing back the PLC code into a TIA Portal engineering project, and downloading the PLC code into PLC equipment; global variables in the data blocks corresponding to the PLC are read in real time, and all codes executed at the current moment are retrieved and matched in the PLC codes subjected to instrumentation marking; collecting PLC codes, and constructing the PLC codes into a JSON data set adaptive to the large model based on an industrial production line customization scene so as to train the large model; and obtaining a response text generated by the large model based on the trained large model. According to the method, the execution progress of the current PLC program can be automatically synchronized in real time and displayed in a natural language form, and zero migration cost is realized.

A computer implemented method manages a memory. A number of processor units determines a creation of an object in a program. The number of processor units determines a set of uses of the object in the program. The number of processor units add an allocation program code to allocate memory to the object in an off heap region in memory in response to the object not being within a call chain and not being assigned to a global variable. The number of processor units add a deallocation program code to deallocate the memory after each possible last use in a set of possible last uses of the object in the uses of the object in the program in response to the object not being within the call chain and not being assigned to the global variable. Additionally, a computer system and a computer program product for managing memory are provided.

The invention discloses a method and device for processing GPU shared memory allocation by an llvm compiler, and belongs to the field of data process.The method includes the steps that a kernel function call chain is reconstructed, equipment functions called by multiple kernels are renamed after being copied, and shared memory variables in the equipment functions are copied at the same time; it is ensured that each device function only exists in one call chain, so that the problem of device function shared memory address conflict in the compiling period is solved, and meanwhile accumulated calculation of offset addresses and memory sizes of related shared memory variables in the kernel function call chains is achieved by setting global variables of a kernel action domain. And the problem of shared memory allocation during compiling is efficiently solved.

The present invention belongs to the technical field of RPA testing, and particularly relates to a method and system for automated regression testing of RPA components. The method includes: S1, when the RPA components are regressed, parameterize and transfer the common configurations according to different execution environments, differences in client versions, and different executors; S2, build a general component test framework, fill the components to be tested into the general component test framework according to functional scenarios, and set judgment criteria for determining whether the component functions pass and whether the component return value types are correct; S3, collect test data and uniformly summarize the test data into global variables; S4, store the collected test data in a database and perform data analysis; S5, after the test data is stored in the database, determine whether to send a message notification according to the initialization configuration. The present invention has the characteristics of being able to achieve component automated regression testing through the test framework encapsulated by the RPA tool itself without relying on third-party tools.

Embodiments of the present application provide a vehicle testing method, device, electronic equipment and storage medium, the method comprising: the test software constructs global variables for hard-wire signals and bus signals of different test platforms respectively, and stores the mapping relationship between each test platform and the global variables to obtain a first mapping relationship; in response to a user selecting a target test platform from the test platforms, the target global variable corresponding to the target test platform is queried from the first mapping relationship; the target test script is generated based on the target global variable, and the remote control function test is completed by calling the test management software in the target test platform and the simulation hardware in the hardware-in-the-loop test cabinet through the target test script. The method can ensure that the generated test script can be used on different test platforms with different software and hardware, regardless of whether the hardware-in-the-loop system is dSpace, VT, ETAS or NI, the automation script written by the test software can be adapted, and there is no situation such as cannot be reused, difficult to transplant, etc.

The invention discloses a dynamic analysis instrumentation debugging method and a computer application program. The method comprises the following steps: analyzing DWARF mode information of a binary file of a to-be-instrumented analysis point, obtaining associated information of an instruction block and a source code file line number, matching an instrumented code line in a source code, collecting a corresponding program counter for accurate dynamic instrumentation, and collecting the calling condition of a function specified line in the source code by observing the calling condition of the to-be-instrumented analysis point. And obtaining a mapping table of local variable symbols and memory addresses and a mapping table of global variable symbols and memory addresses of the instrumented point function through DWARF debugging information of the binary file, and obtaining local variable and global variable information of the current analysis point to be instrumented. In this way, dynamic instrumentation can be carried out on any line of the code, information of all local variables and global variables stored in the stack of the current function when the line of code is executed can be collected, related information of current program running can be well known, and debugging is greatly helped.

The invention discloses a visual code operation debugging method and device. The method comprises the following steps: dynamically adding or deleting breakpoints in a code editing area in an integrated debugging environment, and automatically adjusting the positions of the breakpoints when codes are changed so as to keep logic consistency; and executing the code of the code editing area, highlighting and displaying the currently executed code line in the execution control area, dynamically indicating an execution path through a visual mark, and meanwhile, displaying the states of the local variable and the global variable in the variable monitoring area in real time. The technical problem that code debugging is complex in the prior art is solved.

The invention discloses a multi-task message publishing and state feedback method and system based on a FreeRTOS system, and relates to the technical field of embedded operating systems, and the method comprises the steps: creating a global variable for storing content data and a publishing state; when a message is collected, updating the content data of the global variable into the message; the content data in the global variable is published, and after the message is published, the publishing state of the global variable is modified into the publishing result of the message, the publishing state of the message is set in the global variable, and the publishing state of the message is stored by using the global variable. The feedback of the publishing state can be obtained after the message is published. Therefore, information data loss and repeated release are avoided.

The application discloses a page application architecture and a method for generating a page application based on the page application architecture. The page application architecture comprises a page framework constructed based on a first underlying framework and a plurality of independent category blocks corresponding to different category designs. The page framework comprises a page structure module, a general component library, a global variable module and an initialization module. The page structure module comprises a page header navigation submodule, a page core navigation submodule and a block configuration submodule. The general component library comprises common components registered to a loading tool of the first underlying framework and integrated into the page framework. In the category blocks, the product of a first category block is packed into the page framework to be initially displayed in a content display area of the page, and the product of a second category block is dynamically loaded according to requirements during the running of the page application. The architecture can improve the collaborative development efficiency of the page application.

This invention relates to the field of scheduling process orchestration technology, specifically providing a scheduling process flow engine method, comprising the following steps: S1, starting the node, parsing the externally transmitted parameter data for preliminary analysis; S2, querying the global variable data in the cache, loading it if it exists, otherwise continuing, storing the parameter data from step S1 into the global variable; S3, loading the data; S4, determining the policy data configuration of the node itself; S5, recording the execution log of the scheme; S6, confirming whether the scheme has been executed, if it has been executed, it will not be executed again, if it has not been executed, sorting all node data in sequence and processing the data of each node; S7, recording the execution log of the scheme; S8, executing the callback, if there is a service that needs to be called back, executing the service callback and passing in the configured callback data; S9, ending the node, execution ends. Compared with the prior art, this invention can greatly improve manual efficiency and the efficiency of service integration between different platforms of each node.

The application provides a model-in-loop simulation test method, device, equipment and medium. The model-in-loop simulation test method comprises the following steps: obtaining a plurality of function model files used for simulation test, wherein the data of the function model files comprises model file data and configuration file data; constructing an integrated file according to the model file data; loading the configuration file data into a global variable space associated with the integrated file to generate an integrated model file; performing model reference processing on the integrated model file to generate a test engineering file; and performing simulation test on an input test case according to the test engineering file to generate test result data. The application can improve the simulation test efficiency of software model-in-loop and save the software development time cost.

The invention provides a code compiling method and device, equipment and a medium, and the method comprises the steps: generating a global variable byte code segment of at least one type of information in an anonymous internal class according to the annotation information of an inline method in a source code file, and setting a mark code pair corresponding to the type information in the code segment of the anonymous internal class; from the byte code segments compiled by the inline method, determining an initial byte code segment of each type information in the anonymous internal class according to the marking code pair, each initial byte code segment comprising the type information; obtaining a target global variable byte code segment from all global variable byte code segments according to each piece of type information; and according to each initial byte code segment and each target global variable byte code segment, generating a target byte code file. According to the method, the number of anonymous internal classes in the inline method can be reduced, so that the volume of a byte code file package after source code compiling is not greatly increased.

The invention relates to an agent development system and method based on global variables and any hooking type. The method comprises the following steps: analyzing agent development configuration information input externally to construct an initial graph structure of an agent; in the composition stage, nodes and node relations in the initial graph structure are traversed in sequence, input variables and output variables of components are defined step by step, and meanwhile any input hanging type serves as a node input data type to support mutual calling of different types of nodes; carrying out unified registration and centralized management on input variables and output variables of the components by adopting a global variable mechanism; in the operation construction stage, vertex-by-vertex construction is executed to complete value reference substitution of an agent development task and extraction of an output structure variable value; and after the setting is completed, generating a graph structure corresponding to the intelligent agent so as to realize intelligent agent development. According to the method, the intuition and maintainability of agent development can be improved, the development efficiency is improved, and efficient development support is provided for the industry.

The application relates to an agent development system and method based on global variables and arbitrary hook types. The method comprises the following steps: analyzing externally input agent development configuration information to construct an initial graph structure of an agent; in the graph construction stage, sequentially traversing nodes and node relationships in the initial graph structure, gradually defining input variables and output variables of components, taking arbitrary input hook types as node input data types to support mutual calling of different types of nodes, and adopting a global variable mechanism to uniformly register and centrally manage the input variables and the output variables of the components; in the running construction stage, constructing execution point by point to complete value reference replacement of an agent development task and extraction of output structure variable values; and after the setting is completed, generating a graph structure corresponding to the agent to realize agent development. The application can improve the intuitiveness and maintainability of agent development, improve the development efficiency, and provide efficient development support for the industry.