Semiconductor structure and preparation method thereof

Abstract

The invention relates to a semiconductor structure, and the structure comprises a substrate in which a plurality of active regions arranged at intervals are formed; gate structures which are arranged in parallel at intervals and located in the substrate; a bit line contact structure within the substrate; and an insulating liner layer which is positioned in the substrate and is positioned between the bit line contact structure and the gate structure so as to insulate and isolate the bit line contact structure from the gate structure. Therefore, the bit line contact structure and the gate structure are separated by the insulating liner layer, short circuit or higher parasitic capacitance is not easy to occur even if a staggered part exists between the bit line contact structure and the gate structure, so that the bit line contact structure can extend to the deep part of the active region, and the conductive structure in the gate structure can extend to the upper surface of the active region; the insulating liner layer separates the gate structure from the bit line contact structure and also separates the adjacent gate structures crossing the same active region, so that the mutual influence of the adjacent gate structures is reduced, and the risk of vulnerability of the memory is reduced.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor structure and a preparation method thereof. Background technique [0002] The semiconductor structure usually includes a word line and a bit line contact structure. Since the word line and the bit line contact structure are too close to each other, a short circuit may occur or excessive parasitic capacitance may be generated. Therefore, in order to reduce these faults during preparation, the word line and Due to the distance of the bit line contact structure, the bit line contact structure does not go deep into the active area and the word line is deeply buried in the active area, so that the bit line contact window cannot go deep into the active area. Contents of the invention [0003] Based on this, it is necessary to provide a semiconductor structure and a preparation method thereof to address the above problems. [0004] A semiconductor structure comprising: ...

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