Memory testing method and device and electronic equipment

A technology of memory testing and memory, which is applied in faulty hardware testing methods, error detection/correction, electrical digital data processing, etc., can solve the problems of low efficiency of memory testing, achieve the effect of reducing the scope of memory testing and ensuring reliability

Pending Publication Date: 2022-03-01
NEW H3C TECH CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0004] In view of this, the embodiment of the present invention provides a memory testing method, device and electronic equipment to solve the problem of low efficiency of memory testing

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  • Memory testing method and device and electronic equipment
  • Memory testing method and device and electronic equipment
  • Memory testing method and device and electronic equipment

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Embodiment Construction

[0048] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.

[0049] The memory test method provided by the embodiment of the present invention narrows the memory test range by recording the fault physical address, so as to achieve the effect of shortening the fault recurrence time. For example, for 32G memory, in the prior art, in order to meet the demand for fault recurrence, it needs to run to 32G. Now, only nee...

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Abstract

The invention relates to the technical field of memory testing, in particular to a memory testing method and device and electronic device.The method comprises the steps that a fault physical address and a preset address offset of a target memory are obtained; determining a fault physical address range based on the fault physical address and the preset address offset; setting attributes of all physical addresses in the fault physical address range to be locked; converting the fault physical address range into a virtual address range; and performing memory testing on the target memory based on the virtual address range. The test objects in the target memory are screened by using the fault physical address, the test is performed only for the fault physical address range without integral test, the memory test range is reduced, and the memory fault coupling and multiple write-in fault representation enable the memory fault to occur in the adjacent row and column range, so that the test efficiency is improved. Therefore, the reliability of the test result can be ensured by testing the fault physical address range.

Description

technical field [0001] The invention relates to the technical field of memory testing, in particular to a memory testing method, device and electronic equipment. Background technique [0002] Memory is a sophisticated high-speed server component, which has the characteristics of various faults and complex types. With the upgrading of memory speed and the improvement of manufacturing process technology, the particles are becoming more and more precise, and the capacity of single memory is increasing, such as the latest 12-14nm process 128G DDR4. Precision is accompanied by an increase in interference-type faults. Some of these types of faults need to be stimulated by a specific sensitization sequence, and some require repeated high-intensity read and write excitations. When it comes to production testing, memory faults are difficult to find and reproduce. [0003] In the prior art, the memtest algorithm is used to perform a pressure test on reading and writing of all virtual...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
CPCG06F11/2273G06F11/2205
Inventor 卢双堂许志豪
Owner NEW H3C TECH CO LTD
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