Method using slp packing with statements having both isomorphic and non-isomorphic expressions

Abstract

A computer implemented method is provided for using SLP in processing a plurality of statements, wherein the statements are associated with an array having a number of array positions, and each statement includes one or more expressions. The method includes the step of gathering expressions for each of the statements into a structure comprising a single merge stream, the merge streams being furnished with a location for each expression, wherein the location for a given expression is associated with one of the array positions. The method further comprises selectively identifying a plurality of expressions, and applying SLP packing operations to the identified expressions, in order to merge respective identified expressions into one or more isomorphic sub-streams. The method further comprises selectively combining the expressions of the isomorphic sub-streams, and other expressions of the single merge stream, into a number of input vectors that are substantially equal in length to one another. A location vector is generated that contains the respective locations for all of the expressions in the single merge stream. The method further comprises generating an output stream that comprises the expressions of the input vectors, wherein the expressions are arranged in the output stream an order determined by the respective locations contained in the location vector.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The invention disclosed and claimed herein generally pertains to a Single Instruction Multiple Data (SIMD) code generation method that uses Superword-Level Parallelism (SLP) in connection with mixed isomorphic and non-isomorphic packed code. More particularly, the invention pertains to a method of the above type that uses a permute operator to combine isomorphic and non-isomorphic expressions into an aggregated expression, in order to provide a final output stream.[0003]2. Description of the Related Art[0004]It is well known that computer processing speed has increased through the use of parallel processing. One form of parallel processing relies on a SIMD architecture, which processes multiple data packed into a vector register in a single instruction, such as SSE for Pentium, VMX for PPC 970, CELL, and Dual FPU for BlueGene / L. The type of parallelism exploited by SIMD architecture is referred to as SIMD parallelism, a...

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