Integrated circuit packaging system including non-leaded package

a technology of integrated circuit and packaging system, which is applied in the direction of solid-state devices, electric devices, basic electric elements, etc., can solve the problems of increasing processing power, serious design flaws, and constant shrinkage of electronic devices utilizing such packaging

Inactive Publication Date: 2011-08-25
PUNZALAN JEFFREY D +3
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach effectively reduces lead-to-lead shorting by approximately 35% and prevents electrical cross-talk, allowing for the creation of finer pitch packages without compromising structural integrity, thereby enhancing packaging efficiency and reliability.

Problems solved by technology

The electronic devices utilizing such packaging are constantly shrinking in size while demanding increased processing power.
A lead pitch this fine is often the limiting factor for high yield QFP packaging because lead shortages can occur at smaller dimensions.
Unfortunately, this finer pitch requirement has created a serious design flaw, lead-to-lead shorting.
As the dimensions between adjacent electrical conductors becomes smaller, electrical cross-talk and lead-to-lead shorting become a design limitation of dual row and single row QFN packaging.

Method used

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  • Integrated circuit packaging system including non-leaded package
  • Integrated circuit packaging system including non-leaded package
  • Integrated circuit packaging system including non-leaded package

Examples

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Embodiment Construction

[0028]The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention, and it is to be understood that other embodiments would be evident based on the present disclosure and that process or mechanical changes may be made without departing from the scope of the present invention.

[0029]In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known system configurations, and process steps are not disclosed in detail. Likewise, the drawings showing embodiments of the invention are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown exaggerated in the drawing FIGs. In addition, where multiple embodiments are disclosed and described havi...

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Abstract

An integrated circuit packaging system includes: a plurality of leads with a predetermined thickness and a predetermined interval gap between each of the plurality of leads; each one of the plurality of leads includes first terminal ends disposed adjacent an integrated circuit and second terminal ends disposed along a periphery of a package; and a lead-to-lead gap formed between the second terminal ends of alternating leads in excess of the predetermined interval gap.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)[0001]This is a continuation of co-pending U.S. patent application Ser. No. 11 / 307,383 filed Feb. 4, 2006.TECHNICAL FIELD[0002]The present invention relates generally to integrated circuit packaging, and more particularly to an integrated circuit packaging system including a non-leaded package.BACKGROUND ART[0003]As customer demand requires improved integrated circuit (IC) performance, new demands are placed on the IC packaging industry. To accommodate such demands, the IC packaging industry has had to produce faster, more reliable, and higher-density circuits while minimizing size. IC packaging must not only meet these performance demands but must also protect against various environmental conditions like moisture, contamination, mechanical vibration and temperature variations. Therefore, the correct packaging of an IC permits the microchip to function in various customer environments, such as, notebook computers, cellphones, video cameras, ...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L23/495
CPCH01L23/3107H01L23/49541H01L23/49548H01L2924/0002H01L2924/00
InventorPUNZALAN, JEFFREY D.BATHAN, HENRY D.SHIM, IL KWONLAU, KENG KIAT
OwnerPUNZALAN JEFFREY D