Memory device

a memory device and memory technology, applied in the field of memory devices, can solve the problems of more power consumption in the un-work rank of the dram

Active Publication Date: 2022-07-14
NAN YA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This solution effectively reduces power consumption by enabling only the required ranks, improving the overall efficiency of the memory device.

Problems solved by technology

It causes more power consumption in un-work rank of the DRAM.

Method used

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Embodiment Construction

[0010]Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

[0011]FIG. 1 depicts a schematic diagram of a memory device according to one embodiment of the present disclosure. In some embodiments, please refer to FIG. 1, the memory device 1000 includes an input pad 1100, a first rank 1200, a second rank 1300, a first voltage detector 1210, and a second voltage detector 1310. In another embodiment, the memory device 1000 includes a dynamic random access memory (DRAM).

[0012]In some embodiments, the input pad 1100 is configured to receive an input voltage. The first voltage detector 1210 is coupled to the input pad 1100. The first voltage detector 1210 is configured to receive the input voltage, and transmit the input voltage to the first rank 1200. The second voltage dete...

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Abstract

A memory device includes an input pad, a first rank, a second rank, a first voltage detector, and a second voltage detector. The input pad is configured to receive an input voltage. The first voltage detector is coupled to the input pad, the first voltage detector is configured to receive the input voltage, and the first voltage detector is configured to transmit the input voltage to the first rank. The second voltage detector is coupled to the first voltage detector through a first through-silicon via, the second voltage detector is configured to receive the input voltage, and the second voltage detector is configured to transmit the input voltage to the second rank according to a control signal transmitted from the first voltage detector through the first voltage detector, so as to decide a state of the second rank.

Description

BACKGROUNDField of Invention[0001]The present disclosure relates to a memory device. More particularly, the present disclosure relates to a memory device having different voltage detectors to control ranks of a memory device.Description of Related Art[0002]In current memory device, a dynamic random access memory (DRAM) includes 2 to 8 ranks. Each of ranks will be enable by a control signal, and all ranks are in an enable state. It causes more power consumption in un-work rank of the DRAM.[0003]For the foregoing reason, there is a need to provide some other suitable control structure of the memory device to solve the problems of the prior art.SUMMARY[0004]One aspect of the present disclosure provides a memory device. The memory device includes an input pad, a first rank, a second rank, a first voltage detector, and a second voltage detector. The input pad is configured to receive an input voltage. The first voltage detector is coupled to the input pad, the first voltage detector is c...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G11C11/4074G11C11/4093G11C11/4096G11C5/06
CPCG11C11/4074G11C5/06G11C11/4096G11C11/4093G11C8/12G11C5/04G11C5/143G11C11/4076G11C2207/105G11C7/225
InventorHSU, TING-SHUOSHEN, CHIH-WEI
OwnerNAN YA TECH