Display substrate and method for manufacturing the same, and display device

Abstract

The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. The display substrate includes a first display area and a second display area surrounding the first display area; the first display area is provided with a plurality of first light-emitting devices, and the second display area is provided with a plurality of second light-emitting devices; the second display area is provided with a plurality of first pixel circuits corresponding to the first light-emitting devices and a plurality of second pixel circuits corresponding to the second light-emitting devices; wherein the plurality of first pixel circuits are located on at least three sides of the first display area.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, and a display device. Background Art

[0002] With the continuous development of full-screen displays, blind hole screens and through-hole screens have appeared in the past two years after the notch screen and water drop screen to further increase the screen-to-body ratio.

[0003] However, even a through-hole screen cannot achieve a true full screen. Figure 1 As shown, in order to enable the camera to collect external light, the display screen 100 needs to be provided with an opening 102 at a position corresponding to the camera, and no image can be displayed in the area where the opening 102 is located.

[0004] The under-screen camera is an emerging full-screen technology. The area where the camera is set on the display can both display images and take pictures. However, there is a problem with the light transmittance of the under-screen camera area. Summary of the invention

[0005] The present disclosure provides a display substrate and a manufacturing method thereof, and a display device.

[0006] In a first aspect of the present disclosure, a display substrate is provided, comprising a first display area and a second display area surrounding the first display area; a plurality of first light-emitting devices are arranged in the first display area, and a plurality of second light-emitting devices are arranged in the second display area; a plurality of first pixel circuits corresponding to the first light-emitting devices and a plurality of second pixel circuits corresponding to the second light-emitting devices are arranged in the second display area; wherein the plurality of first pixel circuits are located on at least three sides of the first display area.

[0007] According to a second aspect of the present disclosure, a display device is provided, comprising the display substrate according to the first aspect.

[0008] In a third aspect of the present disclosure, a method for manufacturing a display substrate is provided, comprising:

[0009] obtaining a substrate base plate;

[0010] forming a plurality of first light emitting devices in a first display area of ​​the base substrate;

[0011] forming a plurality of second light emitting devices in a second display area of ​​the base substrate, wherein the second display area surrounds the first display area;

[0012] forming a plurality of first pixel circuits corresponding to the first light emitting device and a plurality of second pixel circuits corresponding to the second light emitting device in a second display area of ​​the base substrate;

[0013] Wherein, a plurality of the first pixel circuits are located on at least three sides of the first display area.

[0014] The display substrate, manufacturing method thereof, and display device provided by the present disclosure increase the number of wirings in a single wiring layer by arranging the first pixel circuit on at least three sides of the first display area, thereby reducing the number of patterning processes, thereby reducing costs and improving factory production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 A schematic diagram of a display screen with a camera opening is shown.

[0017] Figure 2A A schematic diagram of an exemplary display substrate with an under-screen camera is shown.

[0018] Figure 2B A schematic diagram of a light emitting device layer of a display substrate is shown.

[0019] Figure 2C A schematic diagram showing the positional relationship between a first light emitting device and a first pixel circuit in a display substrate is shown.

[0020] Figure 3A A schematic diagram of an exemplary display substrate provided by an embodiment of the present disclosure is shown.

[0021] Figure 3B A schematic diagram showing the positional relationship between a first light emitting device and a first pixel circuit in a display substrate according to an embodiment of the present disclosure is shown.

[0022] Figure 3C A schematic diagram showing that the first display area of ​​the display substrate according to an embodiment of the present disclosure is exemplarily divided into four equal areas.

[0023] Figure 3D An exemplary schematic diagram showing the positional relationship between each group of first light emitting devices and each group of first pixel circuits in a display substrate according to an embodiment of the present disclosure is shown.

[0024] Figure 3E A schematic diagram showing an exemplary wiring layer of a display substrate according to an embodiment of the present disclosure is shown.

[0025] Figure 3F An exemplary light emitting device arrangement diagram of a display substrate according to an embodiment of the present disclosure is shown.

[0026] Figure 4 A schematic flow chart of an exemplary method for manufacturing a display substrate provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0028] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0029] Figure 2A A schematic diagram of an exemplary display substrate 200 with an under-screen camera is shown. Figure 2B A schematic diagram of a light emitting device layer of a display substrate 200 is shown.

[0030] like Figure 2A and Figure 2B As shown, the display substrate 200 may include a first display area 202 and a second display area 204 surrounding the first display area 202. A plurality of first light emitting devices 2022 are disposed in the first display area 202, and a plurality of second light emitting devices 2042 are disposed in the second display area 204.

[0031] An under-screen camera (not shown) may be disposed on the back side (opposite to the light emitting direction) of the light emitting device 2022 of the first display area 202 , and the under-screen camera may collect external light through the display substrate 200 to achieve imaging.

[0032] Figure 2C A schematic diagram showing the positional relationship between the first light emitting device 2022 and the first pixel circuit 2024 in the display substrate 200 is shown.

[0033] like Figure 2CAs shown, in order to increase the transmittance of the display substrate 200 in the first display area 202 so that the under-screen camera arranged in the first display area 202 can collect more external light and thus better realize imaging, the first pixel circuit 2024 corresponding to the first light-emitting device 2022 of the first display area 202 can be arranged in the second display area 204, thereby avoiding light blocking caused by the first pixel circuit 2024 being arranged in the first display area 202.

[0034] In this way, only the light-emitting device part is retained in the first display area 202, and its corresponding driving circuit is arranged outside the first display area 202, thereby improving the light transmittance of the display substrate 200 in the first display area 202, which is beneficial for the under-screen camera to complete imaging.

[0035] In order to transmit the driving signal of the first pixel circuit 2024 to the first light-emitting device 2022, the wiring 2026 can be used to connect the first pixel circuit 2024 and the first light-emitting device 2022. However, due to the process limitation of the pitch of the wiring 2026, when routing the wiring 2026, it may not be possible to make all the wirings 2026 connecting the first pixel circuit 2024 and the first light-emitting device 2022 in the same layer, and the wirings 2026 need to be made in different layers.

[0036] For example, assuming that the area of ​​the first display area 202 is about 3mm×3mm, and the size (Pitch) of the pixel unit is about 60μm, there are about 50×50 pixel units in the first display area 202. Assuming that the sub-pixel arrangement of 2G1B1R (two green sub-pixels share one blue sub-pixel and one red sub-pixel) is adopted, there are 100×50 sub-pixels. These sub-pixels need to be electrically connected to the first pixel circuit 2024 outside the first display area 202 and the first light-emitting device 2022 in the first display area 202 through the wiring 2026.

[0037] like Figure 2C As shown, when the first pixel circuit 2024 is arranged on both sides of the first display area 202, each row of pixels in the first display area 202 needs to be drawn to the left and right 50 wiring lines 2026 ( Figure 2C Not all the traces are drawn in the figure 2026). Thus, compared with only drawing the traces to one side, drawing the traces to both sides can compress the trace pitch in the horizontal direction.

[0038] Generally, the pitch of the routing 2026 is about 4 μm, so for a single-layer routing, a row of pixels can only be pulled out: pixel unit pitch / routing pitch = 60 μm / 4 μm = 15 lines.

[0039] Therefore, in order to meet the requirement of pulling out 50 ITO lines to the left and right of each row, 50 / 15=3.33 layers of wiring are required. In this way, at least 4 layers of wiring need to be added, and 8 patterning processes (Masks) are required to make 4 layers of wiring, which is costly and affects the factory's production capacity.

[0040] In view of this, the embodiment of the present disclosure provides a display substrate, including a first display area and a second display area surrounding the first display area; the first display area is provided with a plurality of first light-emitting devices, and the second display area is provided with a plurality of second light-emitting devices; the second display area is provided with a plurality of first pixel circuits corresponding to the first light-emitting devices and a plurality of second pixel circuits corresponding to the second light-emitting devices; wherein the plurality of first pixel circuits are located on at least three sides of the first display area. By arranging the first pixel circuits on at least three sides of the first display area, the number of routing lines can be increased in a single routing layer, thereby reducing the number of patterning processes, thereby reducing costs and increasing factory production capacity while achieving full-screen display.

[0041] Figure 3A A schematic diagram of an exemplary display substrate 300 provided by an embodiment of the present disclosure is shown. Figure 3B A schematic diagram showing the positional relationship between the first light emitting devices 3022a-d and the first pixel circuits 3024a-d in the display substrate 300 according to an embodiment of the present disclosure is shown.

[0042] like Figure 3A and Figure 3B As shown, the display substrate 300 includes a first display area 302 and a second display area 304 surrounding the first display area 302 .

[0043] The first display area 302 is provided with a plurality of first light emitting devices 3022a-d, and the second display area 304 is provided with a plurality of second light emitting devices 3042. The second display area 304 may also be provided with a plurality of first pixel circuits 3024a-d corresponding to the first light emitting devices 3022a-d and a plurality of second pixel circuits corresponding to the second light emitting devices 3042 (not shown in the figure).

[0044] The display substrate 300 may further include a camera unit (not shown in the figure). The camera unit may be arranged in the first display area 302 (or the orthographic projection of the camera unit in the display substrate 300 is located in the first display area 302) and located on a side away from the light emitting direction of the first light emitting device 3022. In this way, the camera area of ​​the display substrate 300 can display images and collect external light to complete imaging, thereby realizing a true full screen.

[0045] The plurality of first pixel circuits 3024 a - d may be located on at least three sides of the first display area 302 .

[0046] For example, refer to Figure 3B As shown, the first side of the first display area 302 (for example, Figure 3B The first pixel circuit 3024a is provided on the second side of the first display area 302 (for example, Figure 3B The first pixel circuit 3024b is provided on the third side of the first display area 302 (for example, Figure 3B The first pixel circuit 3024c is set on the right side of the first display area 302 (for reference). In this way, by setting the first pixel circuit on three sides of the first display area 302, the number of routing lines in a single layer of routing can be increased compared to setting it on two sides of the first display area 302. Because the routing lines on one side (for example, routing 3026b) and the routing lines on the other two sides (for example, routing 3026a and 3026c) are perpendicular to each other and do not interfere with each other, only the Pitch requirements between the routing lines on this side need to be considered, so that the number of single-layer routing lines can be increased by using the side on which the routing lines are added. Therefore, due to the increase in the number of single-layer routing lines, the number of routing layers can be reduced accordingly, thereby saving patterning processes, reducing costs and increasing factory production capacity.

[0047] The above three-side arrangement of the first pixel circuit is only exemplary. Based on the premise that the first display area 302 has four sides, any three sides may be selected to arrange the first pixel circuit, and the arrangement is not limited to the above example.

[0048] In some embodiments, Figure 3A and 3B As shown, a plurality of first pixel circuits 3024a-d may be disposed on four sides of the first display area 302, thereby further increasing the number of single-layer wirings.

[0049] As calculated before, if the area of ​​the first display area 302 is 3mm×3mm, the size (Pitch) of the pixel unit is about 60μm, and the routing Pitch is 4μm, the number of routing layers required is approximately (50 / 13) / 2=1.92 layers, that is, the original 4 layers of routing and 8 composition processes required are reduced to 2 layers of routing and 4 composition processes, which greatly improves factory production capacity and reduces costs.

[0050] In this way, the pixel circuits outside the first display area 302 are compressed in the horizontal direction as well as in the vertical direction. The pixel circuits corresponding to the light-emitting devices of the first display area 302 can be dispersed and placed on the four sides of the first display area 302. The number of wiring lines that need to be pulled out in each direction is further reduced by half compared to the wiring lines pulled out on both sides. Under the condition of the same wiring pitch, the number of new wiring layers required can be halved, which greatly improves the factory production capacity and reduces costs. At the same time, even if the number of wiring layers is halved, the number of wiring lines in the same wiring layer increases, which can correspondingly increase the number of pixels per inch (PPI) in the first display area 302, thereby improving the display effect of the first display area 302.

[0051] In some embodiments, Figure 3A and 3B As shown, the plurality of first pixel circuits 3024a-d may be equally divided into four groups. The first group of first pixel circuits 3024a may be arranged on a first side of the first display area 302 (eg, with Figure 3B The second group of first pixel circuits 3024b may be disposed on the second side of the first display area 302 (eg, with the left side as a reference) and connected to the corresponding first light emitting device 3022a through the first lead 3026a. Figure 3B The third group of first pixel circuits 3024c may be disposed on a third side of the first display area 302 (eg, with the upper side as a reference) and connected to the corresponding first light emitting device 3022b through the second lead 3026b. Figure 3B The fourth group of first pixel circuits 3024d may be disposed on a fourth side of the first display area 302 (eg, with the right side as a reference) and connected to the corresponding first light emitting device 3022c through the third lead 3026c. Figure 3B The first lead 3026a is parallel to the third lead 3026c, and the first lead 3026a is perpendicular to the second lead 3026b and the fourth lead 3026d.

[0052] Accordingly, the first display area 302 can be divided into four areas of equal area. Figure 3C FIG. 3 is a schematic diagram showing that the first display area 302 of the display substrate 300 according to an embodiment of the present disclosure is exemplarily divided into four equal areas. Figure 3C As shown, the first display area 302 can be divided into a first area A, a second area B, a third area C and a fourth area D with equal areas. Figure 3BAs shown, the plurality of first light-emitting devices 3022a-d can be equally divided into four groups by the four regions. The first group of first light-emitting devices 3022a is connected to the first group of first pixel circuits 3024a, the second group of first light-emitting devices 3022b is connected to the second group of first pixel circuits 3024b, the third group of first light-emitting devices 3022c is connected to the third group of first pixel circuits 3024c, and the fourth group of first light-emitting devices 3022d is connected to the fourth group of first pixel circuits 3024d.

[0053] In some embodiments, the distance between the center of each group of first light-emitting devices and the center of the corresponding group of first pixel circuits is smaller than the distance from the center of the group of first light-emitting devices to the center of other groups of first pixel circuits, so that the lead lengths of the correspondingly connected first light-emitting device groups and first pixel circuit groups are minimized, which is beneficial to wiring and process manufacturing.

[0054] Figure 3D FIG. 2 is an exemplary schematic diagram showing the positional relationship between each group of first light emitting devices and each group of first pixel circuits in the display substrate 300 according to an embodiment of the present disclosure. Figure 3D As shown, the line between the center C1 of the first group of first light-emitting devices 3022a and the center C2 of its corresponding group of first pixel circuits 3024a is obviously shorter than the line between the center C1 and the centers C3-C5 of the second to fourth groups of first pixel circuits 3024b-d. Similarly, the distances between the centers of the first light-emitting devices of other groups and the centers of the corresponding groups of first pixel circuits are also shorter than the distances between the centers of the first light-emitting devices of the group and the centers of the first pixel circuits of other groups, which will not be described in detail.

[0055] In some embodiments, Figure 3B As shown, each group of first light-emitting devices 3022a~d can form an array of isosceles triangles respectively, and accordingly, each group of first pixel circuits 3024a~d can also form an array of isosceles triangles, so that the leads connecting the first light-emitting devices and the corresponding first pixel circuits can be straight lines, which is conducive to wiring and process manufacturing.

[0056] In some embodiments, in order to further improve the transmittance of the first display area 302 so that the camera unit can collect more light, the first lead 3026a, the second lead 3026b, the third lead 3026c and the fourth lead 3026d are transparent metal traces, for example, they can be ITO.

[0057] In some embodiments, the display substrate 300 may further include a wiring layer. Figure 3E FIG. 4 is a schematic diagram showing an exemplary wiring layer of a display substrate 300 according to an embodiment of the present disclosure. Figure 3EAs shown, the first lead 3026a, the second lead 3026b, the third lead 3026c and the fourth lead 3026d are arranged in the same lead layer, that is, at least part of the first lead 3026a, the second lead 3026b, the third lead 3026c and the fourth lead 3026d are arranged in the same layer, so that the number of single-layer routing can be increased, and the number of routing layers can be reduced accordingly, thereby saving composition process, reducing costs and improving factory production capacity.

[0058] In some embodiments, other methods may be used to further improve the light transmittance of the first display area 302 . Figure 3F FIG. 2 shows an exemplary arrangement diagram of light emitting devices of a display substrate 300 according to an embodiment of the present disclosure. Figure 3F As shown, the arrangement density of the second light emitting devices 3042 is greater than that of the first light emitting devices 3022. In other words, the pixels per inch (PPI) of the first light emitting devices 3022 is smaller, so that the gap between the devices is larger, which is conducive to the transmission of light, thereby improving the light transmittance of the first display area 302.

[0059] The embodiment of the present disclosure further provides a display device, comprising any embodiment or arrangement and combination of the display substrate 300. In some embodiments, the display device may be an organic light emitting diode display device (OLED).

[0060] It should be noted that the display device in this embodiment can be: electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator, or any other product or component with a display function.

[0061] The disclosed embodiment also provides a method for manufacturing a display substrate.

[0062] Figure 4 FIG. 4 is a flow chart showing an exemplary method 400 for manufacturing a display substrate 300 provided in an embodiment of the present disclosure. Figure 4 As shown, the method 400 may include the following steps.

[0063] In step 402, a substrate is obtained.

[0064] In step 404 , a plurality of first light emitting devices 3022 are formed in the first display region 302 of the base substrate.

[0065] In step 406 , a plurality of second light emitting devices 3042 are formed in the second display area 304 of the base substrate, and the second display area 304 surrounds the first display area 302 .

[0066] In step 408 , a plurality of first pixel circuits 3024 a - d corresponding to the first light emitting device 3022 and a plurality of second pixel circuits corresponding to the second light emitting device 3042 are formed in the second display area 304 of the substrate. The plurality of first pixel circuits 3024 a - d are located on at least three sides of the first display area 302 .

[0067] In some embodiments, the plurality of first pixel circuits are equally divided into four groups, and the method 400 may further include the following steps:

[0068] forming a first lead 3026a connecting a first group of first pixel circuits 3024a and corresponding first light emitting devices 3022a, wherein the first group of first pixel circuits 3024a is located at a first side of the first display area 302;

[0069] forming a second lead 3026b connecting the second group of first pixel circuits 3024b and the corresponding first light emitting devices 3022b, wherein the second group of first pixel circuits 3024b is located at the second side of the first display area 302;

[0070] forming a third lead 3026c connecting the third group of first pixel circuits 3024c and the corresponding first light emitting devices 3022c, wherein the third group of first pixel circuits 3024c is located at a third side of the first display area 302;

[0071] A fourth lead 3026d is formed to connect the fourth group of first pixel circuits 3024d and the corresponding first light emitting devices 3022, and the fourth group of first pixel circuits 3024d is located at a fourth side of the first display area 302;

[0072] The first lead line 3026a is parallel to the third lead line 3026c, and the first lead line 3026a is perpendicular to the second lead line 3026b and the fourth lead line 3026d.

[0073] In some embodiments, method 400 may further include the following steps:

[0074] A lead layer is formed on the base substrate; wherein the lead layer is provided with a first lead, a second lead, a third lead and a fourth lead.

[0075] The method 400 of the above embodiment is used to manufacture the corresponding display substrate 300 in any of the above embodiments, and has the beneficial effects of the corresponding display substrate embodiments, which will not be described in detail herein.

[0076] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0077] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present disclosure difficult to understand, the known power / ground connections to the integrated circuit (IC) chips and other components may or may not be shown in the provided figures. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present disclosure difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform on which the embodiments of the present disclosure will be implemented (that is, these details should be fully within the scope of understanding of those skilled in the art). Where specific details (e.g., circuits) are set forth to describe exemplary embodiments of the present disclosure, it is apparent to those skilled in the art that the embodiments of the present disclosure can be implemented without these specific details or with changes in these specific details. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0078] Although the present disclosure has been described in conjunction with specific embodiments of the present disclosure, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0079] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A display substrate, comprising a first display area and a second display area surrounding the first display area; the first display area is provided with a plurality of first light-emitting devices, the second display area is provided with a plurality of second light-emitting devices, and the arrangement density of the second light-emitting devices is greater than the arrangement density of the first light-emitting devices; the second display area is provided with a plurality of first pixel circuits corresponding to the first light-emitting devices and a plurality of second pixel circuits corresponding to the second light-emitting devices; wherein, A plurality of the first pixel circuits are located on four sides of the first display area; The plurality of first pixel circuits are equally divided into four groups, the first group of first pixel circuits are located at a first side of the first display area and connected to the corresponding first light-emitting device through a first lead, the second group of first pixel circuits are located at a second side of the first display area and connected to the corresponding first light-emitting device through a second lead, the third group of first pixel circuits are located at a third side of the first display area and connected to the corresponding first light-emitting device through a third lead, and the fourth group of first pixel circuits are located at a fourth side of the first display area and connected to the corresponding first light-emitting device through a fourth lead; wherein the first lead is parallel to the third lead, and the first lead is perpendicular to the second lead and the fourth lead respectively; The display substrate further comprises a lead layer, in which the first lead, the second lead, the third lead and the fourth lead are arranged.

2. The display substrate according to claim 1, wherein: The first display area is divided into four areas of equal area, and the plurality of first light-emitting devices are equally divided into four groups by the four areas; the first group of first light-emitting devices is connected correspondingly to the first group of first pixel circuits, the second group of first light-emitting devices is connected correspondingly to the second group of first pixel circuits, the third group of first light-emitting devices is connected correspondingly to the third group of first pixel circuits, and the fourth group of first light-emitting devices is connected correspondingly to the fourth group of first pixel circuits.

3. The display substrate according to claim 2, wherein: The distance between the center of each group of first light emitting devices and the center of the corresponding group of first pixel circuits is smaller than the distance between the center of the group of first light emitting devices and the centers of other groups of first pixel circuits.

4. The display substrate according to claim 3, wherein: Each group of first light emitting devices forms an isosceles triangle array, and each group of first pixel circuits forms an isosceles triangle array accordingly.

5. The display substrate according to claim 4, wherein: The first lead, the second lead, the third lead and the fourth lead are transparent metal wirings. 6 . The display substrate according to claim 1 , further comprising a camera unit, which is arranged in the first display area and is located on a side away from a light emitting direction of the first light emitting device.

7. A display device, comprising the display substrate according to any one of claims 1 to 6.

8. The display device according to claim 7, wherein: The display device is an organic light emitting diode display device.

9. A method for manufacturing a display substrate, comprising: obtaining a substrate base plate; forming a plurality of first light emitting devices in a first display area of ​​the base substrate; forming a plurality of second light emitting devices in a second display area of ​​the base substrate, wherein the second display area surrounds the first display area, and an arrangement density of the second light emitting devices is greater than an arrangement density of the first light emitting devices; forming a plurality of first pixel circuits corresponding to the first light emitting device and a plurality of second pixel circuits corresponding to the second light emitting device in a second display area of ​​the base substrate; Wherein, the plurality of first pixel circuits are located on at least three sides of the first display area; wherein the plurality of first pixel circuits are equally divided into four groups, and the method further comprises: forming a first lead connecting a first group of first pixel circuits and a corresponding first light emitting device, wherein the first group of first pixel circuits is located at a first side of the first display area; forming a second lead connecting a second group of first pixel circuits and corresponding first light-emitting devices, wherein the second group of first pixel circuits is located at a second side of the first display area; forming a third lead connecting a third group of first pixel circuits and corresponding first light-emitting devices, wherein the third group of first pixel circuits is located at a third side of the first display area; forming a fourth lead connecting a fourth group of first pixel circuits and corresponding first light-emitting devices, wherein the fourth group of first pixel circuits is located at a fourth side of the first display area; Wherein, the first lead is parallel to the third lead, and the first lead is perpendicular to the second lead and the fourth lead respectively; The method further comprises: forming a lead layer on the base substrate; Wherein, the first lead, the second lead, the third lead and the fourth lead are arranged in the lead layer.

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