A method for reducing output ripple control of modular parallel high-power DC power supply

Abstract

The present invention discloses a method for reducing output ripple of a modular parallel high-power direct current power supply. By dividing a pulsation cycle into different time delays, the output current ripple peaks and valleys are staggered to achieve the purpose of reducing ripple. The method is mainly aimed at a research system composed of 12 three-phase isolated AC-DC-DC power supply modules connected in parallel. By combined control of each module, the 12 modules are divided into 4 groups of control units, each control unit controls 3 modules, and the modules and controllers are respectively delayed at different times to reduce the system output ripple, thereby realizing a control method for delayed current sharing. The present invention can stagger the current ripple peaks by reasonably selecting the delay time, thereby reducing the system output ripple, and can stagger the current ripple peaks by reasonably selecting the delay time, which can effectively reduce the system output ripple amplitude, thereby reducing the ripple, improving the output current quality and improving the power quality.

Description

Technical Field

[0001] The invention relates to the technical field of power electronic control, and in particular to a method for reducing output ripple control of a modular parallel high-power direct current power supply. Background Art

[0002] At present, with the development advantages of integration and functionalization of power electronic devices, the performance of switching power supplies has been greatly improved. However, due to the influence of power devices on their own performance, the output power of a single power module is only suitable for occasions with small power requirements. In order to meet the requirements of high-power applications, a parallel system composed of multiple power modules in parallel has become a common means of large-capacity DC power supply. By combining multiple power modules with small power capacity in parallel, it can power loads with large power requirements. By changing the number of parallel modules, different power level requirements can be met. The three-phase isolated AC-DC-DC power supply has the advantages of high power density, modularization and easy expansion. It is often used as a basic power module and expanded in parallel to meet the application requirements of high power output.

[0003] However, the six-pulse components of the uncontrolled rectifier output of the current system affect the output of the isolated DC-DC converter in the subsequent stage, resulting in large ripples in the system output. In a parallel system composed of multiple AC-DC-DC power modules, the six-pulse ripple of the front-stage output of the parallel system will also reduce the output voltage / current quality of the entire parallel system. In addition, the existing research on reducing the output ripple by additional circuit filtering is relatively complex to implement and increases the application cost of the power supply. Summary of the invention

[0004] The present invention provides a method for reducing output ripple control of a modular parallel high-power DC power supply, which can effectively solve the problem proposed in the above background technology that the six-pulse components of the uncontrolled rectification output of the front stage of the current system affect the output of the rear stage isolated DC-DC converter, resulting in large ripples in the system output. In a parallel system composed of multiple AC-DC-DC power supply modules, the six-pulse ripples of the front stage output of the parallel system will also reduce the output voltage / current quality of the entire parallel system. In addition, in existing studies, the implementation of reducing the output ripple by means of additional circuit filtering is relatively complex and increases the application cost of the power supply.

[0005] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a method for reducing output ripple control of a modular parallel high-power DC power supply, by dividing a pulsation cycle into different time delays, so that the output current ripple peaks and valleys are staggered, thereby achieving the purpose of reducing ripple;

[0006] Specifically, this method is mainly aimed at the research system composed of 12 three-phase isolated AC-DC-DC power modules connected in parallel. Through the combined control of each module, the 12 modules are divided into 4 groups of control units. Each control unit controls 3 modules, and the modules and controllers are delayed at different times to reduce the system output ripple, thereby realizing the control method of delayed current sharing.

[0007] When the 12 modules are equally divided into 4 groups of control units, each group of units is subjected to τ1, τ2, τ3, and τ4 control delays, which is the second-level delay control;

[0008] At the same time, each control unit performs different control delays of t1, t2, and t3 on the controllers of the three modules. This is the first level of delay control. By reasonably selecting the delay time, the current ripple peaks can be staggered to achieve the purpose of reducing the ripple.

[0009] The selection principle of delay time is as follows:

[0010]

[0011]

[0012] Among them, t d1 is the first-level delay time interval, x is the number of modules contained in each unit, t d2 is the second-level delay time interval, y is the number of units, T m The variation period of the pulsating component is 3.3ms.

[0013] According to the above technical scheme, the front stage of the research system is a three-phase uncontrolled rectifier circuit, and the rear stage is an isolated DC-DC converter. The three-phase AC input of the system passes through the uncontrolled rectifier circuit and is filtered by the L1 and C1 filter circuits to obtain the rear stage system input voltage u i ;

[0014] By controlling the switching of the inverter circuit, an AC square wave voltage is obtained at the front stage of the isolation transformer T1, which is then transformed by the transformer and connected to the full-bridge rectifier circuit. The output voltage u is then filtered by the L2 and C2 filter circuits. o .

[0015] According to the above technical solution, the three-phase power input and DC output are connected in parallel, and the input three-phase AC power is connected in parallel as the same input source of the parallel system. The DC output of the subsequent isolated DC-DC converter is also connected in parallel to power the load, thereby reducing the electrical stress on each module.

[0016] According to the above technical scheme, the control means of the delayed current sharing needs to be verified. In order to verify the effectiveness of the proposed delayed current sharing control strategy, experiments are conducted to add delayed current sharing control under traditional PI control and control the output current. The output current waveforms of the single module and the parallel system under traditional PI control are used to verify that the proposed delayed current sharing control has a better effect in improving ripple.

[0017] Compared with the prior art, the present invention has the following beneficial effects: the present invention has a scientific and reasonable structure and is safe and convenient to use:

[0018] The system is formed by connecting 12 isolated AC-DC-DC modules in parallel. The three-phase power input and DC output are connected in parallel. The design is flexible, the electrical stress on each module is reduced, and the system power density is improved. In addition, through the combined control of each module, the 12 modules are divided into 4 groups of units. Each control unit controls 3 modules, and the modules and controllers are delayed at different times. By reasonably selecting the delay time, the current ripple peaks can be staggered, thereby reducing the system output ripple.

[0019] In summary, this control method can stagger the current ripple peaks by reasonably selecting the delay time, which can effectively reduce the system output ripple amplitude, thereby reducing the ripple and improving the output current quality, thereby achieving the purpose of improving the power quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0021] In the attached picture:

[0022] Figure 1 This is a schematic diagram of the topological structure of a single-module three-phase isolated AC-DC-DC power supply of the present invention;

[0023] Figure 2 This is a schematic diagram of the system topology structure of the present invention consisting of 12 AC-DC-DC modules connected in parallel;

[0024] Figure 3 It is a schematic diagram of delayed current sharing control of the present invention;

[0025] Figure 4 It is a schematic diagram of the delayed current sharing control of the present invention;

[0026] Figure 5 It is a schematic diagram of the steady-state output current of the system after adding delayed current sharing control under PI control of the present invention;

[0027] The symbols in the figure and text are: a 、ub 、u c Indicates the input three-phase AC voltage; L1 and C1 are filter inductance and capacitance; u i Indicates the input voltage of the post-stage isolated DC-DC converter; S1-S4 are four switch tubes; D1-D4 are the anti-parallel diodes of the four switch tubes; u p 、u s are the primary voltage and secondary voltage of the isolation transformer respectively; L lk is leakage inductance, also known as resonant inductance; T1 is isolation transformer; D5-D8 are rectifier diodes of full-bridge rectifier circuit; L2 is filter inductor; C2 is voltage stabilizing capacitor; R1 is load resistor; u o is the output voltage; i oref is the output current reference value; i orefc is the reference value of the single module power supply current; i oc1 、i oc2 、i oc3 、i oc4 are the output current values ​​of the four units respectively; τ1, τ2, τ3, τ4 are the delay times between the four units; t1, t2, t3 are the delay times of the three modules in the unit; i o1 、i o2 、i o3 They are the output current values ​​of the three modules in the unit respectively. DETAILED DESCRIPTION

[0028] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0029] Embodiment: The present invention provides a technical solution, a method for reducing output ripple control of a modular parallel high-power DC power supply, by dividing a pulsation cycle into different time delays, so that the output current ripple peaks and valleys are staggered, thereby achieving the purpose of reducing ripple;

[0030] like Figure 1 As shown, the front stage of the system is a three-phase uncontrolled rectifier circuit, and the back stage is an isolated DC-DC converter. After the three-phase AC input of the system passes through the uncontrolled rectifier circuit, it will be filtered by the L1 and C1 filter circuits to obtain the back stage system input voltage u i ;

[0031] By controlling the switching of the inverter circuit, an AC square wave voltage is obtained at the front stage of the isolation transformer T1, which is then transformed by the transformer and connected to the full-bridge rectifier circuit. The output voltage u is then filtered by the L2 and C2 filter circuits. o ;

[0032] like Figure 2As shown in the figure, the system consists of 12 isolated AC-DC-DC modules in parallel. By connecting the three-phase power input in parallel and the DC output in parallel, the design is flexible, the electrical stress on each module is reduced, and the power density of the system is improved. In addition, the input three-phase AC power is connected in parallel as the same input source of the parallel system, and the DC output of the subsequent isolated DC-DC converter is connected in parallel to power the load.

[0033] like Figure 3 As shown, by combining and controlling each module, the 12 modules are divided into 4 groups of units, each control unit controls 3 modules, and the modules and the controller are delayed at different times, thereby reducing the system output ripple;

[0034] like Figure 4 As shown, the 12 modules are divided into 4 groups of units, and each group of units is subjected to control delays of τ1, τ2, τ3, and τ4 respectively. This is the second-level delay control. At the same time, each group of units has controllers for 3 modules, and the 3 modules are subjected to different control delays of t1, t2, and t3 respectively. This is the first-level delay control. By reasonably selecting the delay time, the current ripple peaks can be staggered, thereby achieving the purpose of reducing the ripple.

[0035] The principle of selecting the delay time is:

[0036]

[0037]

[0038] Among them, t d1 is the first-level delay time interval, x is the number of modules contained in each unit, t d2 is the second-stage delay time interval, y is the number of units, and Tm is the variation period of the pulsating component, which is 3.3ms.

[0039] like Figure 4 As shown, in a 12-module parallel system, x = 3, the first-order delay period t can be calculated. d1 =1.1ms, then the delays of the three modules in the first stage can be set to t1=0ms, t2=1.1ms and t3=2.2ms respectively, at which time the output current ripple between units is minimal;

[0040] Similarly, substituting y=4 into the formula, we can calculate t d2 =0.275ms, so τ1=0ms, τ2=0.275ms, τ3=0.55ms and τ4=0.825ms can be selected, and the closed-loop control adopts traditional PI control.

[0041] like Figure 5As shown in Figure 2, in order to verify the effectiveness of the proposed delayed current sharing control strategy, the delayed current sharing control is added to the traditional PI control through experiments, and the output current is set to 8000A. The steady-state output current waveform of the parallel system is shown in Figure 2. Figure 5 It can be seen that the output current ripple amplitude of a single module under traditional PI control is about 11A. After the first-level delay control output, the output current ripple amplitude of the three modules in parallel is reduced to 8A. After the second-level delay control, the output current ripple amplitude of 12 modules in parallel is about 14A, which is about 89% lower than the current ripple amplitude of 128A without delay control, which shows that the proposed delayed current sharing control has a good effect in improving ripple.

[0042] from Figure 5 From the simulation results in , this control method can stagger the current ripple peaks, which can effectively reduce the system output ripple amplitude, thereby reducing the ripple and improving the output current quality.

[0043] Finally, it should be noted that the above description is only a preferred example of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for reducing output ripple control of a modular parallel high-power DC power supply, characterized in that: By dividing a pulsation cycle into different time delays, the output current ripple peaks and valleys are staggered; Specifically, this method is mainly aimed at the research system composed of 12 three-phase isolated AC-DC-DC power modules connected in parallel. Through the combined control of each module, the 12 modules are divided into 4 groups of control units. Each control unit controls 3 modules, and the modules and controllers are delayed at different times to reduce the system output ripple, thereby realizing the control method of delayed current sharing. When the 12 modules are equally divided into 4 groups of control units, each group of units is subjected to τ1, τ2, τ3, and τ4 control delays, which is the second-level delay control; At the same time, each control unit performs different control delays of t1, t2, and t3 on the controllers of the three modules. This is the first level of delay control. By reasonably selecting the delay time, the current ripple peaks can be staggered to achieve the purpose of reducing the ripple. The principle of selecting the delay time is: Among them, t d1 is the first-level delay time interval, x is the number of modules contained in each unit, t d2 is the second-level delay time interval, y is the number of units, T m The variation period of the pulsating component is 3.3ms; The front stage of the research system is a three-phase uncontrolled rectifier circuit, and the back stage is an isolated DC-DC converter. After the three-phase AC input of the system passes through the uncontrolled rectifier circuit, it will be filtered by the L1 and C1 filter circuits to obtain the back stage system input voltage u i ; By controlling the switching of the inverter circuit, an AC square wave voltage is obtained at the front stage of the isolation transformer T1, which is then transformed by the transformer and connected to the full-bridge rectifier circuit. The output voltage u is then filtered by the L2 and C2 filter circuits. o ; By connecting the three-phase power input and the DC output in parallel, and connecting the input three-phase AC in parallel as the same input source of the parallel system, and also connecting the DC output of the rear-stage isolated DC-DC converter in parallel to power the load, the electrical stress on each module is reduced; The delayed current sharing control method needs to be verified. Through experiments, the delayed current sharing control is added under the traditional PI control, and the output current is controlled at a fixed level. The output current waveform of a single module and the output current waveform of a parallel system under the traditional PI control are used to verify the proposed delayed current sharing control.

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