A production scheduling method for multi-chamber etching equipment and related equipment

Abstract

The present invention provides a production scheduling method and related equipment for a multi-chamber etching device, the method comprising: obtaining wafer batches, available machine information, and a set of processing paths available for each machine for wafer batches of each process type in an etching parallel processing mode; obtaining a process type transfer matrix; generating etching scheduling tasks for wafer batches arriving within a planning period according to the available machine information, the etching scheduling tasks comprising machine scheduling tasks in the first stage and chamber scheduling tasks inside the machine in the second stage; creating a machine scheduling allocation strategy in the first stage, and creating a sub-batch slicing strategy for each wafer batch in the chamber in the second stage; when the task execution time reaches the trigger time of any adjustment task, creating a non-processing state instruction for the chamber, and sequentially interspersing and executing the triggered adjustment tasks. The present invention uses a two-stage allocation scheduling and production scheduling algorithm to simultaneously realize dual scheduling tasks for wafer batches at the machine and chamber levels.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor production technology, and in particular to a production scheduling method for multi-chamber etching equipment and related equipment. Background Art

[0002] During the wafer production process, etching is usually required to remove excess film on the silicon wafer, which is divided into wet chemical etching and dry physical etching. Since many thin film generation steps are followed by etching to remove excess materials to form the required structure and pattern, the demand for etching processing area is extremely large and is one of the key production steps. At the same time, the etching machine has various processing modes. Each machine has a multi-chamber structure. Wafers can be processed in serial or parallel form inside the machine, and there are even complex multi-layer processing paths of serial first and then parallel or parallel first and then serial. The processing path (PPID) of the wafer between the cavities inside the machine can intuitively illustrate the current processing mode and the order of the cavities passed. After a wafer batch (lot) arrives at the etching area, it is transferred to the vicinity of the corresponding mode according to the assigned processing mode, and then a machine and an available PPID on the machine are selected to wait for loading and processing.

[0003] The internal operation of etching machines in different processing modes is very different. For example, each wafer in each wafer batch on the serial mode machine needs to pass through chamber A-> chamber B-> chamber C-> chamber D in sequence according to the established PPID (such as A; B; C; D) to complete the processing. The PPID (A, B, C, D) in the parallel mode means that each wafer is equally likely to go to four chambers, and each chamber only needs to go once to complete the processing. The multiple processing modes of the etching unit and the various operation paths of the internal chamber (that is, there are multiple PPIDs) will significantly affect the processing efficiency of the wafer. For example, in a multi-chamber parallel structure, a wafer batch is dispersed in multiple chambers for synchronous processing, which helps the machine to process different wafer batches at the same time and improve the overall processing efficiency of the wafer; however, if there is no reasonable selection of complementary paths between multiple wafer batches, the waiting time of the wafer batch is long, the utilization rate of the chamber is uneven, and the chamber idle time is not ideal. At the same time, the choice of PPID for multiple wafer batches is directly related to the selection and utilization of the chamber and the subsequent production scheduling.

[0004] At present, the arrival of large-scale wafer batches from multiple sources in a short period of time by parallel etching units, coupled with the selection of multiple machines and multiple PPIDs in different processing modes for each wafer batch, will increase the demand and difficulty of scheduling tasks in the entire etching area. This requires a reasonable production scheduling method that can obtain machine scheduling, internal operation path selection and cavity dimension synchronization scheduling solutions for large-scale wafer batches in a short period of time. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides a production scheduling method and related equipment for multi-chamber etching equipment to solve the scheduling problem of parallel etching machines under the condition of large production demand. In response to the characteristics of large wafer batches and tight scheduling time in the parallel etching mode, a feasible scheduling plan can be given in time, thereby improving the scheduling efficiency of large-scale production.

[0006] In order to achieve the above purpose and other advantages, the present invention adopts the following technical solutions:

[0007] In a first aspect, the present invention provides a production scheduling method for a multi-chamber etching device, comprising:

[0008] Obtaining wafer batches, available tool information, and a set of processing paths available to each tool for the wafer batches of each process type in an etching parallel processing mode;

[0009] Obtaining the average time required for switching between the various process types in different adjustment tasks to form a process type transfer matrix, wherein the adjustment tasks are preparation and adjustment activities generated by process change, environment conversion or testing;

[0010] Generate an etching scheduling task for the wafer batch arriving within the planning period according to the available machine information, wherein the etching scheduling task includes a machine scheduling task in the first stage and a cavity scheduling task inside the machine in the second stage;

[0011] Creating a tool scheduling instruction of the first stage, and determining an allocation strategy for one of the tools and one of the processing paths in the processing path set allocated to each of the wafer batches;

[0012] Creating the cavity scheduling instructions of the second stage, and determining the slicing strategy of each of the wafer batches in each cavity inside the machine for sub-batches, and the processing start and end time points of each cavity for each of the wafer batches based on the allocation strategy and the process type transfer matrix;

[0013] The etching scheduling task is executed according to the slicing strategy within the processing time period determined by the processing start and end time points; when the execution time of the etching scheduling task reaches the preset trigger time of the trigger condition of any of the adjustment tasks, the etching scheduling task is paused, a non-processing state instruction for the cavity is created, and the adjustment tasks triggered in the non-processing state are executed in sequence according to the non-processing state instruction; and the etching scheduling task is continued to be executed after the adjustment task is executed.

[0014] According to a production scheduling method for a multi-chamber etching device provided by the present invention, the step of obtaining the average time required for switching between various process types in different adjustment tasks to form a process type transfer matrix includes:

[0015] Obtaining a set of process types to which each process type belongs in different adjustment tasks;

[0016] For each two different process types, determining a time transfer matrix in different adjustment tasks;

[0017] According to the time transfer matrix, the adjustment time required for switching between each two sets of process types in different adjustment tasks is obtained and added to obtain a total adjustment time between two sets of process types;

[0018] For all the process types of the wafer batch, the total adjustment time between two different process types is calculated respectively, and the process type transfer matrix is ​​formed.

[0019] According to a production scheduling method for a multi-chamber etching device provided by the present invention, the step of creating the machine scheduling instruction of the first stage and determining an allocation strategy for one of the machines and one of the processing paths in the processing path set allocated to each of the wafer batches includes:

[0020] The optimal matching model is established using mixed integer programming algorithm;

[0021] The difference between the average sub-batch processing time of each cavity and the number of cavity adjustment tasks are used as the objective function of the optimal matching model;

[0022] The optimal matching model is solved according to the constraints of the optimal matching model, and a solution with the smallest difference in average sub-batch processing time of each cavity is found from the optimal solution set when the number of cavity adjustment tasks is the minimum, as the solution result of the objective function, the solution result includes: one of the machines is assigned to each of the wafer batches, and a processing path is assigned from the processing path set of the machine.

[0023] According to a production scheduling method for multi-chamber etching equipment provided by the present invention, the constraint conditions of the optimal matching model include: allocation uniqueness constraint, allocation coupling constraint and chamber load calculation constraint.

[0024] According to a production scheduling method for a multi-chamber etching device provided by the present invention, the step of creating the chamber scheduling instruction of the second stage, determining the slicing strategy of each wafer batch for each chamber inside the machine for sub-batches based on the allocation strategy and the process type transfer matrix, and the processing start and end time points of each chamber for each wafer batch, includes:

[0025] Based on the process type transfer matrix, determining the non-processing state time generated by the conversion between different process types;

[0026] Constructing a multi-objective constraint programming model based on the allocation strategy, the non-processing state time and the influencing parameters affecting each of the adjustment tasks;

[0027] After optimizing the multiple objectives of the constraint programming model in lexicographic order according to the priority of the multiple objective settings, the constraint programming model is solved according to the constraint conditions of the constraint programming model to obtain a production scheduling plan for processing each wafer batch in each cavity inside the machine as the slicing strategy.

[0028] According to a production scheduling method for a multi-chamber etching device provided by the present invention, the multi-objectives of the constraint programming model are set in sequence and include:

[0029] All wafer batches are scheduled for production as much as possible without exceeding the waiting time limit;

[0030] All cavities need to be processed;

[0031] The number of switching times of the process type set of all chambers is minimal;

[0032] The processing order of wafer sub-lots in all chambers does not violate the priority order.

[0033] According to a production scheduling method for a multi-chamber etching device provided by the present invention, the constraint conditions of the constraint programming model include:

[0034] The wafer batch loaded on each chamber and ready for processing will be placed at the first place in the scheduling order;

[0035] Each of the wafer batches is processed only in the corresponding tool and cavity in the processing path;

[0036] The processing path of each wafer batch is divided into sub-batches having the same number as the cavities;

[0037] The total number of wafers included in each of the sub-batches divided from each of the wafer batches does not exceed the original number of wafers in the wafer batch;

[0038] Each of the wafer batches starts processing synchronously on a plurality of the parallel cavities;

[0039] The processing area and the non-processing area on each cavity do not overlap each other;

[0040] The processing time of any of the sub-lots of each of the wafer lots does not violate the waiting time limit of the wafer lot;

[0041] The sub-batches with higher priorities are dispatched before the sub-batches with lower priorities.

[0042] In a second aspect, the present invention provides an electronic device, the electronic device comprising:

[0043] One or more processors; and a memory storing computer program instructions, wherein the computer program instructions, when executed by the processor, implement the steps of the production scheduling method for a multi-chamber etching device as described in any one of the above.

[0044] In a third aspect, the present invention provides a computer-readable storage medium having a computer program / instruction stored thereon, which, when executed by a processor, implements the steps of a production scheduling method for a multi-chamber etching device as described in any one of the above.

[0045] In a fourth aspect, the present invention provides a computer program product, comprising a computer program / instruction, which, when executed by a processor, implements the steps of a production scheduling method for a multi-chamber etching device as described in any one of the above.

[0046] The present invention provides a production scheduling method and related equipment for a multi-chamber etching device, which obtains wafer batches, available machine information, and a set of processing paths available for each machine for wafer batches of each process type in an etching parallel processing mode; obtains the average time required for switching between various process types in different adjustment tasks to form a process type transfer matrix, wherein the adjustment tasks are preparation and adjustment activities generated when the process changes, the environment changes, or the test is performed; generates etching scheduling tasks for wafer batches arriving within a planning period according to the available machine information, and the etching scheduling tasks include the machine scheduling tasks of the first stage and the chamber scheduling tasks within the machine of the second stage; creates the machine scheduling instructions of the first stage, and determines the tasks assigned to each process type. The invention discloses a method for allocating a processing path in a machine and a processing path set for a wafer batch; creating a cavity scheduling instruction for the second stage, and determining the slicing strategy for sub-batches of each cavity inside the machine for each wafer batch, as well as the processing start and end time points of each cavity for each wafer batch based on the allocation strategy and the process type transfer matrix; executing the etching scheduling task according to the slicing strategy within the processing time period determined by the processing start and end time points, pausing the etching scheduling task when the execution time of the etching scheduling task reaches the preset trigger time of the trigger condition of any adjustment task, creating a non-processing state instruction for the cavity, sequentially interweaving and executing the adjustment tasks triggered in the non-processing state according to the non-processing state instruction, and continuing to execute the etching scheduling task after the adjustment task is executed. In response to the characteristics of large wafer batches and tight production scheduling in the etching parallel mode, the present invention uses a two-stage allocation and scheduling production scheduling algorithm within the planning cycle of the production scheduling algorithm to separate the machine allocation and processing path selection of the wafer batch, as well as the production scheduling and wafer running functions of the machine's internal cavity, thereby simultaneously realizing the dual scheduling tasks of the wafer batch at the machine and cavity levels. It is more suitable for the production scheduling problems of parallel etching groups with large-scale demands, helps shorten the production cycle, and improves the scheduling efficiency of large-scale production. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other implementation methods can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 It is a flow chart of a production scheduling method for a multi-chamber etching device provided by an embodiment of the present invention;

[0049] Figure 2 is a schematic diagram of the internal structure of a multi-chamber etching device provided by an embodiment of the present invention;

[0050] Figure 3It is a schematic diagram of the scheduling of the wafer batch partitioning mechanism provided by an embodiment of the present invention;

[0051] Figure 4 is a processing scheduling diagram of an etching cavity inside a device provided by an embodiment of the present invention;

[0052] Figure 5 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0053] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following specifically cites a preferred embodiment and describes it in detail with the accompanying drawings as follows.

[0054] It should be noted that it is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in the present invention can be combined with other embodiments without conflict. Unless otherwise defined, the technical terms or scientific terms involved in the present invention should be the usual meanings understood by people with ordinary skills in the technical field to which the present invention belongs. The words "one", "a", "a", "the" and the like involved in the present invention do not indicate a quantitative limitation and may represent the singular or plural. The terms "including", "comprising", "having" and any of their variations involved in the present invention are intended to cover non-exclusive inclusions; the terms "first", "second", "third", etc. involved in the present invention are merely to distinguish similar objects and do not represent a specific ordering of objects.

[0055] To facilitate understanding of the embodiments of the present invention, the following is an introduction to relevant technical terms in the present invention:

[0056] Etch: Etching.

[0057] Parallel: Parallel processing.

[0058] Chamber: A cavity in a machine, each of which processes a wafer.

[0059] PPID: The path that the wafer takes during processing in the machine. For example, the serial PPID: (A; B; C) means that all wafers in the wafer batch first go through chamber A, then chamber B, and finally chamber C to complete processing. For example, the parallel PPID: (A, B, C) means that all wafers in the wafer batch can choose one of chambers A, B, and C and complete processing after one pass. For example, the parallel-first-then-serial PPID: {(A; B), (C; D)} means that one of the two parallel sub-paths of chambers AB and CD is selected first, and then the processing is completed after passing through the two chambers in the selected sub-path.

[0060] Recipe: Process information or processing recipe, including ambient temperature, etc. Each wafer batch only requires one recipe in a specific type.

[0061] recipeGroup: The collection to which the processing recipe belongs. Multiple recipes may belong to the same recipeGroup, and the same recipe belongs to only one recipeGroup and will not exist in different recipeGroups at the same time.

[0062] Setup: An adjustment task caused by a process change, environment conversion, or test. It is generally caused by the unavailability of the machine due to a change in recipeGroup. There are many types of adjustment tasks, mainly season, pirun, and clean. Each has its own recipeGroup set and recipe classification.

[0063] Season: A setup to confirm whether the machine's production conditions are stable. This is done by running a test piece. There are two triggering conditions: recipeGroup changes and the machine chamber's idle time is too long.

[0064] Pirun: A setup that tests the stability of a machine after it has not run a recipe for a long time. It confirms the health of the machine after a period of stagnation by running test pieces. There are three trigger conditions: machine failure and maintenance for a period of time, machine idle for a period of time, and recipeGroup changes.

[0065] Clean: A setup that requires automatic cleaning after a period of cavity processing. Cleaning activities are required after the number of cavity processing wafers and time reach a certain threshold. There are three triggering conditions: the time since the last clean exceeds the threshold, the cumulative number of wafers processed by the cavity exceeds a certain threshold, and the recipeGroup changes.

[0066] Wafer: Wafer refers to the silicon chip used to make silicon semiconductor circuits. Its raw material is silicon.

[0067] Wafer lot: Generally, about 25 wafers constitute a wafer lot, which are loaded in wafer boxes for transportation.

[0068] Etching equipment: Etching equipment is used to process wafers. There are multiple cavities inside the equipment, and each cavity processes one wafer at a time.

[0069] Cavity: or chamber, used to provide a clean processing environment for wafer processing. In addition to the processing state, the cavity will also produce non-processing operations such as test runs and environmental cleaning due to downtime, process parameter conversion, etc.

[0070] It should be noted that the etching equipment in the embodiment of the present application adopts a parallel processing mode. There are N cavities inside the etching equipment, and each cavity processes a wafer at a time. Therefore, the etching equipment can process up to N wafers at a time. After a cavity processes a wafer and unloads it, the etching equipment will automatically trigger the detection mechanism to clean or test the cavity and other setup operations (i.e., check whether various types of setup trigger conditions are met) to meet the process requirements of the next wafer. Only after completing the required several setup operations will the cavity accept the next wafer for processing.

[0071] Process parameters: represent the attribute information of the wafer batch itself, including at least one of the following: material, size, and processing mode. This is not limited in the embodiments of the present application.

[0072] Process type: indicates the processing parameters required for the wafer batch, i.e., the process recipe, including at least one of the following: humidity, acidity, temperature, and pressure. Different wafer batches can have different or the same recipes. If the recipe of the wafer to be processed is inconsistent with the recipe of the wafer to be processed later, it means that the processing type conversion has occurred, otherwise it will not occur. This is not limited in the embodiments of the present application.

[0073] The applicant discovered that the processing of wafer batches in multiple cavities inside the etching machine is carried out in the dimension of wafers. The serial mode is to continuously extract each wafer batch and process them in sequence and wait for the previous wafer batch to leave the machine before entering. The parallel mode is to split a wafer batch into multiple cavities, and each cavity processes a sub-batch of the wafer batch (which can be regarded as a sublot), and each sub-batch has several wafers that are processed continuously in the cavity. This means that each wafer batch will only have one sub-batch in a cavity, and each cavity will process a sub-batch of another wafer batch only after processing a sub-batch of a wafer batch. Therefore, different wafer batches can be processed on the machine at the same time, but each cavity can only process wafers from one wafer batch at the same time. Therefore, the number of wafers in each cavity divided into a wafer batch is related to the processing time of this sub-batch and the start time of processing the next sub-batch. A complex and reasonable wafer batch division mechanism needs to be provided. Therefore, the present invention provides a production scheduling method and related equipment for multi-chamber etching equipment, which makes multi-layer decisions on the etching scheduling tasks of the etching area by object and stage, fully considering the internal multi-chamber processing characteristics of the actual etching parallel equipment, and using a two-stage allocation scheduling algorithm during the planning period of the scheduling algorithm to simultaneously realize the dual scheduling tasks of wafer batches at the machine and chamber levels.

[0074] Reference Figure 1 As shown, an embodiment of the present invention provides a production scheduling method for a multi-chamber etching device, comprising:

[0075] Step S1: Obtain wafer batches in an etching parallel processing mode, available tool information, and a set of processing paths available to each tool for wafer batches of each process type.

[0076] Specifically, the wafer batches that are diverted to the parallel processing mode among the wafer batches that arrive at the etching area are obtained, and the batch numbers and attribute information of the wafer batches processed in the parallel mode are obtained, mainly including: the number of wafers, process type, and other processing sequence related information (such as arrival time, waiting time limit, priority, status, etc.), as shown in Table 1.

[0077] Table 1 Wafer batch information

[0078]

[0079] At the same time, the available machine information in the parallel processing mode is obtained, mainly including: machine number, number of machine chambers, current processing status of the machine (loaded wafer batches, current processing status of each chamber, expected and unexpected downtime maintenance of the machine), as shown in Table 2. The internal structure of the machine of the multi-chamber etching equipment is as follows Figure 2 shown.

[0080] Table 2 Machine information

[0081]

[0082] At the same time, a set of processing paths available to each machine for each process type of wafer batch (ie, a PPID set) is obtained, as shown in Table 3.

[0083] Table 3 Machine-processing path information

[0084]

[0085] Step S2: Obtain the average time required to switch between various process types in different adjustment tasks to form a process type transfer matrix. The adjustment tasks are preparation and adjustment activities generated by process changes, environment conversions, or testing.

[0086] Specifically, adjustment tasks include production condition stability check (season), equipment health check (pirun), chamber cleaning activities (clean), etc. These setup tasks are executed sequentially to ensure that the equipment is always in the best condition during the production process. The process type set (recipeGroup) to which each process type (recipe) belongs and the test or cleaning time generated by switching between two recipeGroups need to be unified with the processing time.

[0087] Referring to the transfer matrix shown in Table 4, recipe1 belongs to recipeGroupA of the season adjustment task, recipeGroupB of the pirun adjustment task, and recipeGroupC of the clean adjustment task. Recipe2 belongs to recipeGroupB of the season adjustment task, recipeGroupC of the pirun adjustment task, and recipeGroupA of the clean adjustment task. The total time of the adjustment tasks between recipe1 and recipe2 is: total setup time [recipe1, recipe2] = season time [recipe1, recipe2] + pirun time [recipe1, recipe2] + clean time [recipe1, recipe2], that is, season time: 1 minute + pirun time: 6 minutes + clean time: 8 minutes = 15 minutes.

[0088] Table 4 Transfer matrix of different adjustment tasks

[0089]

[0090] Among them, the transfer matrix of adjustment tasks between different process types can be obtained in the database through the factory's historical production information. Get all the recipes of the wafer batch to be scheduled and the recipeGroups to which they belong in the three adjustment tasks. According to the above calculation through the transfer matrix, the total setup time between every two recipes is: [recipei, recipej] = season time [recipei, recipej] + pirun time [recipei, recipej] + clean time [recipei, recipej], where recipeei and recipej are each recipe with a processing sequence. Finally, the total setup time between every two recipes is combined into a process type transfer matrix for subsequent production scheduling.

[0091] Therefore, considering the impact of the process type of wafer batch on the production scheduling caused by the number of conversions and conversion time of three different adjustment tasks in the chamber dimension, the transfer time matrices in the three adjustment tasks are characterized respectively to calculate the combination time of the adjustment tasks and visualize it.

[0092] Step S3: Generate etching scheduling tasks for wafer batches arriving within the planning period according to the available machine information. The etching scheduling tasks include machine scheduling tasks in the first stage and cavity scheduling tasks inside the machine in the second stage.

[0093] Specifically, the current processing status of the machine in the available machine information obtained in step S1 includes detailed processing status information of each cavity in the machine, and the processing status of the cavity is divided into processing and non-processing, and the non-processing status is further divided into cavity fault maintenance and ongoing adjustment tasks. In order to accurately predict the time of the adjustment task triggered later, it is necessary to record the satisfaction of the triggering conditions of various adjustment tasks at all times. When a condition is satisfied to trigger the corresponding adjustment task, the condition value is reset to 0.

[0094] Among them, the wafer batches within the planning cycle refer to the wafer batches currently being prepared and processed on the etching machine plus the wafer batches that will arrive at the etching area in the future (for example, 12 hours). These wafer batches are summarized to generate the etching scheduling task for the current time node.

[0095] Therefore, for the parallel processing mode, a two-stage scheduling algorithm is designed to separate the machine allocation and PPID selection of wafer batches from the functions of production scheduling and wafer running within the machine. The stage-separated model can better cope with the characteristics of large wafer batches and tight scheduling time under the parallel processing mode, and can provide feasible scheduling plans in a timely manner, thereby ensuring a smooth process.

[0096] Step S4: creating a first-stage machine scheduling instruction, and determining an allocation strategy for a machine and a processing path in a processing path set to be allocated to each wafer batch.

[0097] Specifically, the etching scheduling task created is divided into two stages of scheduling tasks, including the first stage machine scheduling task and the second stage chamber scheduling task inside the machine. The first stage machine scheduling task selects a parallel etching machine and a processing path (PPID) for each parallel mode wafer batch to be scheduled by calling the mixed integer programming algorithm module. The PPID determines the set of chambers that can be used simultaneously by the wafer batch. Each chamber accumulates the sum of the types of processing techniques and the total time of the number of processed wafers and adds them to the minimization objective function, thereby obtaining a wafer batch machine allocation plan with load balancing for each chamber and fewer chamber adjustment tasks; the second stage chamber scheduling task takes the wafer batch-machine-PPID matching results of the first stage as input, and uses the constraint programming algorithm to obtain the scheduling plan for each chamber, including sub-batch processing and downtime, as well as non-processing states such as adjustment tasks.

[0098] In this embodiment, step S4 specifically includes:

[0099] The optimal matching model is established using mixed integer programming algorithm;

[0100] The difference between the average sub-batch processing time of each cavity and the number of cavity adjustment tasks are used as the objective function of the optimal matching model;

[0101] The optimal matching model is solved according to its constraints, and the solution with the smallest difference in average sub-batch processing time of each cavity is found in the optimal solution set when the number of cavity adjustment tasks is the minimum. The solution is taken as the solution result of the objective function. The solution result includes: a machine is assigned to each wafer batch, and a processing path is assigned from the processing path set of the machine.

[0102] In this embodiment, the constraints of the optimal matching model include: allocation uniqueness constraint, allocation coupling constraint and cavity load calculation constraint.

[0103] Specifically, step S4 creates the machine scheduling instructions for the first stage, specifically refers to generating a machine scheduling task, using a mixed integer programming algorithm to create an optimal matching model, and selecting and allocating machines and PPIDs for each wafer batch, that is, each wafer batch selects a machine under the corresponding processing mode, and under stable conditions, it is assumed that each wafer batch is approximately evenly batched into each cavity in the selected PPID, and then the corresponding machine is selected for each wafer batch, and a PPID under the corresponding recipe of the machine is selected.

[0104] The mixed integer programming algorithm is used to construct the objective function of load balancing of each cavity and the optimal number of cavity adjustment tasks as follows:

[0105] Target:

[0106] Design objective function for cavity adjustment task times The purpose is that among the three types of adjustment tasks, the factory generally considers the number of seasonal adjustment types more important. Therefore, when allocating machines and PPIDs, the sum of the number of adjustment tasks of this type needs to be reduced. This helps to reduce the number of seasonal adjustment tasks on each cavity after the second stage of production scheduling to a certain extent.

[0107] The objective function of load balancing for each cavity is designed, and its priority is higher than the priority of the objective function of the number of cavity adjustment tasks. Its purpose is to reduce the risk of finding risky PPID options due to excessive switching of season adjustment tasks on the basis of load balancing.

[0108] Among them, load balancing is reflected in the fact that the difference in the average sub-batch processing time of each cavity is minimal. The objective function is as follows:

[0109] Target: Min (Cmax-Cmin)

[0110] Constraints: Cmax ≥ Load[chamber], ∀chamber

[0111] Cmin≤Load[chamber],∀chamber

[0112] Among them, Load[chamber] represents the load processing time of chamber, Cmax and Cmin represent the maximum and minimum values ​​of the load in all chambers, respectively, and ∀chamber represents any chamber.

[0113] After completing the creation of the objective function, constraints are added, including: allocation uniqueness constraint, allocation coupling constraint and cavity load calculation constraint. Among them, the allocation uniqueness constraint means that each wafer batch can only be allocated one available machine and one PPID, the allocation coupling constraint means that the wafer batch can only select the PPID on the machine if it is allocated to the machine, and the cavity load calculation constraint means that each wafer batch calculates the sum of the number of slices in each cavity according to the average slice distribution of the PPID among each cavity, and obtains the total operating time of each cavity to represent the cavity load. Finally, the optimal matching model is solved to obtain the matching pairs of each wafer batch among all machines and PPIDs, and the only suitable machine and a PPID available for the machine are determined for each wafer batch, that is, a one-to-one match between lot-eqp-PPID. The matching pair is used as the output result of the model and input into the internal cavity scheduling module of the machine in the second stage.

[0114] Step S5: Create the second phase of chamber scheduling instructions, and determine the slice strategy for each wafer batch in each chamber inside the machine based on the allocation strategy and process type transfer matrix, as well as the processing start and end time points of each chamber for each wafer batch.

[0115] In this embodiment, step S5 specifically includes:

[0116] Based on the process type transfer matrix, determine the non-processing state time caused by the conversion between different process types;

[0117] Based on the allocation strategy, non-processing state time and the influencing parameters of each adjustment task, a multi-objective constraint programming model is constructed;

[0118] After optimizing the multi-objectives of the constraint programming model in lexicographic order according to the priority of the multi-objective settings, the constraint programming model is solved according to the constraint conditions of the constraint programming model to obtain the production scheduling plan for each wafer batch to be processed in each cavity inside the machine as a slicing strategy.

[0119] Specifically, create the second-stage internal cavity scheduling instructions of the machine, generate the cavity scheduling tasks, input the matching pairs of all machines and PPIDs for each wafer batch obtained in step S4 into the cavity scheduling tasks of the second stage, and add the influencing parameters affecting each adjustment task, including: non-processing time intervals such as downtime of each machine and cavity, release start time, process type transfer matrix, and remaining trigger condition thresholds of various adjustment tasks and duration of various adjustment tasks. Use the constraint programming scheduling algorithm to create a constraint programming model, solve the constraint programming model, and output the sub-batch slicing plan of each wafer batch in the cavity, as well as the dispatching time point of each cavity for each wafer batch. Figure 3As shown in the figure, the selection scheme of wafer batch lot to machine and PPID obtained in the first stage is directly related to the slicing plan in the second stage, and the sub-batches after slicing of each wafer batch are used as the basic unit of scheduling inside the chamber. Therefore, combined with the actual principle of running wafers inside multi-chamber machines, the chamber is used as the basic unit of scheduling. In addition to considering the number of process type conversions for the decision of wafer batch selection machine and processing path, the running of wafer batches between chambers and the process conversion and load utilization of the chamber dimension are also considered, making the scheduling plan and machine selection plan more practical, more feasible, less risky, and easier to achieve the expected productivity.

[0120] In this embodiment, the multiple objectives of the constraint programming model are set in order to include:

[0121] All wafer batches are scheduled for production as much as possible without exceeding the waiting time limit;

[0122] All cavities need to be processed;

[0123] The number of switching times of the process type set of all chambers is minimal;

[0124] The processing order of wafer sub-lots in all chambers does not violate the priority order.

[0125] The purpose of minimizing the number of adjustment tasks in the first stage is to allocate the least total number of season-type adjustment tasks to the machines and processing paths. The purpose of the second stage is to minimize the number and total time of the three types of adjustment tasks generated by the scheduling sequence. Therefore, the most important goal of the multi-objective constraint programming model in the second stage is to arrange all wafer batches as much as possible. The wafer batches with huge scrap losses are therefore placed first, followed by shortening the completion time and reducing the number of setups generated by the sequence.

[0126] Using the lexicographical method, the solution time is set, and optimization is performed in order from high to low priority of the objectives. The first objective is optimized first, and the solution for optimizing the second objective is found in the optimal solution set of the first objective. This process is repeated and solutions that converge to the minimum value are gradually obtained to obtain the optimal solution that satisfies all objectives.

[0127] In this embodiment, the constraints of the constraint programming model include:

[0128] The wafer batches loaded on each chamber and ready for processing will be at the top of the scheduling order;

[0129] Each wafer batch is processed only in the corresponding tool and cavity in the processing path;

[0130] Each wafer batch processing path is divided into sub-batches equal to the number of cavities;

[0131] The total number of wafers included in each sub-batch divided from each wafer batch shall not exceed the original number of wafers in the wafer batch;

[0132] Each wafer batch starts processing synchronously on multiple chambers in parallel;

[0133] The processing area and non-processing area on each cavity do not overlap each other;

[0134] The processing time of any sub-lot of each wafer lot does not violate the waiting time limit of the wafer lot;

[0135] Subbatches with higher priorities are dispatched before subbatches with lower priorities.

[0136] Therefore, the production scheduling in the chamber dimension makes the production density refined to the chamber dimension, ensuring that the idle time in the chamber dimension is reduced, further improving the load balance between chambers, and thus improving the utilization rate of etching equipment.

[0137] Step S6: Execute the etching scheduling task according to the slicing strategy within the processing time period determined by the processing start and end time points. When the execution time of the etching scheduling task reaches the preset trigger time of the trigger condition of any adjustment task, suspend the etching scheduling task, create a non-processing state instruction for the cavity, and execute the tasks triggered by the adjustment task in the non-processing state in sequence according to the non-processing state instruction, and continue to execute the etching scheduling task after the tasks triggered by the adjustment task are executed.

[0138] Specifically, when the execution time of the etching scheduling task reaches the conditional trigger time of any adjustment task, the etching scheduling system creates a non-processing state instruction for the chamber, and executes different adjustment tasks setup in sequence during the processing time. That is, after the production scheduling plan is solved, the post-processing process of trigger detection of the scheduling task setup and adjustment of the production scheduling plan is carried out. Figure 4 As shown in the figure, wafer batch 1 is split into 4 sub-batches according to the selected PPID (A, B, C, D) and processed in 4 chambers respectively, and the processing interval range obtained by the production scheduling algorithm is very close, so as to ensure that the wafer batch does not stay on the machine for too long; wafer batch 2 and wafer batch 4 have different recipes, which trigger 3 consecutive adjustment tasks setup, and wafer batch 3 and wafer batch 4 have different recipes, which also trigger 2 adjustment tasks setup, and the same length of setup adjustment operations will occur between the sub-batches under this pair of wafer batches on all chambers. Therefore, in addition to the process type conversion, the trigger mechanism of setup is also considered to more perfectly describe the different processing states of the chamber at all times.

[0139] In summary, an embodiment of the present invention provides a production scheduling method for a multi-chamber etching device, which obtains wafer batches, available machine information, and a set of processing paths available for each machine for wafer batches of each process type in an etching parallel processing mode; obtains the average time required for switching between various process types in different adjustment tasks to form a process type transfer matrix, where the adjustment tasks are preparation and adjustment activities generated by process changes, environmental conversions, or testing; generates etching scheduling tasks for wafer batches arriving within a planning period based on the available machine information, and the etching scheduling tasks include machine scheduling tasks in the first stage and chamber scheduling tasks within the machine in the second stage; creates machine scheduling instructions for the first stage, and determines the tasks assigned to the machine. An allocation strategy for a machine and a processing path in a processing path set for each wafer batch; creating a second-stage cavity scheduling instruction, and determining the slicing strategy for sub-batches of each cavity inside the machine for each wafer batch, as well as the processing start and end time points of each cavity for each wafer batch based on the allocation strategy and the process type transfer matrix; executing the etching scheduling task according to the slicing strategy within the processing time period determined by the processing start and end time points, and pausing the etching scheduling task when the execution time of the etching scheduling task reaches the preset trigger time of the trigger condition of any adjustment task, creating a non-processing state instruction for the cavity, and sequentially executing the adjustment tasks triggered in the non-processing state according to the non-processing state instruction, and continuing to execute the etching scheduling task after the adjustment task is executed. In response to the characteristics of large wafer batches and tight production scheduling in the etching parallel mode, the present invention uses a two-stage allocation and scheduling production scheduling algorithm within the planning cycle of the production scheduling algorithm to separate the machine allocation and processing path selection of the wafer batch, as well as the production scheduling and wafer running functions of the machine's internal cavity, thereby simultaneously realizing the dual scheduling tasks of the wafer batch at the machine and cavity levels. It is more suitable for the production scheduling problems of parallel etching groups with large-scale demands, helps shorten the production cycle, and improves the scheduling efficiency of large-scale production.

[0140] Those skilled in the art will appreciate that, in the above method of specific implementation, the order in which the steps are written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of the steps should be determined by their functions and possible internal logic.

[0141] In addition, some embodiments of the present application also provide an electronic device. The electronic device may be a digital computer in various forms, such as a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, etc. The electronic device may also be a mobile device in various forms, such as a personal digital processing, a cellular phone, a smart phone, a wearable device, and other similar computing devices.

[0142] The electronic device comprises: one or more processors; and a memory storing computer program instructions, wherein when the computer program instructions are executed, the processor executes the steps of the production scheduling method for a multi-chamber etching device provided in any one or more of the above embodiments. Figure 5 An exemplary structural diagram of the electronic device is disclosed. Figure 5 As shown, the electronic device includes: one or more processors 1101, a memory 1102, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses and can be installed on a common motherboard or installed in other ways as needed. The processor can process instructions executed in the electronic device, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some other embodiments, if necessary, multiple processors and / or multiple buses can be used with multiple memories and multiple memories. Similarly, multiple electronic devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Among them, the components shown in this article, their connections and relationships, and their functions are only examples, and are not intended to limit the implementation of the present application described and / or required herein.

[0143] The electronic device may further include: an input device 1103 and an output device 1104. The processor 1101, the memory 1102, the input device 1103 and the output device 1104 may be connected via a bus or other means. Figure 5 The example of connecting through bus is taken in the following.

[0144] The input device 1103 can receive input digital or character information, and generate key signal input related to the user settings and function control of the electronic device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator rod, one or more mouse buttons, a trackball, a joystick and other input devices. The output device 1104 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The display device may include, but is not limited to, a liquid crystal display (LCD), a light emitting diode (LED) display and a plasma display. In some embodiments, the display device may be a touch screen.

[0145] To provide interaction with a user, the electronic device may be a computer. The computer has: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball), through which the user can provide input to the computer. Other types of devices may also be used to provide interaction with a user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0146] In an embodiment of the present application, a computer program / instruction is stored on a computer-readable medium, and when the computer program / instruction is executed by a processor, the steps of the production scheduling method of the multi-chamber etching device provided in any one or more of the above embodiments are implemented. The computer-readable medium may be included in the electronic device described in the above embodiments; or it may exist independently without being assembled into the device. The above computer-readable medium carries one or more computer-readable instructions.

[0147] The memory 1102 can be used as a non-transient computer-readable storage medium, which can be used to store non-transient software programs, non-transient computer executable programs and modules. The processor 1101 executes various functional applications and data processing of the server by running the non-transient software programs, instructions and modules stored in the memory 1102, so as to implement the program instructions / modules corresponding to the method provided by any one or more embodiments in the embodiments of the present application.

[0148] The memory 1102 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 1102 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory 1102 may optionally include a memory remotely arranged relative to the processor 1101, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0149] It should be noted that more specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0150] Computer-readable storage media include permanent and non-permanent, removable and non-removable media, and can be implemented by any method or technology to store information. Information can be computer-readable instructions, data structures, modules of programs or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device.

[0151] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0152] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. For example, an application specific integrated circuit (ASIC), a general-purpose computer or any other similar hardware device may be used to implement the embodiments. In some embodiments, the software program of the present application may be executed by a processor to implement the above steps or functions. Similarly, the software program of the present application (including related data structures) may be stored in a computer-readable recording medium, such as a RAM memory, a magnetic or optical drive or a floppy disk and the like. In addition, some steps or functions of the present application may be implemented by hardware, for example, as a circuit that cooperates with a processor to perform various steps or functions.

[0153] The computer program product provided in the embodiment of the present application includes one or more computer programs / instructions, and when the computer program / instructions are executed by the processor, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center to another website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrations. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid state disk (SSD)), etc.

[0154] The flow chart or block diagram in the accompanying drawings shows the possible architecture, function and operation of the equipment, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented with a dedicated system for hardware that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0155] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily mention changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims, and the above embodiments should be regarded as exemplary and non-restrictive.

Claims

1. A production scheduling method for a multi-chamber etching device, characterized in that: include: Obtaining wafer batches, available tool information, and a set of processing paths available to each tool for the wafer batches of each process type in an etching parallel processing mode; Obtaining the average time required for switching between the various process types in different adjustment tasks to form a process type transfer matrix, wherein the adjustment tasks are preparation and adjustment activities generated by process change, environment conversion or testing; Generate an etching scheduling task for the wafer batch arriving within the planning period according to the available machine information, wherein the etching scheduling task includes a machine scheduling task in the first stage and a cavity scheduling task inside the machine in the second stage; Creating a tool scheduling instruction of the first stage, and determining an allocation strategy for one of the tools and one of the processing paths in the processing path set allocated to each of the wafer batches; Creating the cavity scheduling instructions of the second stage, and determining the slicing strategy of each of the wafer batches in each cavity inside the machine for sub-batches, and the processing start and end time points of each cavity for each of the wafer batches based on the allocation strategy and the process type transfer matrix; The etching scheduling task is executed according to the slicing strategy within the processing time period determined by the processing start and end time points; when the execution time of the etching scheduling task reaches the preset trigger time of the trigger condition of any of the adjustment tasks, the etching scheduling task is paused, a non-processing state instruction for the cavity is created, and the adjustment tasks triggered in the non-processing state are executed in sequence according to the non-processing state instruction; and the etching scheduling task is continued to be executed after the adjustment task is executed.

2. The production scheduling method for multi-chamber etching equipment according to claim 1, characterized in that: The step of obtaining the average time required for switching between the various process types in different adjustment tasks to form a process type transfer matrix includes: Obtaining a set of process types to which each process type belongs in different adjustment tasks; For each two different process types, determining a time transfer matrix in different adjustment tasks; According to the time transfer matrix, the adjustment time required for switching between each two sets of process types in different adjustment tasks is obtained and added to obtain a total adjustment time between two sets of process types; For all the process types of the wafer batch, the total adjustment time between two different process types is calculated respectively, and the process type transfer matrix is ​​formed.

3. The production scheduling method for a multi-chamber etching device according to claim 1, characterized in that: The step of creating the tool scheduling instruction of the first stage and determining the allocation strategy of one tool and one processing path in the processing path set allocated to each wafer batch includes: The optimal matching model is established using mixed integer programming algorithm; The difference between the average sub-batch processing time of each cavity and the number of cavity adjustment tasks are used as the objective function of the optimal matching model; The optimal matching model is solved according to the constraints of the optimal matching model, and a solution with the smallest difference in average sub-batch processing time of each cavity is found from the optimal solution set when the number of cavity adjustment tasks is the minimum, as the solution result of the objective function, the solution result includes: one of the machines is assigned to each of the wafer batches, and a processing path is assigned from the processing path set of the machine.

4. The production scheduling method for multi-chamber etching equipment according to claim 3, characterized in that: The constraints of the optimal matching model include: allocation uniqueness constraint, allocation coupling constraint and cavity load calculation constraint.

5. The production scheduling method for multi-chamber etching equipment according to claim 1, characterized in that: The step of creating the cavity scheduling instructions of the second stage, determining the slicing strategy of each cavity for sub-batches of each wafer batch in the machine based on the allocation strategy and the process type transfer matrix, and the processing start and end time points of each cavity for each wafer batch, includes: Based on the process type transfer matrix, determining the non-processing state time generated by the conversion between different process types; Based on the allocation strategy, the non-processing state time and the influencing parameters affecting each of the adjustment tasks, a multi-objective constraint programming model is constructed; After optimizing the multiple objectives of the constraint programming model in lexicographic order according to the priority of the multiple objective settings, the constraint programming model is solved according to the constraint conditions of the constraint programming model to obtain a production scheduling plan for processing each wafer batch in each cavity inside the machine as the slicing strategy.

6. The production scheduling method for multi-chamber etching equipment according to claim 5, characterized in that: The multi-objectives of the constraint programming model are set in order and include: All wafer batches are scheduled for production as much as possible without exceeding the waiting time limit; All cavities need to be processed; The number of switching times of the process type set of all chambers is minimal; The processing order of wafer sub-lots in all chambers does not violate the priority order.

7. The production scheduling method for multi-chamber etching equipment according to claim 5, characterized in that: The constraints of the constraint programming model include: The wafer batch loaded on each chamber and ready for processing will be placed at the first place in the scheduling order; Each of the wafer batches is processed only in the corresponding tool and cavity in the processing path; The processing path of each wafer batch is divided into sub-batches having the same number as the cavities; The total number of wafers included in each of the sub-batches divided from each of the wafer batches does not exceed the original number of wafers in the wafer batch; Each of the wafer batches starts processing synchronously on a plurality of the parallel cavities; The processing area and the non-processing area on each cavity do not overlap each other; The processing time of any of the sub-lots of each of the wafer lots does not violate the waiting time limit of the wafer lot; The sub-batches with higher priorities are dispatched before the sub-batches with lower priorities.

8. An electronic device, characterized in that: The electronic device comprises: One or more processors; and a memory storing computer program instructions, wherein the computer program instructions, when executed by the processor, implement the steps of the production scheduling method for a multi-chamber etching device as described in any one of claims 1-7.

9. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instructions are executed by a processor, the steps of the production scheduling method for a multi-chamber etching device as described in any one of claims 1 to 7 are implemented.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of the production scheduling method for a multi-chamber etching device as described in any one of claims 1 to 7 are implemented.

Images