Current detection device, calibration method and electronic equipment
By using a probe module to conduct the detection resistor voltage signal in the current detection device and using a calibration module to improve the detection accuracy, the detection error problem caused by wire extraction in the prior art is solved, and a higher current detection accuracy is achieved.
Patent Information
- Application Number
- CN202310721476.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-16
- Publication Date
- 2024-12-17
AI Technical Summary
The existing magnetic current detection method requires the lead to lead out of the wire, which leads to test errors caused by parasitic inductors and series resistance, and the detection accuracy is not high.
A current detection device is designed, including a probe module, a signal processing board and an isopotential wire. The voltage signals at both ends of the detection resistor are transmitted through the probe module. The signal processing board includes a detection module and a calibration module to reduce the influence of parasitic inductance and Improve detection accuracy through calibration.
The detection resistor voltage signal is obtained through the probe, which reduces the impact of parasitic inductance on measurement. The detection module is calibrated through the calibration module, which significantly improves the accuracy of current detection.
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Figure CN119147815A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of detection technology, and in particular to a current detection device and calibration method, and electronic equipment. Background Art
[0002] The existing method of using magnetic force to detect current calculates the current by detecting the magnitude of the magnetic force generated by the wire. However, this method requires a lead wire to be drawn from the printed circuit board assembly (PCBA) and placed in a magnetic force detection loop. The lead wire is connected in series in the circuit to be measured, and the parasitic inductance and series resistance of the lead wire will cause test errors, resulting in low detection accuracy. Summary of the invention
[0003] The present disclosure provides a current detection device and calibration method, and electronic equipment, the main purpose of which is to improve the detection accuracy of current detection.
[0004] According to a first aspect of the present disclosure, there is provided a current detection device, the device comprising: a probe module, a signal processing board and an equipotential line;
[0005] The probe module is electrically connected to the signal processing board and is used to conduct the voltage signal across the detection resistor to the signal processing board, wherein the detection resistor is placed in the detected circuit;
[0006] The signal processing board includes: a detection module and a calibration module;
[0007] The detection module is electrically connected to the probe module and is used to detect the voltage signal;
[0008] The calibration module is electrically connected to the detection module and is used to calibrate the detection module;
[0009] The equipotential line is electrically connected to the ground line of the signal processing board, and is used to connect the ground line of the detected circuit to the ground line of the signal processing board at the same potential.
[0010] Optionally, the probe module includes a metal probe and a probe distance adjustment roller;
[0011] The metal probe is connected to the probe distance adjusting roller;
[0012] The metal probe is used to transmit the voltage signal at both ends of the detection resistor to the signal processing board; the probe distance adjustment roller is used to adjust the pin spacing of the metal probe.
[0013] Optionally, the detection module includes: at least three low-pass filters, at least two amplifiers, a metal probe interface and a connector;
[0014] At least three of the low-pass filters are electrically connected to at least two of the amplifiers alternately, wherein the starting position and the ending position are the low-pass filters; the metal probe interface is electrically connected to the input end of the low-pass filter at the starting position; one end of the connector is electrically connected to the output end of the low-pass filter at the ending position;
[0015] The metal probe interface is used to transmit the voltage signal of the detection resistor to the low-pass filter; the low-pass filter is used to limit the signal bandwidth input to the amplifier and the connector; the amplifier is used to amplify the voltage signal of the detection resistor; and the connector is used to output the detection signal to an external device.
[0016] Optionally, the amplifier includes: at least one differential amplifier and at least one operational amplifier;
[0017] The differential amplifier is used to amplify the differential signal output by the low-pass filter and output a differential signal or a single-ended signal;
[0018] The operational amplifier is used to amplify the single-ended signal output by the low-pass filter.
[0019] Optionally, the calibration module includes: a detection unit, a switching unit and a control unit;
[0020] The detection unit is electrically connected to the output end of the amplifier in the detection module and the control unit respectively; the switching unit is electrically connected to the input end of the amplifier in the amplifying circuit; the control unit is electrically connected to the detection unit, the switching unit and the amplifier in the detection module respectively;
[0021] The detection unit is used to detect the output signal of the amplifier in the detection module, wherein the output signal includes the single-ended signal and the differential signal; the switching unit is used to switch the detection object of the detection unit in response to the control instruction of the control unit; the control unit is used to adjust the reference voltage of the amplifier according to the detection result of the detection unit, and control the switching of the detection object of the detection unit.
[0022] Optionally, the detection unit includes: a multiplexer, a differential amplifier, a low-pass filter and an analog-to-digital converter;
[0023] One end of the multiplexer is electrically connected to the output end of the amplifier in the detection module; the input end of the differential amplifier is electrically connected to the other end of the multiplexer; the output end of the differential amplifier is electrically connected to the input end of the low-pass filter; the output end of the low-pass filter is electrically connected to the input end of the analog-to-digital converter; the output end of the analog-to-digital converter is electrically connected to the control unit;
[0024] The multiplexer is used to import output signals of different amplifiers in the detection module.
[0025] Optionally, the switching unit includes: at least one conversion switch;
[0026] One end of the conversion switch is electrically connected to the input end of the amplifier in the detection module, and the other end is electrically connected to the control unit.
[0027] Optionally, the control unit includes: a main controller, a digital-to-analog converter, an operational amplifier and a low-pass filter;
[0028] The main controller is electrically connected to the output end of the analog-to-digital converter, the input end of the digital-to-analog converter and the other end of the multiplexer respectively; the output end of the digital-to-analog converter is electrically connected to the input end of the operational amplifier; the input end of the low-pass filter is electrically connected to the output end of the digital-to-analog converter; the output end of the low-pass filter is electrically connected to the amplifier in the detection module;
[0029] The main controller is used to control and adjust the reference voltage applied to the amplifier so as to calibrate the detection module.
[0030] Optionally, the device further comprises: a connection module;
[0031] The connection module includes a data connection line and an external connector;
[0032] One end of the data connection line is electrically connected to the connector in the signal processing board for transmitting the single-ended information to the external connector;
[0033] The external connector is electrically connected to the other end of the data connection line and is used to transmit the single-ended information to the external device.
[0034] According to a second aspect of the present disclosure, a method for calibrating a current detection device is provided, wherein the current detection device is the device described in the first aspect, and the method comprises:
[0035] respectively detecting the maximum offset voltage of the amplifier in the detection module;
[0036] Based on the detection result and the preset threshold, determining whether the amplifier has passed the detection;
[0037] When the amplifier passes the detection, the detection module is calibrated.
[0038] Optionally, determining whether the amplifier passes the detection based on the detection result and a preset threshold value includes:
[0039] If the detection result is greater than the preset threshold, determining that the amplifier detection fails;
[0040] If the detection result is less than or equal to the preset threshold, it is determined that the amplifier detection has passed.
[0041] Optionally, when the amplifier passes the detection, calibrating the detection module includes:
[0042] determining a reference voltage applied to the amplification circuit;
[0043] The detection module is calibrated based on the reference voltage.
[0044] According to a third aspect of the present disclosure, there is provided an electronic device, including:
[0045] at least one processor; and
[0046] a memory communicatively connected to the at least one processor; wherein,
[0047] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method described in the second aspect.
[0048] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method described in the second aspect.
[0049] According to a fifth aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the method as described in the second aspect above.
[0050] The present disclosure provides a current detection device and calibration method, and an electronic device, wherein the device includes: a probe module, a signal processing board, and an equipotential line; the probe module is electrically connected to the signal processing board, and is used to conduct the voltage signal at both ends of the detection resistor to the signal processing board, wherein the detection resistor is placed in the detected circuit; the signal processing board includes: a detection module and a calibration module; the detection module is electrically connected to the probe module, and is used to detect the voltage signal; the calibration module is electrically connected to the detection module, and is used to calibrate the detection module; the equipotential line is electrically connected to the grounding line of the signal processing board, and is used to connect the grounding line of the detected circuit to the grounding line of the signal processing board at the same potential. Compared with the related art, the present disclosure obtains the voltage signal at both ends of the detection resistor through the probe, which can reduce the influence of parasitic inductance on the measurement; the detection module is calibrated by the calibration module, thereby improving the detection accuracy.
[0051] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.
[0053] Figure 1 A schematic diagram of the structure of a current detection device provided by an embodiment of the present disclosure;
[0054] Figure 2 A schematic diagram of a signal processing board provided by an embodiment of the present disclosure;
[0055] Figure 3 A flow chart of a method for calibrating a current detection circuit provided by an embodiment of the present disclosure;
[0056] Figure 4 A flow chart of another method for calibrating a current detection circuit provided by an embodiment of the present disclosure;
[0057] Figure 5 A schematic block diagram of an exemplary electronic device provided for an embodiment of the present disclosure. DETAILED DESCRIPTION
[0058] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0059] The current detection device, calibration method, and electronic device according to the embodiments of the present disclosure are described below with reference to the accompanying drawings.
[0060] Figure 1 A schematic diagram of the structure of a current detection device provided in an embodiment of the present disclosure.
[0061] like Figure 1 As shown, the device includes: a probe module 11, a signal processing board 12 and an equipotential line 13.
[0062] The probe module 11 is electrically connected to the signal processing board 12 and is used to transmit the voltage signal across the detection resistor to the signal processing board 12, wherein the detection resistor is placed in the detected circuit.
[0063] In an embodiment of the present disclosure, by placing a detection resistor in the detected circuit, the magnitude of the current in the current circuit can be obtained according to the voltage signal across the detection resistor. Optionally, in order to reduce the influence of the detection resistor on the detected circuit, the resistance value of the detection resistor can be in the milliohm level. The long straight metal probe in the probe module 11 conducts the voltage signal across the detection resistor to the signal processing board 12. It can be understood that if a soft metal wire is used, its parasitic inductance is much greater than that of a metal probe; especially after the metal wire has been bent for many times.
[0064] In some embodiments of the present disclosure, a material with high conductive efficiency and low resistance is used as a metal probe of the probe module.
[0065] As an example, Figure 2 As shown, the signal processing board 12 includes: a detection module 121 and a calibration module 122;
[0066] The detection module 121 is Figure 2 The portion contained in the virtual frame in the middle upper portion is electrically connected to the probe module 11 and is used to detect the voltage signal;
[0067] The calibration module 122 is Figure 2 The portion contained in the virtual frame in the middle and lower part is electrically connected to the detection module 121 and is used to calibrate the detection module 121 .
[0068] In the embodiment of the present disclosure, the detection module 121 generates a corresponding voltage value according to the voltage signal conducted by the probe module 11. Since the resistance of the detection resistor is relatively small, the voltage across it will also be relatively small. Therefore, it is necessary to set an amplifier in the detection module to amplify the voltage signal. However, due to the inherent characteristics of the amplifier, both its input and output have offset voltages; the offset voltage will cause measurement errors in the detection module, so the detection module needs to be calibrated.
[0069] The calibration module can reduce the influence of the amplifier in the detection module on the measurement accuracy by calibrating the detection module, thereby improving the detection accuracy of the current detection device.
[0070] In some embodiments of the present disclosure, the detection module directly generates a corresponding current value according to the measured voltage value.
[0071] The equipotential line 13 is electrically connected to the ground line of the signal processing board 12, and is used to connect the ground line of the detected circuit to the ground line of the signal processing board at the same potential.
[0072] In the embodiment of the present disclosure, when detecting the detected circuit, it is necessary to connect the equipotential line 13 to the ground line of the detected circuit, so as to achieve equipotential connection between the signal processing board 12 and the detected circuit. The current detection device can detect both the high-side current and the low-side current.
[0073] The present disclosure provides a current detection device, the device comprising: a probe module, a signal processing board and an equipotential line; the probe module is electrically connected to the signal processing board, and is used to conduct the voltage signal at both ends of the detection resistor to the signal processing board, wherein the detection resistor is placed in the detected circuit; the signal processing board comprises: a detection module and a calibration module; the detection module is electrically connected to the probe module, and is used to detect the voltage signal; the calibration module is electrically connected to the detection module, and is used to calibrate the detection module; the equipotential line is electrically connected to the grounding line of the signal processing board, and is used to connect the grounding line of the detected circuit to the grounding line of the signal processing board at the same potential. Compared with the related art, the present disclosure obtains the voltage signal at both ends of the detection resistor through the probe, which can reduce the influence of parasitic inductance on the measurement; the detection module is calibrated by the calibration module, thereby improving the detection accuracy.
[0074] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 1 As shown, the probe module 11 includes a metal probe 111 and a probe distance adjustment roller 112;
[0075] The metal probe 111 is connected to the probe distance adjustment roller 112;
[0076] The metal probe 111 is used to transmit the voltage signal at both ends of the detection resistor to the signal processing board 12 ; the probe distance adjustment roller 112 is used to adjust the pin spacing of the metal probe 111 .
[0077] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the detection module 121 includes: at least three low-pass filters, at least two amplifiers, a metal probe interface 1211 and a connector 1212;
[0078] At least three of the low-pass filters are electrically connected to at least two of the amplifiers alternately, wherein the starting position and the ending position are the low-pass filters; the metal probe interface is electrically connected to the input end of the low-pass filter at the starting position; one end of the connector is electrically connected to the output end of the low-pass filter at the ending position;
[0079] The metal probe interface 1211 is used to transmit the voltage signal of the detection resistor to the low-pass filter; the low-pass filter is used to limit the signal bandwidth input to the amplifier and the connector; the amplifier is used to amplify the voltage signal of the detection resistor; the connector 1212 is used to output the detection signal to an external device.
[0080] Specifically in the embodiments of the present disclosure, please refer to Figure 2 The detection module 121 is composed of the devices in the dotted box in the upper part, including: a metal probe interface 1211 (Probe1 / Probe2), which is used to conduct the voltage across the detection resistor; a low-pass filter 1213 (LPF1), which is used to limit the bandwidth of the signal entering AMP1; a differential amplifier 1214 (AMP1), which is used to amplify the differential signal of INP2 and INN2 and output the differential signal; a low-pass filter 1215 (LPF2), which is used to limit the bandwidth of the signal entering AMP2; a differential amplifier 1216 (AMP2), which is used to amplify the differential signal of INP4 and INN4 and output a single-ended signal; a low-pass filter 1217 (LPF3), which is used to limit the bandwidth of the signal entering AMP3; an operational amplifier 1218 (AMP3), which is used to amplify the IN6 signal; a low-pass filter 1219 (LPF4), which is used to limit the bandwidth of the output signal; and a connector 1212, which is used to connect a data transmission line.
[0081] Further, in a possible implementation of the embodiment of the present disclosure, the amplifier includes: at least one differential amplifier and at least one operational amplifier;
[0082] The differential amplifier is used to amplify the differential signal output by the low-pass filter and output a differential signal or a single-ended signal;
[0083] The operational amplifier is used to amplify the single-ended signal output by the low-pass filter.
[0084] Specifically in the embodiment of the present disclosure, the principle of the detection module 121 is analyzed as follows:
[0085] Probe1, Probe2, LPF1, AMP1, LPF2, AMP2, LPF3, AMP3, LPF4, and Connector together constitute a signal amplification circuit (detection module 121).
[0086] The sense resistor is Rs mΩ and the current is Is. Then the input differential voltage of AMP1 is,
[0087] ΔV 1 =V INP2 -V INN2 =V INP1 -V INN1 =I s R s ---(1)
[0088] ΔV 1 =I s R s ---(2)
[0089] The gain of AMP1 is G1, so the input differential voltage of AMP2 is,
[0090] ΔV 2 =V INP4 -V INN4 =V INP3 -V INN3 =G 1 ΔV 1 ---(3)
[0091] ΔV 2 =G 1 I s R s ---(4)
[0092] The gain of AMP2 is G2, and the voltage at the REF terminal is Vref. Then the input voltage of AMP3 is,
[0093] ΔV 3 =V IN6 =V IN5 =G 2 ΔV 2 +V ref ---(5)
[0094] ΔV 3 =G 2 G 1 I s R s +V ref ---(6)
[0095] The gain of AMP3 is G3, so the output voltage Vo is,
[0096] V o =V IN7 =G 3 ΔV 3 ---(7)
[0097] V o =G 3 G 2 G 1 I s R s +G 3 V ref ---(8)
[0098] Vo is given to external terminal devices for display calculation.
[0099] When Is is 0, Vo should output 0, that is, Vref should be 0 at this time. Due to the inherent characteristics of the amplifier, its input and output have offset voltage / offset voltage, resulting in that when Is is 0, Vo output is not 0. At this time, a zero calibration circuit is required to adjust Vref so that Vo output is 0. That is,
[0100] V o =G 3 G 2 G 1 I s R s ---(9)
[0101] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the calibration module 122 is composed of the components in the dashed box below, including: a detection unit 1221, a switching unit 1222 and a control unit 1223;
[0102] The detection unit 1221 is electrically connected to the output end of the amplifier in the detection module 121 and the control unit 1223 respectively; the switching unit 1222 is electrically connected to the input end of the amplifier in the amplifying circuit; the control unit 1223 is electrically connected to the detection unit 1221, the switching unit 1222 and the amplifier in the detection module 121 respectively;
[0103] The detection unit 1221 is used to detect the output signal of the amplifier in the detection module 121, wherein the output signal includes the single-ended signal and the differential signal; the switching unit 1222 is used to switch the detection object of the detection unit 1221 in response to the control instruction of the control unit; the control unit 1223 is used to adjust the reference voltage of the amplifier according to the detection result of the detection unit 1221, and control the switching of the detection object of the detection unit 1221.
[0104] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the detection unit 1221 includes: a multiplexer 12211, a differential amplifier 12212, a low-pass filter 12213 and an analog-to-digital converter 12214;
[0105] One end of the multiplexer 12211 is electrically connected to the output end of the amplifier in the detection module 121; the input end of the differential amplifier 12212 is electrically connected to the other end of the multiplexer 12211; the output end of the differential amplifier 12212 is electrically connected to the input end of the low-pass filter 12213; the output end of the low-pass filter 12213 is electrically connected to the input end of the analog-to-digital converter 12214; the output end of the analog-to-digital converter 12214 is electrically connected to the control unit 1223;
[0106] The multiplexer 12211 is used to import output signals of different amplifiers in the detection module 121 .
[0107] Specifically in the embodiments of the present disclosure, please refer to Figure 2 , multiplexer 12211 (MUX) is used to conduct different input signals; differential amplifier 12212 (AMP4) is used to amplify the signal conducted by MUX and output a single-ended signal; AMP4 uses a low-bandwidth zero-drift high-precision amplifier, and its offset voltage and noise are much smaller than AMP1, AMP2, and AMP3; low-pass filter 12213 (LPF5) is used to limit the bandwidth of analog-to-digital converter 12214 (ADC); analog-to-digital converter 12214 (ADC) is used to convert the output signal of AMP4 into a digital signal and transmit it to the main controller.
[0108] The control unit 1223 obtains the output signal of the output end of each amplifier in the detection module 121 by controlling the multiplexer 12211. It should be noted that the number of multiplexer ports in the present disclosure needs to be determined according to the number of amplifiers in the detection module 121, and the embodiment of the present disclosure does not constitute a limitation on the number of multiplexer connections.
[0109] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2As shown, the switching unit 1222 includes: at least one conversion switch;
[0110] One end of the conversion switch is electrically connected to the input end of the amplifier in the detection module, and the other end is electrically connected to the control unit.
[0111] Specifically, in the embodiment of the present disclosure, the switching unit 1222 includes a conversion switch 12221 (SW1) for short-circuiting INP2 and INN2 to GND; a conversion switch 12222 (SW2) for short-circuiting INP4 and INN4 to GND; and a conversion switch 12223 (SW3) for short-circuiting IN6 to GND. It should be noted that in the embodiment of the present disclosure, the switching switch is determined according to the number of amplifiers in the detection module 121, and the embodiment of the present disclosure does not constitute a limitation on the number of switching switches.
[0112] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 2 As shown, the control unit 1223 includes: a main controller 12231, a digital-to-analog converter 12232, an operational amplifier 12233 and a low-pass filter 12234;
[0113] The main controller 12231 is electrically connected to the output end of the analog-to-digital converter 12214, the input end of the digital-to-analog converter 12232 and the other end of the multiplexer 12211 respectively; the output end of the digital-to-analog converter 12232 is electrically connected to the input end of the operational amplifier 12233; the input end of the low-pass filter 12234 is electrically connected to the output end of the digital-to-analog converter 12232; the output end of the low-pass filter 12234 is electrically connected to the amplifier in the detection module 121;
[0114] The main controller 12231 is used to control and adjust the reference voltage applied to the amplifier so as to calibrate the detection module 121 .
[0115] Specifically, in the embodiment of the present disclosure, the digital-to-analog converter 12232 (DAC) is used to convert the digital signal output by the main controller 12231 (Processor) into an analog signal and output it to the operational amplifier 12233 (AMP5); the operational amplifier 12233 (AMP5) amplifies the voltage output by the DAC and then outputs it; AMP5 uses a low-bandwidth zero-drift high-precision amplifier, whose offset voltage and noise are much smaller than AMP1, AMP2, and AMP3; the sixth low-pass filter (LPF6) is used to limit the bandwidth of the AMP5 output;
[0116] AMP2, MUX, AMP4, LPF5, ADC, DAC, AMP5, LPF6, SW1, SW2, SW3, Processor, Keys, Leds, and Display together constitute a zero adjustment calibration circuit (calibration module 122).
[0117] The input and output offset voltages of AMP1 are Vosi1 and Voso1, the input and output offset voltages of AMP2 are Vosi2 and Voso2, and the input and output offset voltages of AMP3 are Vosi3 and Voso3.
[0118] Input offset voltage and output offset voltage are independent parameters and need to be calculated separately.
[0119] Taking the offset voltage into account, recalculate equations (4), (6), and (8):
[0120] ΔV 2+os =G 1 (I s R s +V osi1 )+V oso1 ---(10)
[0121] ΔV 3+os =G 2 [G 1 (I s R s +V osi1 )+V oso1 +V osi2 ]+V oso2 +V ref ---(11)
[0122] V o+os =G 3 {G2[G1(IsRs+Vosi1)+Voso1+Vosi2]+Voso2+Vref+Vosi3]Voso3---(12)
[0123] The formula (12) is:
[0124] V a+os =G 3 G 2 G 1 I s R s +G 3 G 2 G 1 V osi1 +G 3 G 2 V oso1 +G 3 G 2V osi2 +G 3 V oso2 +G 3 V osi3 +V oso3 +G 3 V ref ---(13)
[0125] The goal of the calibration circuit is to make equation (9) and equation (13) equal, that is,
[0126] G 3 G 2 G 1 V osi1 +G 3 G 2 V oso1 +G 3 G 2 V osi2 +G 3 V oso2 +G 3 V osi3 +V oso3 +G 3 V ref =0---(14)
[0127] By adjusting Vref, equation (14) can be realized:
[0128]
[0129] The maximum offset voltage of the amplifier can be directly obtained, which can be used as a criterion for judging the performance of the amplifier. If it is detected that the offset voltage of a certain amplifier is too large, it can be considered that the system is in a fault state.
[0130] Specifically, in some embodiments of the present disclosure, the signal processing board also includes: Keys, buttons for inputting control signals and controlled by the processor; LEDs, indicator lights, used to indicate the control status and controlled by the processor; Display, display for displaying information and controlled by the processor; BAT Interface, battery interface for connecting the battery; DCInterface, DC interface for connecting the external DC power supply.
[0131] Further, in a possible implementation of the embodiment of the present disclosure, the device further includes: a connection module 14;
[0132] The connection module 14 includes a data connection line 141 and an external connector 142;
[0133] One end of the data connection line 141 is electrically connected to the connector in the signal processing board 12 for transmitting the single-ended information to the external connector 142;
[0134] The external connector 142 is electrically connected to the other end of the data connection line 141 for transmitting the single-ended information to the external device.
[0135] Corresponding to the above-mentioned current detection device, the embodiment of the present disclosure also provides a method for calibrating the current detection device. Since the embodiment of the present disclosure corresponds to the embodiment of the above-mentioned current detection device, the details not disclosed in the embodiment can be referred to the above-mentioned embodiment, and will not be repeated in the embodiment of the present disclosure.
[0136] Figure 3 A schematic flow chart of a method for calibrating a current detection device provided in an embodiment of the present disclosure.
[0137] like Figure 3 As shown, the method comprises the following steps:
[0138] Step 201 : Detect the maximum offset voltage of the amplifier in the detection module respectively.
[0139] Step 202: Determine whether the amplifier has passed the test based on the test result and a preset threshold.
[0140] In the embodiments of the present disclosure, since the amplifier has an offset voltage, it will affect the measurement accuracy of the amplifier circuit; and when the amplifier is damaged, the offset voltage of the amplifier will further affect the measurement accuracy of the amplifier circuit. Therefore, it is necessary to detect the amplifier in the amplifier circuit. The offset voltage of the amplifier is used as a performance standard to measure the amplifier. When the offset voltage is too large, it means that the amplifier is faulty or damaged, and it is determined that the amplifier test fails.
[0141] Step 203: If the amplifier passes the detection, calibrate the detection module.
[0142] In the embodiment of the present disclosure, when the amplifier detection is passed, in order to reduce the error caused by the offset voltage on the measurement, it is necessary to calibrate the amplifier circuit. The offset voltage is calibrated by adjusting the reference voltage in the amplifier circuit.
[0143] The present disclosure provides a method for calibrating a current detection device, which can improve the accuracy of detection. The device includes: a probe module, a signal processing board and an equipotential line; the probe module is electrically connected to the signal processing board, and is used to conduct the voltage signal at both ends of the detection resistor to the signal processing board, wherein the detection resistor is placed in the detected circuit; the signal processing board includes: a detection module and a calibration module; the detection module is electrically connected to the probe module, and is used to detect the voltage signal; the calibration module is electrically connected to the detection module, and is used to calibrate the detection module; the equipotential line is electrically connected to the ground wire of the signal processing board, and is used to connect the ground wire of the detected circuit to the ground wire of the signal processing board at the same potential. Compared with the related art, the present disclosure obtains the voltage signal at both ends of the detection resistor through the probe, which can reduce the influence of parasitic inductance on the measurement; the detection module is calibrated by the calibration module, thereby improving the accuracy of detection.
[0144] Figure 4 A schematic flow chart of another method for calibrating a current detection device provided in an embodiment of the present disclosure.
[0145] like Figure 4 As shown, the method comprises the following steps:
[0146] Step 301 : Detect the maximum offset voltage of the amplifier in the detection module respectively.
[0147] Step 302: If the detection result is greater than the preset threshold, it is determined that the amplifier detection fails.
[0148] Step 303: If the detection result is less than or equal to the preset threshold, it is determined that the amplifier detection has passed.
[0149] Specifically, in the embodiment of the present disclosure, the offset voltage of AMP1 is detected. The processor controls SW1 to short INP2 and INN2 to GND; the processor controls MUX to connect INP4 and INN4. The gain of AMP4 is G4, and the output of AMP4 is,
[0150] ΔV 4 =G 4 (G 1 V osi1 +V oso1 )---(16)
[0151] The ADC converts the value and outputs it to the Processor.
[0152] The maximum offset voltage at the output of AMP1 is,
[0153] V osmaxamp1 =G1 V osimax1 +V osomax1 ---(17)
[0154] The processor compares ΔV4 with Vosmaxamp1. If
[0155] ΔV 4 >G 4 V osmaxamp1 ---(18)
[0156] Then AMP1 self-test fails. Otherwise, it passes.
[0157] Detect the offset voltage of AMP2. The processor controls SW2 to short INP4 and INN4 to GND; the processor controls MUX to connect IN6. The gain of AMP4 is G4, so the output of AMP4 is,
[0158] ΔV 4 =G 4 (G 2 V osi2 +V oso2 )---(19)
[0159] The ADC converts the value and outputs it to the Processor.
[0160] The maximum offset voltage at the output of AMP2 is,
[0161] V osmaxamp2 =G 2 V osimax2 +V osomax2 ---(20)
[0162] The processor compares ΔV4 with Vosmaxamp2. If
[0163] ΔV 4 >G 4 V osmaxamp2 ---(twenty one)
[0164] Then AMP2 self-test fails. Otherwise, it passes.
[0165] Detect the offset voltage of AMP3. The processor controls SW3 to short IN6 to GND; the processor controls MUX to turn on Vo. The gain of AMP4 is G4, so the output of AMP4 is,
[0166] ΔV 4 =G 4 (G 3 V osi3 +V oso3 )---(twenty two)
[0167] The ADC converts the value and outputs it to the Processor.
[0168] The maximum offset voltage of AMP3 output is,
[0169] V osmaxamp3 =G 3 V osimax3 +V osomax3 ---(twenty three)
[0170] The processor compares ΔV4 with Vosmaxamp3. If
[0171] ΔV 4 >G 4 V osmaxamp3 ---(twenty four)
[0172] Then the AMP3 self-test fails. Otherwise it passes.
[0173] Step 304: determine a reference voltage applied to the amplifier circuit.
[0174] Step 305: calibrate the detection module based on the reference voltage.
[0175] Specifically, in the embodiment of the present disclosure, the processor controls SW1 to short-circuit INP2 and INN2 to GND; the processor controls MUX to turn on Vo, and the voltage of Vo is Voat1.
[0176] Before calibration, that is, Vref is 0, according to formula (13), we have
[0177] V oatl =G 3 V os2 +G 3 V osi3 +V oso3 ---(25)
[0178] Where Vos2 is the total offset voltage output by AMP2, as shown in the following formula:
[0179] V os2 =G 3 G 2 G 1 V osi1 +G 3 G 2 V oso1 +G 3 G 2 V osi2 +G 3 V oso2 ---(26)
[0180] After calibration, there are
[0181]
[0182] According to formula (25) and (27), we have
[0183] 0 = V oatl +G 3 V ref ---(28)
[0184] Vref should be,
[0185]
[0186] Processor reads ADC and sets DAC.
[0187] The gain of AMP4 is G4, so the input of ADC is,
[0188] V adc =G 4 V oatl ---(30)
[0189] The gain of AMP4 is G5, so the output of DAC is,
[0190]
[0191] For the processor, the ratio of the setting value for the DAC and the value read from the ADC is,
[0192]
[0193] It should be noted that the embodiments of the present disclosure may include multiple steps. For the convenience of description, these steps are numbered, but these numbers do not limit the execution time slots or execution order between the steps; these steps can be implemented in any order, and the embodiments of the present disclosure do not limit this.
[0194] It should be noted that the above explanation of the device embodiment is also applicable to the method of this embodiment, and the principle is the same, which is no longer limited in this embodiment.
[0195] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.
[0196] Figure 5A schematic block diagram of an example electronic device 400 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0197] like Figure 5 As shown, the device 400 includes a computing unit 401, which can perform various appropriate actions and processes according to a computer program stored in a ROM (Read-Only Memory) 402 or a computer program loaded from a storage unit 408 to a RAM (Random Access Memory) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An I / O (Input / Output) interface 405 is also connected to the bus 404.
[0198] A number of components in the device 400 are connected to the I / O interface 405, including: an input unit 406, such as a keyboard, a mouse, etc.; an output unit 407, such as various types of displays, speakers, etc.; a storage unit 408, such as a disk, an optical disk, etc.; and a communication unit 409, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 409 allows the device 400 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0199] The computing unit 401 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a CPU (Central Processing Unit), a GPU (Graphic Processing Units), various dedicated AI (Artificial Intelligence) computing chips, various computing units running machine learning model algorithms, a DSP (Digital Signal Processor), and any appropriate processor, controller, microcontroller, etc. The computing unit 401 performs the various methods and processes described above, such as a method for calibrating a current detection circuit. For example, in some embodiments, the method for calibrating a current detection circuit may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 408. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 400 via the ROM 402 and / or the communication unit 409. When the computer program is loaded into the RAM 403 and executed by the computing unit 401, one or more steps of the method described above may be performed. Alternatively, in other embodiments, the calculation unit 401 may be configured to execute the aforementioned current detection circuit calibration method in any other appropriate manner (for example, by means of firmware).
[0200] Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, FPGAs (Field Programmable Gate Arrays), ASICs (Application-Specific Integrated Circuits), ASSPs (Application Specific Standard Products), SOCs (System On Chips), CPLDs (Complex Programmable Logic Devices), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that may be executed and / or interpreted on a programmable system including at least one programmable processor that may be a dedicated or general-purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0201] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0202] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a RAM, a ROM, an EPROM (Electrically Programmable Read-Only-Memory) or a flash memory, an optical fiber, a CD-ROM (Compact Dis sc Read-Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0203] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (Cathode-Ray Tube) or LCD (Liquid Crystal Display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball), through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0204] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: LAN (Local Area Network), WAN (Wide Area Network), the Internet, and blockchain networks.
[0205] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship between the client and the server is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services ("Virtual Private Server", or "VPS" for short). The server may also be a server of a distributed system, or a server combined with a blockchain.
[0206] It should be noted that artificial intelligence is a discipline that studies how computers can simulate certain human thought processes and intelligent behaviors (such as learning, reasoning, thinking, planning, etc.), and includes both hardware-level and software-level technologies. Artificial intelligence hardware technologies generally include technologies such as sensors, dedicated artificial intelligence chips, cloud computing, distributed storage, and big data processing; artificial intelligence software technologies mainly include computer vision technology, speech recognition technology, natural language processing technology, as well as machine learning / deep learning, big data processing technology, knowledge graph technology, and other major directions.
[0207] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0208] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A current detection device, It is characterized in that The device comprises: a probe module, a signal processing board and an equipotential line; The probe module is electrically connected to the signal processing board and is used to conduct the voltage signal across the detection resistor to the signal processing board, wherein the detection resistor is placed in the detected circuit; The signal processing board includes: a detection module and a calibration module; The detection module is electrically connected to the probe module and is used to detect the voltage signal; The calibration module is electrically connected to the detection module and is used to calibrate the detection module; The equipotential line is electrically connected to the ground line of the signal processing board, and is used to connect the ground line of the detected circuit to the ground line of the signal processing board at the same potential.
2. The device according to claim 1, It is characterized in that The probe module includes a metal probe and a probe distance adjustment roller; The metal probe is connected to the probe distance adjusting roller; The metal probe is used to transmit the voltage signal at both ends of the detection resistor to the signal processing board; the probe distance adjustment roller is used to adjust the pin spacing of the metal probe.
3. The device according to claim 1, It is characterized in that The detection module includes: at least three low-pass filters, at least two amplifiers, a metal probe interface and a connector; At least three of the low-pass filters are electrically connected to at least two of the amplifiers alternately, wherein the starting position and the ending position are the low-pass filters; the metal probe interface is electrically connected to the input end of the low-pass filter at the starting position; one end of the connector is electrically connected to the output end of the low-pass filter at the ending position; The metal probe interface is used to transmit the voltage signal of the detection resistor to the low-pass filter; the low-pass filter is used to limit the signal bandwidth input to the amplifier and the connector; the amplifier is used to amplify the voltage signal of the detection resistor; and the connector is used to output the detection signal to an external device.
4. The device according to claim 3, It is characterized in that The amplifier includes: at least one differential amplifier and at least one operational amplifier; The differential amplifier is used to amplify the differential signal output by the low-pass filter and output a differential signal or a single-ended signal; The operational amplifier is used to amplify the single-ended signal output by the low-pass filter.
5. The device according to claim 1 or 4, It is characterized in that The calibration module includes: a detection unit, a switching unit and a control unit; The detection unit is electrically connected to the output end of the amplifier in the detection module and the control unit respectively; the switching unit is electrically connected to the input end of the amplifier in the amplifying circuit; the control unit is electrically connected to the detection unit, the switching unit and the amplifier in the detection module respectively; The detection unit is used to detect the output signal of the amplifier in the detection module, wherein the output signal includes the single-ended signal and the differential signal; the switching unit is used to switch the detection object of the detection unit in response to the control instruction of the control unit; the control unit is used to adjust the reference voltage of the amplifier according to the detection result of the detection unit, and control the switching of the detection object of the detection unit.
6. The device according to claim 5, It is characterized in that The detection unit includes: a multiplexer, a differential amplifier, a low-pass filter and an analog-to-digital converter; One end of the multiplexer is electrically connected to the output end of the amplifier in the detection module; the input end of the differential amplifier is electrically connected to the other end of the multiplexer; the output end of the differential amplifier is electrically connected to the input end of the low-pass filter; the output end of the low-pass filter is electrically connected to the input end of the analog-to-digital converter; the output end of the analog-to-digital converter is electrically connected to the control unit; The multiplexer is used to import output signals of different amplifiers in the detection module.
7. The device according to claim 5, It is characterized in that The switching unit includes: at least one conversion switch; One end of the conversion switch is electrically connected to the input end of the amplifier in the detection module, and the other end is electrically connected to the control unit.
8. The device according to claim 5, It is characterized in that The control unit includes: a main controller, a digital-to-analog converter, an operational amplifier and a low-pass filter; The main controller is electrically connected to the output end of the analog-to-digital converter, the input end of the digital-to-analog converter and the other end of the multiplexer respectively; the output end of the digital-to-analog converter is electrically connected to the input end of the operational amplifier; the input end of the low-pass filter is electrically connected to the output end of the digital-to-analog converter; the output end of the low-pass filter is electrically connected to the amplifier in the detection module; The main controller is used to control and adjust the reference voltage applied to the amplifier so as to calibrate the detection module.
9. The device according to claim 1 or 3, It is characterized in that The device further comprises: a connection module; The connection module includes a data connection line and an external connector; One end of the data connection line is electrically connected to the connector in the signal processing board for transmitting the single-ended information to the external connector; The external connector is electrically connected to the other end of the data connection line and is used to transmit the single-ended information to the external device.
10. A method for calibrating a current detection device, It is characterized in that The current detection device is a device according to any one of claims 1 to 9, and the method comprises: respectively detecting the maximum offset voltage of the amplifier in the detection module; Based on the detection result and the preset threshold, determining whether the amplifier has passed the detection; When the amplifier passes the detection, the detection module is calibrated.
11. The method according to claim 10, It is characterized in that The determining whether the amplifier passes the detection based on the detection result and the preset threshold value includes: If the detection result is greater than the preset threshold, determining that the amplifier detection fails; If the detection result is less than or equal to the preset threshold, it is determined that the amplifier detection has passed.
12. The method according to claim 10, It is characterized in that When the amplifier passes the detection, calibrating the detection module includes: determining a reference voltage applied to the amplification circuit; The detection module is calibrated based on the reference voltage.
13. An electronic device, It is characterized in that include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 10 to 12.
