NMOS (N-channel metal oxide semiconductor) tube driving circuit, system and device based on microprocessor

Abstract

The invention discloses an NMOS (N-channel Metal Oxide Semiconductor) tube driving circuit, system and device based on a microprocessor, and relates to the technical field of electronic circuits, the driving circuit comprises a voltage regulating circuit, a pulse generating circuit and a booster circuit which are connected in sequence; the pulse generation circuit comprises a second PNP triode, a third NPN triode, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a microprocessor; the output end of the voltage regulating circuit is connected with one end of the third resistor and the emitter of the second PNP triode; the collector electrode of the second PNP triode is used as the output end of the pulse generation circuit; the other end of the third resistor is connected with the base electrode of the second PNP triode and one end of the fourth resistor. According to the invention, the designed pulse generating circuit is matched with the microprocessor to generate the pulse signal, a basis is provided for subsequent driving work, and the actual demand is met on the premise of effectively controlling the cost.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a microprocessor-based NMOS tube driving circuit, system and device. Background Art

[0002] When the NMOS tube outputs high side, the gate voltage driving the NMOS needs to be higher than the drain voltage. Only when it is higher than its conduction threshold voltage can the NMOS tube be turned on. To make the NMOS tube fully turned on, the conduction threshold voltage is generally about 10V, that is, the gate voltage must be about 10V higher than the drain voltage. Only when the MOS tube is fully turned on, its internal resistance is small and it will not heat up. Only when it is fully turned on can the damage to the tube be reduced.

[0003] At present, most of the body control uses high-side output smart MOS tubes. Smart MOS integrates the tube drive circuit. For the tube user, the drive only needs to give a level signal, but the price of smart MOS tubes is high and the selection is poor. If ordinary MOS tubes are used and the external MOS tube high-side drive circuit is designed separately, the cost can be effectively reduced and the selection is rich. However, there is no technology that can meet the above requirements at this stage.

[0004] Therefore, in order to meet practical needs, a microprocessor-based NMOS tube driving technology is now provided. Summary of the invention

[0005] In view of the defects existing in the prior art, the purpose of the present invention is to provide a microprocessor-based NMOS tube driving circuit, system and device, which generates a pulse signal by cooperating with the microprocessor through the designed pulse generating circuit, thereby providing a basis for subsequent driving work and meeting actual needs under the premise of effectively controlling costs.

[0006] In order to achieve the above purpose, the technical solution adopted by the present invention is:

[0007] In a first aspect, the present application provides a microprocessor-based NMOS tube driving circuit, the driving circuit comprising a voltage regulating circuit, a pulse generating circuit, and a boosting circuit connected in sequence;

[0008] The pulse generating circuit includes a second PNP transistor, a third NPN transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a microprocessor;

[0009] The output end of the voltage regulating circuit is connected to one end of the third resistor and the emitter of the second PNP transistor;

[0010] The collector of the second PNP transistor is connected to one end of the seventh resistor and serves as the output end of the pulse generating circuit, and the other end of the seventh resistor is grounded;

[0011] The other end of the third resistor is connected to the base of the second PNP transistor and one end of the fourth resistor;

[0012] The other end of the fourth resistor is connected to the collector of the third NPN transistor;

[0013] The output end of the microprocessor is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third NPN transistor;

[0014] The other end of the sixth resistor and the emitter of the third NPN transistor are both grounded.

[0015] On the basis of the above technical solution, the voltage regulating circuit includes a first resistor, a second resistor, a third diode and a first NPN transistor;

[0016] One end of the first resistor is connected to the collector of the first NPN transistor and a power supply end;

[0017] The other end of the first resistor is connected to the base of the first NPN transistor, one end of the second resistor and the cathode of the third diode;

[0018] The anode of the third diode and the other end of the second resistor are both grounded;

[0019] The transmitter of the first NPN transistor serves as the output end of the voltage regulating circuit.

[0020] On the basis of the above technical solution, the boost circuit includes a second capacitor, a second diode, a first diode and a third capacitor;

[0021] One end of the second capacitor is connected to the output end of the pulse generating circuit;

[0022] The other end of the second capacitor is connected to the cathode of the second diode and the anode of the first diode;

[0023] The anode of the second diode is connected to the power supply terminal;

[0024] The cathode of the first diode is connected to one end of the capacitor to form the output end of the boost circuit.

[0025] On the basis of the above technical solution, the circuit further includes:

[0026] The gate drive switch circuit has an input end connected to the output end of the boost circuit.

[0027] On the basis of the above technical solution, the gate drive switch circuit includes a plurality of switch circuits connected in parallel.

[0028] Based on the above technical solution, the third diode is a voltage regulator diode.

[0029] Based on the above technical solution, the voltage of the power supply end is 12V or 24V or 48V.

[0030] In a second aspect, the present application provides a microprocessor-based NMOS tube driving system, the system comprising: a shell having a receiving cavity formed therein, and the microprocessor-based NMOS tube driving circuit mentioned in the first aspect, which is arranged in the shell.

[0031] In a third aspect, the present application provides a microprocessor-based NMOS tube driving device, wherein the microprocessor-based NMOS tube driving device comprises the microprocessor-based NMOS tube driving system mentioned in the second aspect.

[0032] Compared with the prior art, the advantages of the present invention are:

[0033] The present invention generates a pulse signal by cooperating with a microprocessor through a designed pulse generating circuit, which provides a basis for subsequent driving work and meets actual needs under the premise of effectively controlling costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 The figure is a schematic diagram of the structure of a microprocessor-based NMOS tube driving circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0037] The embodiments of the present invention are further described in detail below with reference to the accompanying drawings.

[0038] The embodiments of the present application provide a microprocessor-based NMOS tube driving circuit, system and device, which generates a pulse signal through a designed pulse generating circuit in conjunction with a microprocessor, thereby providing a basis for subsequent driving work and meeting actual needs while effectively controlling costs.

[0039] In order to achieve the above technical effects, the overall idea of ​​this application is as follows:

[0040] A microprocessor-based NMOS tube driving circuit, the driving circuit comprising a voltage regulating circuit, a pulse generating circuit, and a boosting circuit connected in sequence;

[0041] The pulse generating circuit includes a second PNP transistor, a third NPN transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a microprocessor;

[0042] The output end of the voltage regulating circuit is connected to one end of the third resistor and the emitter of the second PNP transistor;

[0043] The collector of the second PNP transistor is connected to one end of the seventh resistor and serves as the output end of the pulse generating circuit, and the other end of the seventh resistor is grounded;

[0044] The other end of the third resistor is connected to the base of the second PNP transistor and one end of the fourth resistor;

[0045] The other end of the fourth resistor is connected to the collector of the third NPN transistor;

[0046] The output end of the microprocessor is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third NPN transistor;

[0047] The other end of the sixth resistor and the emitter of the third NPN transistor are both grounded.

[0048] The embodiments of the present application are further described in detail below in conjunction with the accompanying drawings.

[0049] First, see Figure 1 As shown, an embodiment of the present application provides a microprocessor-based NMOS tube driving circuit, wherein the driving circuit includes a voltage regulating circuit, a pulse generating circuit, and a boosting circuit connected in sequence;

[0050] The pulse generating circuit includes a second PNP transistor, a third NPN transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a microprocessor;

[0051] The output end of the voltage regulating circuit is connected to one end of the third resistor and the emitter of the second PNP transistor;

[0052] The collector of the second PNP transistor is connected to one end of the seventh resistor and serves as the output end of the pulse generating circuit, and the other end of the seventh resistor is grounded;

[0053] The other end of the third resistor is connected to the base of the second PNP transistor and one end of the fourth resistor;

[0054] The other end of the fourth resistor is connected to the collector of the third NPN transistor;

[0055] The output end of the microprocessor is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third NPN transistor;

[0056] The other end of the sixth resistor and the emitter of the third NPN transistor are both grounded.

[0057] It should be noted that in order to deal with the technical problems mentioned above and to reliably drive the NMOS tube, the gate drive voltage and drain voltage must have a constant voltage. No matter how the input voltage changes, the gate drive voltage must be higher than the drain voltage by a full conduction voltage, but cannot be higher than the full conduction voltage limit voltage, which is generally around 20 V. Taking a 24V system vehicle as an example, it is necessary to adapt to the power supply voltage in an environment of 18V to 32V to work normally. In this way, the gate drive voltage is required to follow the voltage change and always be higher than and only higher than the full conduction voltage.

[0058] The embodiment of the present application generates a pulse signal by cooperating with a microprocessor through a designed pulse generating circuit, thereby providing a basis for subsequent driving work and meeting actual needs under the premise of effectively controlling costs.

[0059] Further, the voltage regulating circuit includes a first resistor, a second resistor, a third diode and a first NPN transistor;

[0060] One end of the first resistor is connected to the collector of the first NPN transistor and a power supply end;

[0061] The other end of the first resistor is connected to the base of the first NPN transistor, one end of the second resistor and the cathode of the third diode;

[0062] The anode of the third diode and the other end of the second resistor are both grounded;

[0063] The transmitter of the first NPN transistor serves as the output end of the voltage regulating circuit.

[0064] Further, the boost circuit includes a second capacitor, a second diode, a first diode and a third capacitor;

[0065] One end of the second capacitor is connected to the output end of the pulse generating circuit;

[0066] The other end of the second capacitor is connected to the cathode of the second diode and the anode of the first diode;

[0067] The anode of the second diode is connected to the power supply terminal;

[0068] The cathode of the first diode is connected to one end of the capacitor to form the output end of the boost circuit.

[0069] Furthermore, the circuit further comprises:

[0070] The gate drive switch circuit has an input end connected to the output end of the boost circuit.

[0071] Furthermore, the gate drive switch circuit includes a plurality of switch circuits connected in parallel.

[0072] Furthermore, the third diode is a voltage regulator diode.

[0073] Furthermore, the voltage (VC) of the power supply end is 12V or 24V or 48V.

[0074] As shown in the attached figure of the specification Figure 1 As shown, the voltage at the power supply end is recorded as VC, and the output voltage of the voltage regulating circuit is recorded as VTH;

[0075] The first resistor is denoted as R1, the second resistor is denoted as R2, the third diode is denoted as D3, and the first NPN transistor is denoted as Q1;

[0076] The second PNP transistor is denoted as Q2, the third NPN transistor is denoted as Q3, the third resistor is denoted as R3, the fourth resistor is denoted as R4, the fifth resistor is denoted as R5, the sixth resistor is denoted as R6, the seventh resistor is denoted as R7, and the microprocessor signal is denoted as MCU-PWM;

[0077] The second capacitor is denoted as C2, the second diode is denoted as D2, the first diode is denoted as D1, and the third capacitor is denoted as C3;

[0078] The gate drive switch circuit includes a plurality of switch circuits connected in parallel, which are respectively denoted as K1, K2, ..., Kn.

[0079] Based on the technical solution of the embodiment of the present application, combined with the accompanying drawings of the specification Figure 1The specific contents are as follows:

[0080] The first part of the attached drawings of the specification, namely the voltage regulating circuit, is mainly used to generate a stable voltage based on the VC voltage at the power supply end. Even if the VC voltage fluctuates, the output voltage VTH generated by it is also a fixed voltage value. The voltage regulating circuit is used to provide a voltage with a constant voltage difference. If necessary, other forms of voltage stabilizing circuits can be used as a substitute.

[0081] The voltage value of VTH is smaller than the regulated voltage of the third diode, and the specific voltage difference is 0.7V. The first resistor R1 and the second resistor R2 are both used as voltage divider resistors.

[0082] The fourth part of the drawings of the specification, namely the pulse generating circuit, generates a pulse signal, which is generated by the MCU, the peak-to-peak value of the pulse voltage is VTH, which is controlled by the microprocessor MCU_PWM, and the frequency is determined by the microprocessor MCU_PWM signal;

[0083] The second part of the accompanying drawings of the specification, namely the boost circuit, has the main purpose of boosting a constant voltage based on the VC voltage, and the constant voltage is determined by the peak-to-peak value of the pulse voltage VTH and the frequency.

[0084] The working process of the boost circuit is as follows:

[0085] The pulse signal generated by the pulse generating circuit enters the cathode of the second diode D2 through the second capacitor C2, and the VC voltage also enters the cathode of the second diode D2 through D2 (if the second diode D2 is made of silicon material, the voltage drops by about 0.7V). When the pulse signal voltage is 0V low level, the voltage at the positive end of D1 is about VC voltage, and when the pulse signal voltage is VTH high level, the voltage at the positive end of D1 is about VC+VTH voltage. In this way, the pulse signal at the cathode of the second diode D2 is superimposed on the VC voltage.

[0086] After filtering by the first diode D1 and the third capacitor C3, the pulse signal is converted into a DC signal, and the voltage at this time is higher than the VC voltage, that is, boosting occurs.

[0087] In the third part of the drawings of the specification, the gate drive switch circuit may include a plurality of switch circuits connected in parallel, and the switch circuit may be a plurality of electronic switches.

[0088] It should be noted that the advantages of the technical solution of the embodiment of the present application are:

[0089] The pulse signal generating method of the above-mentioned pulse generating circuit is relatively simple, but it needs to be completed by the microprocessor MCU. The MCU generates the PMW pulse, and the switching circuit (Q2, Q3, R3, R4, R5, R6) completes the pulse amplitude amplification (also called the amplitude amplification circuit), and the peak-to-peak value is amplified to VTH. The amplitude amplification circuit can also be completed by a device integrating NPN tubes, PNP tubes and resistors, which can form a smaller space and device.

[0090] Furthermore, in actual use, the technical solution of the embodiment of the present application can generate a voltage with a constant voltage difference relative to the power supply voltage VC, and change with the change of the VC voltage;

[0091] In addition, multiple NMOS tubes can be powered and driven centrally.

[0092] In a second aspect, an embodiment of the present application provides a microprocessor-based NMOS tube driving system, the system comprising: a shell having a receiving cavity formed therein, and the microprocessor-based NMOS tube driving circuit mentioned in the first aspect, which is arranged in the shell.

[0093] The NMOS tube high-side drive system provided in the embodiment of the present application and the NMOS tube high-side drive circuit mentioned in the first aspect have the same technical solutions, solved technical problems and obtained technical effects at the technical principle level, and will not be elaborated here.

[0094] In a third aspect, an embodiment of the present application provides a microprocessor-based NMOS tube driving device, wherein the microprocessor-based NMOS tube driving device includes the microprocessor-based NMOS tube driving system mentioned in the second aspect.

[0095] The NMOS tube high-side driving device provided in the embodiment of the present application and the NMOS tube high-side driving circuit mentioned in the first aspect and the NMOS tube high-side driving system mentioned in the second aspect have the same technical solutions, solved technical problems and obtained technical effects at the technical principle level, and will not be elaborated here.

[0096] In the description of the present application, it should be noted that the terms "upper", "lower", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. Unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0097] It should be noted that, in this application, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0098] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

Claims

1. A microprocessor-based NMOS tube driving circuit, characterized in that: The driving circuit comprises a voltage regulating circuit, a pulse generating circuit and a voltage boosting circuit connected in sequence; The pulse generating circuit includes a second PNP transistor, a third NPN transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and a microprocessor; The output end of the voltage regulating circuit is connected to one end of the third resistor and the emitter of the second PNP transistor; The collector of the second PNP transistor is connected to one end of the seventh resistor and serves as the output end of the pulse generating circuit, and the other end of the seventh resistor is grounded; The other end of the third resistor is connected to the base of the second PNP transistor and one end of the fourth resistor; The other end of the fourth resistor is connected to the collector of the third NPN transistor; The output end of the microprocessor is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third NPN transistor; The other end of the sixth resistor and the emitter of the third NPN transistor are both grounded.

2. The microprocessor-based NMOS tube driving circuit according to claim 1, characterized in that: The voltage regulating circuit includes a first resistor, a second resistor, a third diode and a first NPN transistor; One end of the first resistor is connected to the collector of the first NPN transistor and a power supply end; The other end of the first resistor is connected to the base of the first NPN transistor, one end of the second resistor and the cathode of the third diode; The anode of the third diode and the other end of the second resistor are both grounded; The transmitter of the first NPN transistor serves as the output end of the voltage regulating circuit.

3. The microprocessor-based NMOS tube driving circuit according to claim 1, characterized in that: The third diode is a voltage regulator diode.

4. The microprocessor-based NMOS tube driving circuit according to claim 1, characterized in that: The boost circuit includes a second capacitor, a second diode, a first diode and a third capacitor; One end of the second capacitor is connected to the output end of the pulse generating circuit; The other end of the second capacitor is connected to the cathode of the second diode and the anode of the first diode; The anode of the second diode is connected to the power supply terminal; The cathode of the first diode is connected to one end of the capacitor to form the output end of the boost circuit.

5. The microprocessor-based NMOS tube driving circuit according to claim 1, characterized in that: The circuit further comprises: The gate drive switch circuit has an input end connected to the output end of the boost circuit.

6. The microprocessor-based NMOS transistor driving circuit according to claim 5, characterized in that: The gate driving switch circuit includes a plurality of switch circuits connected in parallel.

7. The microprocessor-based NMOS transistor driving circuit according to claim 2, characterized in that: The voltage of the power supply end is 12V or 24V or 48V.

8. A microprocessor-based NMOS tube driving system, characterized in that: include: A shell having a receiving cavity formed therein, and the microprocessor-based NMOS tube driving circuit according to any one of claims 1 to 7 are arranged in the shell.

9. A microprocessor-based NMOS tube driving device, characterized in that: The microprocessor-based NMOS tube driving device includes the system described in claim 8.

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