Balanced power synthesis unit

Through the design of the balanced power synthesis unit, the magnetic coupling and resonant cavity of the main and secondary coils are used to solve the problems of low output power and low efficiency in the prior art, and a high-efficiency and high-power power amplifier is realized, and a high-efficiency and high-power power amplifier is reduced. Harmonic rejection is extended to multiple power synthesis.

CN119254173APending Publication Date: 2025-01-03XIDIAN UNIV
View PDF 0 Cites 1 Cited by

Patent Information

Application Number
CN202411317550.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-20
Publication Date
2025-01-03

AI Technical Summary

Technical Problem

The output power of existing microwave/mm wave silicon-based power amplifiers is small and it is difficult to achieve high efficiency at the same time. The traditional series and parallel power synthesis technology has the disadvantages of low efficiency and large area.

Method used

A balanced power synthesis unit is designed, through the magnetic coupling connection between the main and secondary coils, combined with the resonant cavity, to realize symmetrical four-channel input signal differential to single-ended and multiple series-parallel hybrid power synthesis, reducing the input port Impedance is unbalanced, reducing area.

Benefits of technology

It realizes high-efficiency and high-power Class F, inverse Class F, and Class J silicon-based power amplifiers, which improves output power and efficiency, effectively suppresses harmonics, and expands to more power synthesis.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119254173A_ABST
    Figure CN119254173A_ABST
Patent Text Reader

Abstract

The invention relates to a balanced power synthesis unit. The balanced power synthesis unit comprises Mn layer metal and (Mn + 1) layer metal, a primary coil is integrated on the Mn layer of metal, a secondary coil is integrated on the (Mn + 1) layer of metal, a first signal and a second signal are connected to the two ends of the first side of the primary coil respectively, and a third signal and a fourth signal are connected to the two ends of the second side of the primary coil; the first signal and the second signal are a pair of differential signals, and the third signal and the fourth signal are a pair of differential signals. According to the technical scheme, the problem of unbalanced impedance of different input ports is reduced by utilizing the structural design of the symmetrical balanced power synthesis unit, the area is relatively small, and multi-path input signal differential-to-single-ended and multi-path series-parallel hybrid power synthesis can be realized; based on the balanced power synthesis unit, high-efficiency and high-power silicon-based power amplifiers such as F-type, inverse F-type and J-type silicon-based power amplifiers can be realized, and harmonic suppression is realized.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a balanced power synthesis unit. Background Art

[0002] With the development of modern wireless communication systems such as satellite communications, radars, base stations, etc., microwave / millimeter wave power amplifiers with high integration, high output power, high efficiency and low cost have become an urgent need nowadays. In the existing low-voltage silicon-based process, the saturation power of a single MOSFET limits the output power of the power amplifier. However, the output power of the existing microwave / millimeter wave silicon-based power amplifier is usually small, and it is difficult to achieve watt-level output power and high efficiency at the same time. In order to increase the output power, on-chip multi-channel power synthesis technology is used. In order to increase the output power, the existing technical solutions include stacked power amplifiers, multi-channel power synthesis and other technologies. For example, the traditional series power synthesis technology: the traditional series power synthesis technology improves the output power by combining the power of multiple CMOS sub-power amplifiers through on-chip multi-channel transformers. The output of multiple power amplifiers with left and right differentials is combined in series to increase the output power. At the same time, it can play the role of impedance matching and impedance transformation; there is also the traditional parallel power synthesis technology: the difference between this parallel power synthesis technology and the series power synthesis is that the grounding and output tap of the secondary coil are in the center of the layout, and the balance of the parallel power synthesis technology has been improved to a certain extent compared with the series power synthesis technology. It is not difficult to see that the existing technical solutions generally have disadvantages such as low efficiency and large area. Summary of the invention

[0003] In order to solve the above problems existing in the prior art, the present invention provides a balanced power synthesis unit.

[0004] According to a first aspect of an embodiment of the present invention, a balanced power synthesis unit is provided, the method comprising: the balanced power synthesis unit comprising: a first n Layer Metal and M n+1 layer of metal; the Mth n The primary coil is integrated on the metal layer. n+1 A secondary coil is integrated on the metal layer, and the first and second signals are connected to the two ends of the first side of the primary coil respectively, and the third and fourth signals are connected to the two ends of the second side of the primary coil; the first signal and the second signal are a pair of differential signals, and the third signal and the fourth signal are a pair of differential signals.

[0005] Optionally, the balanced power synthesis unit further includes: an n-th layer via hole Via n .

[0006] Optionally, the nth layer via hole Via n For connecting the M n layer metal and the Mth n+1 Layer of metal.

[0007] Optionally, the primary coil and the secondary coil are connected via magnetic coupling.

[0008] Optionally, a first end of the secondary coil is grounded, and a second end of the secondary coil outputs a target signal.

[0009] Optionally, the balanced power synthesis unit further includes: a resonant cavity; the resonant cavity is connected to the center of the primary coil.

[0010] Optionally, the resonant cavity includes: a capacitor, a first inductor, and a second inductor; the first end of the first inductor is connected to the center of the primary coil, the second end of the first inductor is connected to the first plate of the capacitor, the second end of the first inductor is connected to the first end of the second inductor, the second plate of the capacitor is grounded, and the second end of the second inductor is connected to a voltage source.

[0011] Optionally, the resonant cavity is used to implement a class F power amplifier.

[0012] The technical solution provided by the present invention may include the following beneficial effects:

[0013] Through the above technical scheme, the problem of unbalanced impedance of different input ports is reduced by utilizing the symmetrical balanced power synthesis unit structure design, and the unit has a smaller area, and can realize four-way input signal differential conversion to single-ended and multi-way serial-parallel mixed power synthesis. Based on the balanced power synthesis unit, it can be expanded to more than four-way input signal differential conversion to single-ended and multi-way serial-parallel mixed power synthesis. Based on the balanced power synthesis unit, high-efficiency and high-power Class F, inverse Class F, Class J and other silicon-based power amplifiers can be realized, and harmonic suppression can be achieved.

[0014] Other features and advantages of the present invention will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present invention but do not constitute a limitation of the present invention. In the accompanying drawings:

[0016] Figure 1 The diagram is a layout of a balanced power synthesis unit according to an exemplary embodiment.

[0017] Figure 2The diagram is a layout diagram showing a case where a balanced power synthesis unit is used in a class F power amplifier according to an exemplary embodiment.

[0018] Figure 3 The invention is a circuit diagram showing a case where a balanced power synthesis unit is used in a class F power amplifier according to an exemplary embodiment.

[0019] Figure 4 The diagram is a schematic diagram showing an impedance difference of an input port when a balanced power synthesis unit is used in a class F power amplifier according to an exemplary embodiment.

[0020] Figure 5 The figure is a schematic diagram showing an input port impedance difference of a conventional power synthesis according to an exemplary embodiment.

[0021] Figure 6 It is a circuit diagram showing another circuit when a balanced power synthesis unit is used in a class F power amplifier according to an exemplary embodiment.

[0022] Figure 7 The diagram is a schematic diagram showing the suppression effect of a balanced power synthesis unit on second harmonics and third harmonics according to an exemplary embodiment.

[0023] Figure 8 The diagram is a layout diagram showing a case where a balanced power synthesis unit is used in a class J power amplifier according to an exemplary embodiment.

[0024] Fig. 9 The invention is a circuit diagram showing a case where a balanced power synthesis unit is used in a class J power amplifier according to an exemplary embodiment. DETAILED DESCRIPTION

[0025] Figure 1 is a layout diagram of a balanced power synthesis unit according to an exemplary embodiment, such as Figure 1 As shown, the balanced power synthesis unit includes: n Layer Metal and M n+1 Layer metal; Mth n The primary coil is integrated on the metal layer, and the Mth n+1 A secondary coil is integrated on the metal layer, the first and second signals are connected to the two ends of the first side of the primary coil respectively, and the third and fourth signals are connected to the two ends of the second side of the primary coil; the first and second signals are a pair of differential signals, and the third and fourth signals are a pair of differential signals.

[0026] Optionally, the balanced power synthesis unit further includes: an n-th layer via hole Via n .

[0027] Optionally, the nth layer via Vian For connecting the M n Layer Metal and M n+1 Layer of metal.

[0028] It is understandable that the M n Layer Metal and M n+1 Layer metal is the metal in the chip, such as Figure 1 As shown, the red part is the Mth n The main coil is integrated on the red part, and the blue part is the Mth layer in the chip. n+1 The secondary coil is integrated on the blue part, and the orange part represents the via of the nth layer. n, , the nth layer via n, The red part of the M n Layer metal and blue part M n+1 Layers of metal connected.

[0029] Optionally, the primary coil and the secondary coil are connected via magnetic coupling.

[0030] Alternatively, if Figure 1 As shown, a first end of the secondary coil is grounded, and a second end of the secondary coil outputs a target signal.

[0031] Optionally, in one embodiment, Figure 2 is a layout diagram showing a balanced power synthesis unit used in a class F power amplifier according to an exemplary embodiment. Figure 3 FIG. 1 is a circuit diagram showing a balanced power synthesis unit used in a class F power amplifier according to an exemplary embodiment. Figure 3 As shown, the balanced power synthesis unit further includes: a resonant cavity; the resonant cavity is connected to the center of the primary coil.

[0032] Optionally, the resonant cavity includes: a capacitor, a first inductor and a second inductor; the first end of the first inductor is connected to the center of the primary coil, the second end of the first inductor is connected to the first plate of the capacitor, the second end of the first inductor is connected to the first end of the second inductor, the second plate of the capacitor is grounded, and the second end of the second inductor is connected to the voltage source.

[0033] Optionally, the resonant cavity is used to implement a class F power amplifier.

[0034] It can be understood that input 1+ and input 1-, input 2+ and input 2-, input 3+ and input 3-, input 4+ and input 4- are four pairs of differential signals. The primary coil and secondary coil of the power synthesis use two layers of thick metal respectively. The center tap of the primary coil is punched to connect the capacitor and the wiring is led out. Figure 3The first inductor in the middle resonant cavity is absorbed by the wiring at high frequencies. Due to its good layout symmetry, the impedance imbalance of each input port is effectively reduced. At the same time, the resonant cavity composed of wiring and capacitors presents low resistance at the second harmonic frequency, which can effectively suppress the second harmonic of the signal; high resistance is achieved at the third harmonic, and better third harmonic suppression is achieved. In addition, the balanced power synthesis unit in the present invention has a smaller area and realizes 8-way power synthesis, which improves the passive efficiency of power synthesis and improves the output power and efficiency of the power amplifier. The balanced power synthesis technology can also be expanded to more power synthesis Class F power amplifiers.

[0035] Figure 4 is a schematic diagram showing an impedance difference of an input port when a balanced power synthesis unit is used in a class F power amplifier according to an exemplary embodiment. Figure 4 As shown, it can be seen that in the power synthesis high-frequency circuit from DC to 60GHz, the impedance difference of the differential port is always kept within ±1 ohm. Figure 5 It is a schematic diagram of the impedance difference of the input ports of a traditional power synthesis according to an exemplary embodiment. The impedance difference of the differential port reaches more than 15 ohms. It can be seen that the port impedance balance of the balanced power synthesis is far better than the traditional solution.

[0036] Figure 6 is a circuit diagram showing another example of using a balanced power synthesis unit for a class F power amplifier according to an exemplary embodiment. Figure 7 FIG. 1 is a schematic diagram showing the suppression effect of a balanced power synthesis unit on second harmonics and third harmonics according to an exemplary embodiment. In a power amplifier composed of the balanced power synthesis unit, due to its excellent impedance balance and the resonant cavity at the center tap, the suppression effect on the second harmonics and third harmonics is as follows: Figure 7 As shown, the suppression effect on the second harmonic is close to 70dBc, and the effect on the third harmonic is higher than 40dBc. In this embodiment, the area for realizing eight-way power synthesis at a frequency of 15GHz is only 140μm*520μm. The 0.13um CMOSSOI process 11.2-17.5GHz 8-way power synthesis F class power amplifier designed based on this power synthesis technology has an output power of 30.3dBm at 14GHz and a power added efficiency of 32%. At present, there is no CMOS power amplifier that can simultaneously achieve high power (>1W), high efficiency (PAE>30%), and an operating frequency greater than 10GHz.

[0037] It is worth mentioning that when applied to multi-channel power synthesis Class F / inverse Class F power amplifiers, two balanced power synthesis units can be connected in series to increase the output power of the power amplifier; and a resonant cavity can be added at the center tap of the synthesis unit to achieve low impedance of the second harmonic and high impedance of the third harmonic, thereby improving the efficiency of the power amplifier and reducing the requirements for the filter.

[0038] In one embodiment, Figure 8 is a layout diagram showing a balanced power synthesis unit used in a class J power amplifier according to an exemplary embodiment. Fig. 9 is a circuit diagram showing a balanced power synthesis unit used in a class J power amplifier according to an exemplary embodiment, wherein the inductor and capacitor at the output end play a matching role at the fundamental frequency, such as Figure 8 As shown in the figure, a hole is punched at the center tap of the primary coil to lead out the wiring. Fig. 9 In the figure, input 1+ and input 1-, input 2+ and input 2-, input 3+ and input 3-, input 4+ and input 4- are four pairs of differential signals, and the inductance at the output end is absorbed by the wiring at high frequencies. Due to its good layout balance, the impedance imbalance of each input port is effectively reduced. At the same time, in the second harmonic frequency band, based on the good balance, its input impedance can be analyzed through odd and even modes to approach zero, thereby achieving the effect of a class J power amplifier. The balanced power synthesis unit proposed in the present invention achieves the effect of power synthesis with a smaller area, improves the passive efficiency of power synthesis, and improves the output power and efficiency of the power amplifier. The balanced power synthesis technology can also be expanded to more power synthesis class J power amplifiers.

[0039] It is worth mentioning that when applied to a multi-channel power synthesis Class J power amplifier, two power synthesis units are connected in parallel to increase the output power and further improve the balance of the input impedance. For the second harmonic frequency band, based on the good balance, the input impedance can be analyzed through odd and even modes to find that it approaches zero, thereby realizing a Class J power amplifier and improving the efficiency of the power amplifier.

[0040] Through the above technical scheme, the problem of unbalanced impedance of different input ports is reduced by utilizing the symmetrical balanced power synthesis unit structure design, and it has a smaller area, and can realize differential conversion of multiple input signals to single-ended and multi-channel serial-parallel hybrid power synthesis. Based on the balanced power synthesis unit, high-efficiency and high-power Class F, inverse Class F, Class J and other silicon-based power amplifiers can be realized, and harmonic suppression can be achieved.

[0041] The preferred embodiments of the present invention are described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, a variety of simple modifications can be made to the technical solution of the present invention, and these simple modifications all belong to the protection scope of the present invention.

[0042] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

[0043] In addition, various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the present invention, they should also be regarded as the contents disclosed by the present invention.

Claims

1. A balanced power synthesis unit, characterized in that: The balanced power synthesis unit comprises: n Layer Metal and M n+1 layer of metal; the Mth n The primary coil is integrated on the metal layer. n+1 A secondary coil is integrated on the metal layer, and the first and second signals are connected to the two ends of the first side of the primary coil respectively, and the third and fourth signals are connected to the two ends of the second side of the primary coil; the first signal and the second signal are a pair of differential signals, and the third signal and the fourth signal are a pair of differential signals.

2. The balanced power synthesis unit according to claim 1, characterized in that: The balanced power synthesis unit further includes: an n-th layer via n .

3. The balanced power synthesis unit according to claim 2, characterized in that: The nth layer via n For connecting the M n layer metal and the Mth n+1 Layer of metal.

4. The balanced power synthesis unit according to claim 1, characterized in that: The primary coil and the secondary coil are connected via magnetic coupling.

5. The balanced power synthesis unit according to claim 1, characterized in that: A first end of the secondary coil is grounded, and a second end of the secondary coil outputs a target signal.

6. The balanced power synthesis unit according to claim 1, characterized in that: The balanced power synthesis unit further includes: a resonant cavity; the resonant cavity is connected to the center of the primary coil.

7. The balanced power synthesis unit according to claim 6, characterized in that: The resonant cavity includes: a capacitor, a first inductor and a second inductor; the first end of the first inductor is connected to the center of the primary coil, the second end of the first inductor is connected to the first plate of the capacitor, the second end of the first inductor is connected to the first end of the second inductor, the second plate of the capacitor is grounded, and the second end of the second inductor is connected to a voltage source.

8. The balanced power synthesis unit according to claim 6, characterized in that: The resonant cavity is used to realize a class F power amplifier.

Citation Information

Cited By

  • Digital power amplifier array and control method thereof

    CN120128111A