Display panel and display device

Abstract

The invention provides a display panel and a display device, the display panel comprises a level amplification circuit, and the level amplification circuit comprises a first phase inverter which is used for outputting a target voltage signal to a shift register circuit through an output end under the action of a first level signal to drive the shift register circuit, the first level signal is a level signal output by the output end of the driving circuit, the target voltage signal is a signal of a first reference voltage end or a signal of a second reference voltage end, and the first level signal is used for selecting conduction of the first input end or conduction of the second input end; the control end of the first phase inverter is electrically connected with the output end of the driving circuit, the first input end of the first phase inverter is electrically connected with the first reference voltage end, and the second input end of the first phase inverter is electrically connected with the second reference voltage end. According to the display panel, the level amplifying circuit is additionally arranged in the display panel, so that the area of the driving circuit can be reduced, and meanwhile, the high-voltage output of the shifting register circuit can be ensured.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel and a display device. Background Art

[0002] The OLED industry's panel demand voltage can be divided into three categories: low voltage, medium voltage, and high voltage. Low voltage requires a voltage below 1.8V, and mainly performs digital calculations inside the driving circuit. Medium voltage requires a voltage approximately below 7V to provide the relevant voltage for driving pixels. High voltage requires a voltage approximately below 32V, which is used to provide the driving voltage for the shift register circuit.

[0003] Due to the characteristics of panel devices, only the shift register related circuits need to be driven by high voltages such as VGH / VGL, and other areas do not need it; however, to provide high voltage, the line width and line spacing must be above 0.27um, which means that the high-voltage process will occupy a relatively large area and have a certain impact on other processes, increasing the difficulty of the process and making it difficult to achieve high-voltage processes. In addition, the overall area of ​​the drive circuit is small, which makes it difficult to achieve, and the large panel devices and lines have a greater tolerance for high-voltage processes, which greatly increases the difficulty of driving circuit production. Summary of the invention

[0004] The main purpose of the present application is to provide a display panel and a display device to at least solve the problem that in the existing driving circuit, a high voltage input needs to be provided to the shift register circuit, resulting in a large circuit area and high manufacturing difficulty.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a display panel is provided, the display panel comprising a level amplification circuit, a shift register circuit and a driving circuit, the level amplification circuit comprising: a first inverter, used to output a target voltage signal to the shift register circuit through an output terminal under the action of a first level signal to drive the shift register circuit, the first level signal is a level signal output by the output terminal of the driving circuit, the target voltage signal is a signal of a first reference voltage terminal or a signal of a second reference voltage terminal, the first level signal is used to select whether the first input terminal is turned on or the second input terminal is turned on, and the signal of the first reference voltage terminal is greater than the first level signal; wherein the first inverter has a control terminal, a first input terminal, a second input terminal and an output terminal, the control terminal of the first inverter is electrically connected to the output terminal of the driving circuit, the first input terminal of the first inverter is electrically connected to the first reference voltage terminal, the second input terminal of the first inverter is electrically connected to the second reference voltage terminal, and the output terminal of the first inverter is electrically connected to the input terminal of the shift register circuit.

[0006] According to another aspect of the present application, a display device is provided, comprising any one of the display panels described above.

[0007] Applying the technical solution of the present application, the above-mentioned display panel includes a level amplifier circuit, a shift register circuit and a driving circuit, and the level amplifier circuit includes: a first inverter, which is used to output a target voltage signal to the shift register circuit through an output terminal under the action of a first level signal to drive the shift register circuit, the first level signal is a level signal output by the output terminal of the driving circuit, the target voltage signal is a signal of the first reference voltage terminal or a signal of the second reference voltage terminal, the first level signal is used to select the first input terminal to be turned on or the second input terminal to be turned on, and the signal of the first reference voltage terminal is greater than the first level signal; the control terminal of the first inverter is electrically connected to the output terminal of the driving circuit, the first input terminal of the first inverter is electrically connected to the first reference voltage terminal, the second input terminal of the first inverter is electrically connected to the second reference voltage terminal, and the output terminal of the first inverter is electrically connected to the input terminal of the shift register circuit. The display panel adds a level amplifier circuit in the display panel to amplify the first level signal to obtain a target voltage signal, and uses the target voltage signal as a driving signal of the shift register circuit. This can reduce the area of ​​the driving circuit while ensuring the high-voltage output of the shift register circuit, thereby solving the problem in the existing driving circuit that a high-voltage input needs to be provided to the shift register circuit, resulting in a large circuit area and high manufacturing difficulty. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0009] Figure 1 A schematic structural diagram of a display panel provided in an embodiment of the present application is shown;

[0010] Figure 2 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0011] Figure 3 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0012] Figure 4 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0013] Figure 5 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0014] Figure 6 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0015] Figure 7 A schematic diagram showing the structure of another display panel provided in an embodiment of the present application is shown;

[0016] Figure 8 A schematic structural diagram of another display device provided in an embodiment of the present application is shown.

[0017] The above drawings include the following reference numerals:

[0018] 100, level amplification circuit; 110, first inverter; 120, level conversion module; 121, second inverter; 122, first switch unit; 123, second switch unit; 124, first switch module; 125, second switch module; 126, third switch module; 127, fourth switch module; 200, shift register circuit; 300, drive circuit; 400, display panel; T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; T8, eighth transistor. DETAILED DESCRIPTION

[0019] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0020] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0021] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0022] For the convenience of description, some nouns or terms involved in the embodiments of the present application are explained below:

[0023] Drive circuit: Drive Integrated Circuit, referred to as Drive IC;

[0024] Shift register: Video Shift Register, abbreviated as VER.

[0025] As introduced in the background technology, the voltage required for panels in the OLED industry can be divided into two categories: low voltage, medium voltage, and high voltage. Low voltage means the voltage required is below 1.8V, and digital calculations are mainly performed inside the IC. Medium voltage means the voltage required is approximately below 7V, and is used to provide pixel-related power. High voltage means the voltage required is approximately below 32V, and is used to provide VSR circuit drive voltage.

[0026] Due to the characteristics of panel devices, only VSR-related circuits need to be driven by high-voltage power such as VGH / VGL, and other areas do not need it; and the high-voltage process of IC has higher requirements, and the process taking high voltage into account will greatly increase the difficulty of IC production. In addition, the precision of the wafer industry is getting higher and higher, and the high-voltage process will occupy a relatively large area and have a certain impact on other processes, increasing the difficulty of the process, and the high-voltage process is not easy to achieve.

[0027] In order to solve the problem that in the existing driving circuit, a high voltage input needs to be provided to the shift register circuit, resulting in a large circuit area and high manufacturing difficulty, the embodiments of the present application provide a display panel and a display device.

[0028] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. It should be noted that the embodiments are for better explanation of the present invention, but not for limiting the present invention.

[0029] It should be noted that in a specific implementation, the first end of the transistor can be used as its source and the second end as its drain according to the type of transistor and the signal of its gate; or, conversely, the first end of the transistor can be used as its drain and the second end as its source, without making a specific distinction here.

[0030] It should be noted that transistors are generally divided into N-type transistors and P-type transistors, wherein the N-type transistor is turned on by a high-level signal and turned off by a low-level signal, and the P-type transistor is turned on by a low-level signal and turned off by a high-level signal.

[0031] An embodiment of the present invention provides a display panel, such as Figure 1As shown, the display panel includes a level amplification circuit 100, a shift register circuit 200 and a driving circuit 300. The level amplification circuit 100 includes:

[0032] The first inverter 110 is used to output a target voltage signal to the shift register circuit 200 through an output terminal under the action of a first level signal to drive the shift register circuit 200. The first level signal is a level signal output by the output terminal of the driving circuit 300. The target voltage signal is a signal of the first reference voltage terminal VGH or a signal of the second reference voltage terminal VGL. The first level signal is used to select whether the first input terminal is turned on or the second input terminal is turned on. The signal of the first reference voltage terminal VGH is greater than the first level signal.

[0033] Among them, the above-mentioned first inverter 110 has a control end, a first input end, a second input end and an output end. The control end of the above-mentioned first inverter 110 is electrically connected to the output end of the above-mentioned driving circuit 300, the first input end of the above-mentioned first inverter 110 is electrically connected to the above-mentioned first reference voltage end VGH, the second input end of the above-mentioned first inverter 110 is electrically connected to the above-mentioned second reference voltage end VGL, and the output end of the above-mentioned first inverter 110 is electrically connected to the input end of the above-mentioned shift register circuit 200.

[0034] The above-mentioned display panel of the present application includes a level amplifier circuit, a shift register circuit and a driving circuit. The level amplifier circuit includes: a first inverter, which is used to output a target voltage signal to the shift register circuit through an output terminal under the action of a first level signal to drive the shift register circuit. The first level signal is a level signal output by the output terminal of the driving circuit. The target voltage signal is a signal of the first reference voltage terminal or a signal of the second reference voltage terminal. The first level signal is used to select the first input terminal to be turned on or the second input terminal to be turned on. The signal of the first reference voltage terminal is greater than the first level signal; the control terminal of the first inverter is electrically connected to the output terminal of the driving circuit, the first input terminal of the first inverter is electrically connected to the first reference voltage terminal, the second input terminal of the first inverter is electrically connected to the second reference voltage terminal, and the output terminal of the first inverter is electrically connected to the input terminal of the shift register circuit. The display panel adds a level amplifier circuit in the display panel to amplify the first level signal to obtain a target voltage signal, and uses the target voltage signal as a driving signal of the shift register circuit. This can reduce the area of ​​the driving circuit while ensuring the high-voltage output of the shift register circuit, thereby solving the problem in the existing driving circuit that a high-voltage input needs to be provided to the shift register circuit, resulting in a large circuit area and high manufacturing difficulty.

[0035] The above-mentioned embodiment can convert a relatively low-level driving signal into a relatively high-voltage output, thereby reducing the difficulty of manufacturing the driving circuit.

[0036] In this embodiment, when the first level signal is at a low level, the first input terminal of the first inverter is turned on, the target voltage signal is the signal at the first reference voltage terminal, and the voltage absolute value of the signal at the first reference voltage terminal is greater than the voltage absolute value of the first level signal. For example: when the first level signal is -1V and the signal at the first reference voltage terminal is 2V, the first input terminal of the first inverter is turned on, the target voltage signal is 2V, and after reverse amplification by the first inverter, the target voltage signal is amplified to 2V, that is, the high voltage control of the drive signal of the shift register circuit can be guaranteed by a level amplifier circuit.

[0037] Optional, such as Figure 2 As shown, the first inverter 110 further includes:

[0038] A first transistor T1, wherein a control terminal of the first transistor T1 is electrically connected to the output terminal of the driving circuit 300, a first terminal of the first transistor T1 is electrically connected to the first reference voltage terminal VGH, and a second terminal of the first transistor T1 is electrically connected to the voltage output terminal;

[0039] The second transistor T2, the control end of the second transistor T2 is electrically connected to the output end of the driving circuit 300, the first end of the second transistor T2 is electrically connected to the second reference voltage end VGL, and the second end of the second transistor T2 is electrically connected to the voltage output end.

[0040] In this example, the first level signal outputted from the output terminal of the driving circuit is used to control the conduction or cut-off of the first transistor T1 and the second transistor T2. When the first level signal controls the first transistor T1 to be turned on and the second transistor T2 to be turned off, the signal of the first reference voltage terminal VGH can be transmitted to the output terminal of the first inverter 110, that is, the target voltage signal outputted from the output terminal of the first inverter 110 is the signal of the first reference voltage terminal VGH; when the first level signal controls the first transistor T1 to be turned off and the second transistor T2 to be turned on, the signal of the second reference voltage terminal VGL can be transmitted to the output terminal of the first inverter 110, that is, the target voltage signal outputted from the output terminal of the first inverter 110 is the signal of the second reference voltage terminal VGL.

[0041] Optional, such as Figure 2 As shown, one of the first transistor T1 and the second transistor T2 is an NMOS, and the other is a PMOS.

[0042] In this example, one of the first transistor T1 and the second transistor T2 is NMOS and the other is PMOS, which can ensure that the first level signal only controls one transistor to be turned on and the other transistor is turned off, that is, the signal controlling one of the first reference voltage terminal VGH and the second reference voltage terminal VGL is transmitted to the shift register circuit through the output end of the first inverter.

[0043] In this example, if Figure 2 As shown, the first transistor T1 is a PMOS and the second transistor T2 is an NMOS. When the first level signal is a low level, the first transistor T1 is turned on and the second transistor T2 is turned off. The target voltage signal is the signal of the first reference voltage terminal VGH. The absolute value of the signal of the first reference voltage terminal VGH is greater than the absolute value of the first level signal, so as to achieve the effect of reverse amplification of the signal; when the first level signal is a high level, the first transistor T1 is turned off and the second transistor T2 is turned on. The target voltage signal is the signal of the second reference voltage terminal VGL. The absolute value of the signal of the second reference voltage terminal VGL is greater than the absolute value of the first level signal, so as to achieve the effect of reverse amplification of the signal.

[0044] Optional, such as Figure 3 As shown, the level amplification circuit 100 further includes:

[0045] The level conversion module 120, the input end of the level conversion module 120 is electrically connected to the output end of the driving circuit 300, the output end of the level conversion module 120 is electrically connected to the input end of the first inverter 110, and the level conversion module 120 is used to convert the first level signal into an intermediate level signal, so that the first inverter 110 outputs the target voltage signal to the shift register circuit 200 through the voltage output end under the action of the intermediate level signal.

[0046] In this example, the level conversion module is used to provide the intermediate level signal to the first inverter under the control of the first level signal. The first level signal is first inverted and amplified by the level conversion module, and then reversely amplified by the first inverter, so that the amplification factor is higher and the high voltage requirement of the shift register circuit can be better met.

[0047] For example: when the first level signal is 1V, under the action of the level conversion module, the first level signal will be converted into an intermediate level signal of -2V, and under the action of the first inverter, the intermediate level signal will be converted into a target voltage signal of 4V, that is, the target voltage signal is positively amplified by 4 times compared with the first level signal, and the amplification factor is higher, which can better meet the high voltage requirements of the shift register circuit.

[0048] Optional, such as Figure 4As shown, the level conversion module 120 further includes:

[0049] The second inverter 121 has a control terminal, a first input terminal, a second input terminal and an output terminal. The control terminal of the second inverter 121 is electrically connected to the output terminal of the driving circuit 300. The first input terminal of the second inverter 121 is connected to the power signal terminal AVDD. The second input terminal of the second inverter 121 is grounded.

[0050] The first switch unit 122 has a first end, a second end, a third end, a fourth end and a fifth end. The first end of the first switch unit 122 is electrically connected to the output end of the driving circuit 300, the second end of the first switch unit 122 is electrically connected to the second reference voltage end VGL, the third end of the first switch unit 122 is electrically connected to the output end of the second inverter 121, the fourth end of the first switch unit 122 is connected to the input end of the first inverter 110 at the first node N, and the fifth end of the first switch unit 122 is connected to the second node M;

[0051] The second switch unit 123 has a first end, a second end and a third end. The first end of the second switch unit 123 is connected to the first reference voltage end VGH, the second end of the second switch unit 123 is connected to the first node N, and the third end of the second switch unit 123 is connected to the second node M.

[0052] In this example, the second inverter is used to provide the signal of the power signal terminal AVDD or the ground signal of the second input terminal to the first switch unit under the control of the first level signal. The first switch unit is used to provide the signal of the second reference voltage terminal VGL to the first node N and the second node M under the control of the signal provided by the second inverter. The second switch unit is used to provide the signal of the first reference voltage terminal VGH to the first node N under the control of the second node M. The first inverter is used to provide the signal of the first reference voltage terminal VGH or the signal of the second reference voltage terminal VGL to the shift register circuit under the control of the first node N to meet the high voltage requirement of the shift register circuit.

[0053] Optional, such as Figure 5 As shown, the second inverter 121 comprises:

[0054] a third transistor T3, wherein a control terminal of the third transistor T3 is electrically connected to the output terminal of the driving circuit 300, a first terminal of the third transistor T3 is connected to the power signal terminal AVDD, and a second terminal of the third transistor T3 is electrically connected to the third terminal of the first switch unit 122;

[0055] The fourth transistor T4 , wherein the control end of the fourth transistor T4 is electrically connected to the output end of the driving circuit 300 , the first end of the fourth transistor T4 is grounded, and the second end of the fourth transistor T4 is electrically connected to the third end of the first switch unit 122 .

[0056] In this example, the first level signal is used to control the conduction or cutoff of the third transistor T3 and the fourth transistor T4. When the first level signal controls the third transistor T3 to be turned on and the fourth transistor T4 to be turned off, the signal at the power signal terminal AVDD can be transmitted to the first switch unit; when the first level signal controls the third transistor T3 to be turned off and the fourth transistor T4 to be turned on, the signal at the ground terminal can be transmitted to the first switch unit.

[0057] Optional, such as Figure 6 As shown, the first switch unit 122 includes:

[0058] A first switch module 124, configured to be turned off when the first level signal is at a low level, and to transmit the signal of the second reference voltage terminal VGL to the first node N when the first level signal is at a high level;

[0059] The second switch module 125 is used to turn off when the signal output from the output end of the second inverter 121 is at a low level, and transmit the signal of the second reference voltage end VGL to the second node M when the signal output from the output end of the second inverter 121 is at a high level.

[0060] In this example, the first switch module is used to transmit the signal of the second reference voltage terminal VGL to the first node N under the control of the first level signal; the second switch module is used to transmit the signal of the second reference voltage terminal VGL to the second node M under the control of the signal output at the output terminal of the second inverter 121.

[0061] Optional, such as Figure 6 As shown, the second switch unit 123 includes:

[0062] A third switch module 126, configured to be turned off when the signal at the second node M is at a high level, and to transmit the signal at the first reference voltage terminal VGH to the first node N when the signal at the second node M is at a low level;

[0063] The fourth switch module 127 is used for turning off when the signal of the first node N is at a high level, and for lowering the signal of the first reference voltage terminal VGH and transmitting it to the second node M when the signal of the first node N is at a low level.

[0064] In this example, the third switch module is used to transmit the signal of the first reference voltage terminal VGH to the first node N under the control of the signal of the second node M; the fourth switch module is used to transmit the signal of the first reference voltage terminal VGH to the second node M under the control of the signal of the first node N.

[0065] Optional, such as Figure 7 As shown, the first switch module 124 includes a fifth transistor T5, a control end of the fifth transistor T5 is electrically connected to the output end of the driving circuit 300, a first end of the fifth transistor T5 is connected to the first node N, and a second end of the fifth transistor T5 is connected to the second reference voltage end VGL;

[0066] The second switch module 125 includes a sixth transistor T6, a control end of the sixth transistor T6 is electrically connected to the output end of the second inverter 121, a first end of the sixth transistor T6 is connected to the second node M, and a second end of the sixth transistor T6 is connected to the second reference voltage end VGL.

[0067] In this example, the first level signal is used to control the conduction or cut-off of the fifth transistor T5, and the signal output by the second inverter output terminal is used to control the conduction or cut-off of the sixth transistor T6. When the fifth transistor T5 is turned on, the signal of the second reference voltage terminal VGL can be transmitted to the first node N, and when the sixth transistor T6 is turned on, the signal of the second reference voltage terminal VGL can be transmitted to the second node M.

[0068] Optional, such as Figure 7 As shown, the third switch module 126 includes a seventh transistor T7, a control end of the seventh transistor T7 is electrically connected to the second node M, a first end of the seventh transistor T7 is connected to the first reference voltage end VGH, and a second end of the seventh transistor T7 is electrically connected to the first node N;

[0069] The fourth switch module 127 includes an eighth transistor T8, a control end of the eighth transistor T8 is electrically connected to the first node N, a first end of the eighth transistor T8 is connected to the first reference voltage end VGH, and a second end of the eighth transistor T8 is electrically connected to the second node M.

[0070] In this example, the signal of the second node M is used to control the conduction or cut-off of the seventh transistor T7, and the signal of the first node N is used to control the conduction or cut-off of the eighth transistor T8. When the seventh transistor T7 is turned on, the signal of the first reference voltage terminal VGH can be transmitted to the first node N, and when the eighth transistor T8 is turned on, the signal of the first reference voltage terminal VGH can be transmitted to the second node M.

[0071] That is, the first node N and the second node M are in an interlocked state.

[0072] Optional, such as Figure 7 As shown, the fifth transistor T5 and the sixth transistor T6 are both NMOS.

[0073] In this example, when the first level signal is at a low level, the fifth transistor T5 is turned off, the signal output after the first level signal is inverted by the second inverter is a high level, the sixth transistor T6 is turned on, and the signal of the second reference voltage terminal VGL can be transmitted to the second node M through the sixth transistor T6; when the first level signal is at a high level, the fifth transistor T5 is turned on, the signal of the second reference voltage terminal VGL can be transmitted to the first node N through the fifth transistor T5, the signal output after the first level signal is inverted by the second inverter is a low level, and the sixth transistor T6 is turned off.

[0074] Optionally, the first switch module 124 includes a first dual-gate transistor, and the second switch module 125 includes a second dual-gate transistor.

[0075] In this example, the dual-gate transistor structure can provide a higher gain, resulting in a better signal amplification effect. The dual-gate transistor can also reduce the generation of noise and improve the clarity and stability of the signal.

[0076] Optional, such as Figure 7 As shown, the seventh transistor T7 and the eighth transistor T8 are PMOS.

[0077] In this example, when the second node M is at a low level, the seventh transistor T7 is turned on, and the signal of the first reference voltage terminal VGH can be transmitted to the first node N through the seventh transistor T7, and when the second node M is at a high level, the seventh transistor T7 is turned off; when the first node N is at a low level, the above-mentioned eighth transistor T8 is turned on, and the signal of the first reference voltage terminal VGH can be transmitted to the second node M through the eighth transistor T8, and when the first node N is at a high level, the above-mentioned eighth transistor T8 is turned off.

[0078] Optionally, the third switch module 126 includes a third dual-gate transistor, and the fourth switch module 127 includes a fourth dual-gate transistor.

[0079] In this example, the dual-gate transistor structure can provide a higher gain, resulting in a better signal amplification effect. The dual-gate transistor can also reduce the generation of noise and improve the clarity and stability of the signal.

[0080] Example 1

[0081] like Figure 7As shown, the first level signal output by the driving circuit 300 is a high level, the fifth transistor T5 is turned on under the control of the first level signal, and the signal of the second reference voltage terminal VGL can be transmitted to the first node N through the fifth transistor T5, that is, the signal of the first node N is a low level at this time, and the second inverter outputs the ground signal to the sixth transistor T6 under the control of the first level signal, and the sixth transistor T6 is turned off under the control of the ground signal, and the eighth transistor T8 is turned on under the control of the signal of the first node N, and the signal of the first reference voltage terminal VGH can be transmitted to the second node M through the eighth transistor T8, that is, the signal of the second node M is a high level at this time, and the seventh transistor T7 is turned off under the control of the signal of the second node M, and the first inverter outputs the signal of the first reference voltage terminal VGH to the shift register circuit under the control of the signal of the first node N, that is, the target voltage signal is the signal of the first reference voltage terminal VGH at this time, and the signal of the first reference voltage terminal VGH is a signal higher than the first level signal.

[0082] Example 2

[0083] like Figure 7 As shown, the first level signal output by the driving circuit 300 is a low level, the fifth transistor T5 is turned off under the control of the first level signal, the second inverter outputs the signal of the power signal terminal AVDD to the sixth transistor T6 under the control of the first level signal, the sixth transistor T6 is turned on under the control of the signal of the power signal terminal AVDD, the signal of the second reference voltage terminal VGL can be transmitted to the second node M through the sixth transistor T6, that is, the signal of the second node M is a low level at this time, the seventh transistor T7 is turned on under the control of the signal of the second node M, the signal of the first reference voltage terminal VGH can be transmitted to the first node N through the seventh transistor T7, that is, the signal of the first node N is a high level at this time, the eighth transistor T8 is turned off under the control of the signal of the first node N, and the first inverter outputs the signal of the second reference voltage terminal VGL to the shift register circuit under the control of the signal of the first node N, that is, the target voltage signal is the signal of the second reference voltage terminal VGL at this time, and the signal of the second reference voltage terminal VGL is a signal lower than the first level signal.

[0084] In the above embodiment, only medium voltage and low voltage circuits are retained inside the IC, and the high voltage process is cancelled. The gate signal output terminal of the driving circuit adopts medium voltage for output, and the high and low levels are provided by the power signal terminals AVDD and -AVDD; in addition to the original power input, the display panel also adds two voltage inputs, namely the first reference voltage terminal VGH and the second reference voltage terminal VGL, to provide driving voltage for the shift register circuit VSR; the display panel adds level amplification circuits at the IC Gout output terminal to achieve high level output.

[0085] In the above embodiment, the IC cancels the circuit design related to the high-voltage process, and instead uses a level amplifier circuit to implement the level conversion action to increase the added value of the panel. The panel adds a level conversion circuit (level amplifier circuit) to implement the medium voltage to high level switching action on the panel; in addition, two voltage inputs, the first reference voltage terminal VGH and the second reference voltage terminal VGL, are added. The driver IC can get rid of the high-voltage process limitation, reduce the process difficulty, reduce the size of the driving circuit, improve the battery efficiency, and achieve low-cost production.

[0086] In some embodiments, the battery efficiency can be increased from 80% to more than 90%, the driving circuit adopts a chargepump architecture, and the PMIC adopts a buck and boost circuit architecture.

[0087] Based on the same inventive concept, the present invention also provides a display device, such as Figure 8 As shown, it includes any one of the above-mentioned display panels 400 .

[0088] The above-mentioned display panel provided by the embodiment of the present invention adds a level amplifier circuit in the display panel to amplify the first level signal to obtain a target voltage signal, and uses the target voltage signal as the driving signal of the shift register circuit. This can reduce the area of ​​the driving circuit while ensuring the high-voltage output of the shift register circuit, thereby solving the problem that the existing driving circuit needs to provide a high-voltage input to the shift register circuit, resulting in a large circuit area and high manufacturing difficulty.

[0089] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel includes a level amplification circuit, a shift register circuit and a driving circuit, and the level amplification circuit includes: a first inverter, configured to output a target voltage signal to a shift register circuit through an output terminal to drive the shift register circuit under the action of a first level signal, wherein the first level signal is a level signal output by an output terminal of a driving circuit, the target voltage signal is a signal of a first reference voltage terminal or a signal of a second reference voltage terminal, the first level signal is used to select whether the first input terminal is turned on or the second input terminal is turned on, and the signal of the first reference voltage terminal is greater than the first level signal; Among them, the first inverter has a control end, a first input end, a second input end and an output end, the control end of the first inverter is electrically connected to the output end of the driving circuit, the first input end of the first inverter is electrically connected to the first reference voltage end, the second input end of the first inverter is electrically connected to the second reference voltage end, and the output end of the first inverter is electrically connected to the input end of the shift register circuit.

2. The display panel according to claim 1, characterized in that: The first inverter further includes: a first transistor, wherein a control terminal of the first transistor is electrically connected to an output terminal of the driving circuit, a first terminal of the first transistor is electrically connected to the first reference voltage terminal, and a second terminal of the first transistor is electrically connected to a voltage output terminal; A second transistor, wherein the control end of the second transistor is electrically connected to the output end of the driving circuit, the first end of the second transistor is electrically connected to the second reference voltage end, and the second end of the second transistor is electrically connected to the voltage output end.

3. The display panel according to claim 2, characterized in that: One of the first transistor and the second transistor is an NMOS, and the other is a PMOS.

4. The display panel according to claim 1, characterized in that: The level amplification circuit also includes: A level conversion module, wherein the input end of the level conversion module is electrically connected to the output end of the driving circuit, the output end of the level conversion module is electrically connected to the input end of the first inverter, and the level conversion module is used to convert the first level signal into an intermediate level signal, so that the first inverter outputs the target voltage signal to the shift register circuit through the voltage output end under the action of the intermediate level signal.

5. The display panel according to claim 4, characterized in that: The level conversion module also includes: A second inverter having a control terminal, a first input terminal, a second input terminal and an output terminal, wherein the control terminal of the second inverter is electrically connected to the output terminal of the driving circuit, the first input terminal of the second inverter is connected to the power signal terminal, and the second input terminal of the second inverter is grounded; a first switch unit, having a first end, a second end, a third end, a fourth end and a fifth end, wherein the first end of the first switch unit is electrically connected to the output end of the driving circuit, the second end of the first switch unit is electrically connected to the second reference voltage end, the third end of the first switch unit is electrically connected to the output end of the second inverter, the fourth end of the first switch unit is connected to the input end of the first inverter at a first node, and the fifth end of the first switch unit is connected to the second node; The second switch unit has a first end, a second end and a third end, the first end of the second switch unit is connected to the first reference voltage end, the second end of the second switch unit is connected to the first node, and the third end of the second switch unit is connected to the second node.

6. The display panel according to claim 5, characterized in that: The second inverter comprises: a third transistor, wherein a control terminal of the third transistor is electrically connected to the output terminal of the driving circuit, a first terminal of the third transistor is connected to the power signal terminal, and a second terminal of the third transistor is electrically connected to a third terminal of the first switch unit; A fourth transistor, wherein a control end of the fourth transistor is electrically connected to the output end of the driving circuit, a first end of the fourth transistor is grounded, and a second end of the fourth transistor is electrically connected to the third end of the first switch unit.

7. The display panel according to claim 5, characterized in that: The first switch unit comprises: a first switch module, configured to be turned off when the first level signal is at a low level, and to transmit the signal at the second reference voltage end to the first node when the first level signal is at a high level; The second switch module is used to turn off when the signal output from the output end of the second inverter is at a low level, and to transmit the signal from the second reference voltage end to the second node when the signal output from the output end of the second inverter is at a high level.

8. The display panel according to claim 7, characterized in that: The first switch module includes a fifth transistor, a control terminal of the fifth transistor is electrically connected to the output terminal of the driving circuit, a first terminal of the fifth transistor is connected to the first node, and a second terminal of the fifth transistor is connected to the second reference voltage terminal; The second switch module includes a sixth transistor, a control end of the sixth transistor is electrically connected to the output end of the second inverter, a first end of the sixth transistor is connected to the second node, and a second end of the sixth transistor is connected to the second reference voltage end.

9. The display panel according to claim 8, characterized in that: The fifth transistor and the sixth transistor are both NMOS.

10. The display panel according to claim 7, characterized in that: The first switch module includes a first dual-gate transistor, and the second switch module includes a second dual-gate transistor.

11. The display panel according to claim 5, characterized in that: The second switch unit comprises: a third switch module, configured to be turned off when the signal at the second node is at a high level, and to transmit the signal at the first reference voltage terminal to the first node when the signal at the second node is at a low level; The fourth switch module is used to turn off when the signal of the first node is at a high level, and to lower the signal of the first reference voltage end and transmit it to the second node when the signal of the first node is at a low level.

12. The display panel according to claim 11, characterized in that: The third switch module includes a seventh transistor, a control terminal of the seventh transistor is electrically connected to the second node, a first terminal of the seventh transistor is connected to the first reference voltage terminal, and a second terminal of the seventh transistor is electrically connected to the first node; The fourth switch module includes an eighth transistor, a control end of the eighth transistor is electrically connected to the first node, a first end of the eighth transistor is connected to the first reference voltage end, and a second end of the eighth transistor is electrically connected to the second node.

13. The display panel according to claim 12, characterized in that: The seventh transistor and the eighth transistor are PMOS.

14. The display panel according to claim 11, characterized in that: The third switch module includes a third dual-gate transistor, and the fourth switch module includes a fourth dual-gate transistor.

15. A display device, characterized in that: A display panel comprising any one of claims 1 to 14.

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