Display panel and electronic equipment

Abstract

The invention provides a display panel and electronic equipment. The display panel comprises a display area, a fan-out area and a bending area, a first selection circuit is arranged in the bending area, the input end of the first selection circuit is electrically connected with the data driving chip, and the output end of the first selection circuit is electrically connected with a first group of data lines in the display area; a second selection circuit is arranged in the fan-out area, the input end of the second selection circuit is electrically connected with the data driving chip, and the output end of the second selection circuit is electrically connected with a second group of data lines in the display area; the number ratio of the input ends to the output ends of the first selection circuit and the second selection circuit is 1: N, and N is a positive integer larger than or equal to 2. The size of the fan-out area can be reduced, namely the size of the lower frame of the display screen can be reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and an electronic device. Background Art

[0002] Display screens are increasingly used in electronic devices, especially in mobile phones, tablet computers and other display products. With the iterative evolution of display products, narrow bezel design has gradually become a powerful tool for increasing the screen-to-body ratio of display products.

[0003] In the related art, due to too many wirings in the fan-out area of ​​the display screen, the size of the lower frame of the display screen is large, which is not conducive to the narrow frame design of the display product. Summary of the invention

[0004] The present disclosure provides a display panel and an electronic device to solve the above technical problems.

[0005] According to a first aspect of the present disclosure, a display panel is provided, comprising: a display area, a fan-out area and a bending area; the display area is provided with a plurality of data lines, the bending area is provided with a data driver chip; the data driver chip is electrically connected to the plurality of data lines through a signal routing line; the signal routing line is provided in the bending area and the fan-out area;

[0006] A first selection circuit is provided in the bending area, the input end of the first selection circuit is electrically connected to the data driving chip, and the output end of the first selection circuit is electrically connected to the first group of data lines in the display area; a second selection circuit is provided in the fan-out area, the input end of the second selection circuit is electrically connected to the data driving chip, and the output end of the second selection circuit is electrically connected to the second group of data lines in the display area; the ratio of the number of input ends to the output ends of the first selection circuit and the second selection circuit is 1:N, where N is a positive integer greater than or equal to 2.

[0007] Optionally, the connection line between the first selection circuit and the first group of data lines passes through at least one of the following layers: a first gate layer, a second gate layer, a first source-drain layer, and a second source-drain layer.

[0008] and / or,

[0009] The connection line between the second selection circuit and the second group of data lines passes through at least one of the following layers: a first gate layer, a second gate layer, a first source-drain layer, and a second source-drain layer;

[0010] The gate of the switching device of the pixel unit in the display area is electrically connected to the first gate layer and / or the second gate layer, the source is electrically connected to one of the first source-drain layer and the second source-drain layer, and the drain is electrically connected to the other of the first source-drain layer and the second source-drain layer.

[0011] Optionally, the first selection circuit includes a first group of switching devices and a second group of switching devices; the first group of switching devices is electrically connected to a data line connected to a first color sub-pixel; and the second group of switching devices is electrically connected to a data line connected to a second color sub-pixel.

[0012] Optionally, the second selection circuit includes a third group of switching devices and a fourth group of switching devices; the third group of switching devices is electrically connected to the data line connected to the third color sub-pixel; the fourth group of switching devices is electrically connected to the data line connected to the fourth color sub-pixel.

[0013] Optionally, the bending area includes a test sub-area for setting a test circuit for testing whether pixels in the display area work normally and a fixed sub-area for fixing a data driving chip;

[0014] The first selection circuit is disposed between the test sub-region and the fixed sub-region, and a first sub-fan-out region is formed between the first selection circuit and the fixed sub-region.

[0015] Optionally, the bending area further includes a binding sub-area; a second sub-fan-out area is arranged between the binding sub-area and the testing sub-area; and the binding sub-area is used to realize electrical connection between the device in the bending area and the device in the fan-out area.

[0016] Optionally, the fan-out area further includes a third sub-fan-out area and a fourth sub-fan-out area; and the second selection circuit is electrically connected to signal routing lines within the third sub-fan-out area and the fourth sub-fan-out area, respectively.

[0017] Optionally, the signal routing of the third sub-fan-out region is electrically connected to the signal routing of the binding sub-region of the bending region.

[0018] Optionally, a portion of the signal routing line in the fan-out area extends to the display area.

[0019] According to a second aspect of the present disclosure, an electronic device is provided, comprising a display panel as described in any one of the first aspects.

[0020] The technical solution provided by the embodiments of the present disclosure may have the following beneficial effects:

[0021] The display panel in the scheme of this embodiment may include a display area, a fan-out area and a bending area; the display area is provided with a plurality of data lines, the bending area is provided with a data driver chip; the data driver chip is electrically connected to the plurality of data lines through a signal routing line; the signal routing line is provided in the bending area and the fan-out area; a first selection circuit is provided in the bending area, the input end of the first selection circuit is electrically connected to the data driver chip, and the output end of the first selection circuit is electrically connected to the first group of data lines in the display area; a second selection circuit is provided in the fan-out area, the input end of the second selection circuit is electrically connected to the data driver chip, and the output end of the second selection circuit is electrically connected to the second group of data lines in the display area; the ratio of the number of input ends to output ends of the first selection circuit and the second selection circuit is 1:N, where N is a positive integer greater than or equal to 2. In this way, this embodiment uses the combination of two selection circuits respectively provided in the fan-out area and the bending area to reduce the size of the fan-out area on the basis of switching a plurality of data lines, that is, it is beneficial to reduce the size of the lower frame of the display screen.

[0022] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The block diagram is a single selection circuit according to an embodiment of the present disclosure.

[0024] Figure 2 A block diagram of a display panel including two selection circuits according to an embodiment of the present disclosure is shown.

[0025] Figure 3a The present invention is a schematic circuit diagram of a first selection circuit and a second selection circuit according to an embodiment of the present invention.

[0026] Figure 3b The figure is a schematic diagram of an electrical connection between a second selection circuit and a second source-drain line according to an embodiment of the present disclosure.

[0027] Figure 4 A block diagram of a display panel including two selection circuits according to an embodiment of the present disclosure is shown.

[0028] Figure 5 A block diagram of a display panel including two selection circuits according to an embodiment of the present disclosure is shown.

[0029] Figure 6 The figure is a schematic diagram of the structure of a display panel according to an embodiment of the present disclosure.

[0030] Figure 7 The present invention is a block diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.

[0032] In the related art, due to too many wirings in the fan-out area of ​​the display screen, the size of the lower frame of the display screen is large, which is not conducive to the narrow frame design of the display product.

[0033] At present, more and more electronic devices use high PPI (Pixels Per Inch) display screens. In the related art, adding a Demux circuit at the bottom frame of the display screen can save the display memory inside the DDIC. When the ratio of the number of Demux circuits to data lines is 1:4, the number of data lines will increase, resulting in a larger fanout area of ​​the display screen.

[0034] In the process of implementing the disclosed solution, the inventors discovered that: in the related art, after adding a DEMUX circuit, the number of data lines connected to the DEMUX circuit increases, resulting in an increase in the number of connections between the DEMUX and the data lines, thereby increasing the size of the fan-out area; and, the DEMUX circuit is implemented using multiple switching devices, which further increase the size of the fan-out area.

[0035] To solve the above technical problems, the embodiments of the present disclosure provide a display panel and an electronic device. The inventive concept of the display panel is to divide the selection circuit with a ratio of 1:N into at least two selection circuits, and the at least two selection circuits include two selection circuits, one of which is arranged in the fan-out area, and the other selection circuit is arranged in the bending area. Based on the above inventive concept, the embodiments of the present disclosure provide a display panel, see Figure 2, including: a display area 21, a fan-out area 22 and a bending area 23; the display area 21 is provided with a plurality of data lines (Data1 to Data N), and the bending area 23 is provided with a data driver chip DDIC; the data driver chip DDIC is electrically connected to the plurality of data lines through signal routing; the signal routing is arranged in the bending area 23 and the fan-out area 22. For example, the display area 21, the fan-out area 22 and the bending area 23 are arranged in sequence, that is, the fan-out area 22 and the bending area 23 are arranged in sequence along a side away from the display area 21, and the fan-out area 22 is located between the display area 21 and the bending area 23. The bending area 23 is configured to bend to the back side of the display area 21 (that is, the side opposite to the display surface of the display area 21 for realizing screen display).

[0036] A first selection circuit is provided in the bending area 23, the input end of the first selection circuit is electrically connected to the data driver chip DDIC, and the output end of the first selection circuit is electrically connected to the first group of data lines in the display area; a second selection circuit is provided in the fan-out area 23, the input end of the second selection circuit is electrically connected to the data driver chip DDIC, and the output end of the second selection circuit is electrically connected to the second group of data lines in the display area 21; the number ratio of the input end to the output end of the first selection circuit and the second selection circuit is 1:N, and N is a positive integer greater than or equal to 2. For example, in some possible implementations, the number ratio of the input end to the output end of the first selection circuit and the second selection circuit can be the same, so as to facilitate pixel display control; of course, it can be understood that based on the actual screen design requirements and pixel display control requirements, the number ratio of the input end to the output end of the first selection circuit and the second selection circuit can be different.

[0037] In an example, the selection circuit can be implemented by using a DEMUX switching circuit. The embodiment of the present disclosure is described below by taking the selection circuit using a DEMUX switching circuit as an example, and the first selection circuit disposed in the bending area 23 is referred to as a first DEMUX switching circuit, and the second selection circuit disposed in the fan-out area 22 is referred to as a second DEMUX switching circuit for distinction. It can be understood that although the DEMUX switching circuit is used as an example below, other circuit implementations capable of achieving multi-way selection switching are not limited, and other circuit implementations can be adapted, adjusted and replaced based on the application implementation of the DEMUX switching circuit below the present disclosure.

[0038] It should be noted that the input-output ratio of the first DEMUX switching circuit DEMUX1 and the second DEMUX switching circuit DEMUX2 can be the same, for example, both are 1:2 DEMUX switching circuits, and the two are combined to obtain a 1:4 DEMUX switching circuit. Alternatively, the input-output ratio of the first DEMUX switching circuit DEMUX1 and the second DEMUX switching circuit DEMUX2 can be different, for example, the input-output ratio of the first DEMUX switching circuit DEMUX1 is 1:1, and the input-output ratio of the second DEMUX switching circuit DEMUX1 is 1:3, and the two are combined to form a DEMUX switching circuit with a ratio of 1:4. Of course, the technician can select the value of N according to the specific scenario, so that the first DEMUX switching circuit DEMUX1 and the second DEMUX switching circuit DEMUX2 meet the ratio of 1:N after combination, N is a positive integer greater than or equal to 2, and the corresponding scheme falls within the protection scope of the present disclosure.

[0039] Thus, in this example, by splitting the DEMUX switching circuit into two DEMUX switching circuits, the number of data lines connected to the second DEMUX switching circuit is less than that of the DEMUX switching circuit before the split, so that the size of the fan-out area can be reduced. Figure 2 The size D2 of the fan-out area is less than Figure 1 Meanwhile, the number of switch devices in the second DEMUX switching circuit is smaller than the number of switch devices in the DEMUX switching circuit before the splitting, which can reduce the size of the area occupied by the DEMUX switching circuit and further reduce the size of the fan-out area, which is conducive to realizing a narrow-frame display screen and improving user experience.

[0040] In one embodiment, the connection line between the first DEMUX switching circuit DEMUX1 and the first group of data lines passes through at least one of the following layers: the first gate layer (3021), the second gate layer (3022), the first source-drain layer (3011) and the second source-drain layer (3012). And / or, in another embodiment, the connection line between the second DEMUX switching circuit DEMUX2 and the second group of data lines passes through at least one of the following layers: the first gate layer (3021), the second gate layer (3022), the first source-drain layer (3011) and the second source-drain layer (3012). The gate of the switching device of the pixel unit in the display area is electrically connected to the first gate layer (3021) and / or the second gate layer (3022), the source is electrically connected to one of the first source-drain layer (3011) and the second source-drain layer (3012), and the drain is electrically connected to the other of the first source-drain layer (3011) and the second source-drain layer (3012).

[0041] In a possible example, the first DEMUX switching circuit is electrically connected to the second gate layer (3022) in the bending region, and then the signal routing in the display region electrically connects the second gate layer to the second source and drain layer (3012), as shown in FIG3. Figure 3a , the data driver chip in FIG. (a) is electrically connected to the second gate layer (3022) through a signal line (via a via 31, optional); the second gate layer (3022) in FIG. (a) and FIG. (b) is the same metal layer, that is, the pixel data output by the data driver chip can reach the second gate layer (3022) in FIG. (b) from the second gate layer (3022) in FIG. (a); see Figure 3a , (b) shows an example of a via hole 33 and a signal line 34, and the signal line 34 can electrically connect the second gate layer (3022) and the second source and drain layer (3012) in the display area 21 through the via hole 33. Figure 3b An example is given in which the second DEMUX switching circuit DEMUX2 is electrically connected to the second source-drain layer (3012) through the via 33. Since the second source-drain layer (3012) is electrically connected to the data line, the pixel data can be written into each pixel unit. In this way, in this embodiment, the electrical connection between the DEMUX switching circuit and the data line can be achieved by only changing the pattern of the above-mentioned metal layer without changing the specific structure of the display panel. The solution is simple and easy to implement, which is conducive to reducing costs.

[0042] It should be noted that, in order to simplify the drawings, FIG. 3 only illustrates various metal layers or polysilicon layers, and does not show the insulating layers between the metal layers. In actual applications, various insulating layers do exist.

[0043] In one embodiment, see Figure 4 The first DEMUX switching circuit DEMUX1 includes a first group of switch devices Q1 and a second group of switch devices Q2; the first group of switch devices Q1 is electrically connected to the data line connected to the first color sub-pixel; the second group of switch devices Q2 is electrically connected to the data line connected to the second color sub-pixel. In this embodiment, the first group of switch devices Q1 and the second group of switch devices Q2 are respectively made of the same process as the switch devices of the pixel units in the display area 21 (not shown in the figure), which can reduce the difficulty of design and production and reduce costs.

[0044] In another embodiment, see Figure 4The second DEMUX switching circuit DEMUX2 includes a third group of switch devices Q3 and a fourth group of switch devices Q4; the third group of switch devices Q3 is electrically connected to the data line connected to the third color sub-pixel; the fourth group of switch devices Q4 is electrically connected to the data line connected to the fourth color sub-pixel. In this embodiment, the third group of switch devices Q3 and the fourth group of switch devices Q4 are respectively made of the same process as the switch devices of the pixel units in the display area 21 (not shown in the figure), which can reduce the difficulty of design and production and reduce costs.

[0045] It should be noted that the first color sub-pixel, the second color sub-pixel, the third color sub-pixel and the fourth color sub-pixel can be set according to specific scenarios. Figure 4 The first color sub-pixel, the second color sub-pixel, the third color sub-pixel and the fourth color sub-pixel can be G, G, R and B sub-pixels respectively, so as to achieve the effect of classifying and controlling the sub-pixels in different rows or columns of pixel units.

[0046] In one embodiment, see Figure 5 , the bending area 23 also includes a data driver chip DDIC. The data driver chip DDIC is electrically connected to the first DEMUX switching circuit DEMUX1 and the second DEMUX switching circuit DEMUX2, respectively, and is used to control the first DEMUX switching circuit DEMUX1 and / or the second DEMUX switching circuit DEMUX2 to switch to the target data line and output pixel data to the target data line; the pixel unit electrically connected to the target data line can emit light matching the pixel data after receiving the pixel data. In this way, the present embodiment can output pixel data to the target data line via the DEMUX switching circuit through the data driver chip DDIC, and can ensure the charging rate of the pixel unit.

[0047] In one embodiment, considering that the first DEMUX switching circuit DEMUX1 and the second DEMUX switching circuit DEMUX2 are respectively arranged in different areas, the control voltages received by the switch devices are different, resulting in differences in the conduction degree of each switch device, which in turn causes differences in the same pixel data transmitted by each switch device. To this end, in one embodiment, the memory of the display panel also stores compensation voltages corresponding to each switch device, which is generated due to the different positions of the first DEMUX switching circuit and the second DEMUX switching circuit. The data driver chip DDIC subtracts the compensation voltage corresponding to each switch device from the pixel data and then transmits it to the target data line via the DEMUX switching circuit, so that the same pixel data remains equal when transmitted to each target data line, ensuring the uniformity of the pixel unit display.

[0048] In one embodiment, see Figure 5The bending area 23 also includes a test sub-area (test area) for setting a test circuit for testing whether the pixels in the display area are working normally and a fixed sub-area (DDIC area) for fixing the data driver chip; the first DEMUX switching circuit DEMUX1 is set between the test sub-area test area and the fixed sub-area DDIC area, and a first sub-fan-out area Fanout1 is formed between the first DEMUX switching circuit DDIC area and the fixed sub-area DDIC area. In this way, in this embodiment, the first DEMUX switching circuit DEMUX1 is close to the data driver chip DDIC, and the connection line between the data driver chip DDIC and the first DEMUX switching circuit DEMUX1 can be shortened to ensure the stability of the control signal to ensure the control efficiency.

[0049] In one embodiment, see Figure 5 The bending area 23 also includes a binding sub-area (Bending area). A second sub-fan-out area Fanout2 is arranged between the binding sub-area Bending area and the test sub-area test area; the binding sub-area Bending area is used to realize electrical connection between the devices in the bending area 23 and the devices in the fan-out area 22.

[0050] In one embodiment, see Figure 5 , the fan-out area 22 also includes a third sub-fan-out area Fanout3 and a fourth sub-fan-out area Fanout4; the second DEMUX switching circuit DEMUX2 is electrically connected to the signal routing lines in the third sub-fan-out area Fanout3 and the fourth sub-fan-out area Fanout3 respectively. The signal routing lines in the third sub-fan-out area Fanout3 are electrically connected to the signal routing lines in the binding sub-area Bending area of ​​the bending area 23, so that the devices (such as DDIC) in the bending area 23 can be electrically connected to the pixel units in the display area 21. In this embodiment, the number of connection lines at the input end and the number of data lines connected to the output end of the second DEMUX switching circuit DEMUX2 are reduced, which can reduce the size of the third sub-fan-out area Fanout3 and the fourth sub-fan-out area Fanout4; and the thickness of the second DEMUX switching circuit DEMUX2 is also reduced accordingly, that is, the size of the fan-out area 22 is reduced.

[0051] In one embodiment, see Figure 6 , a portion of the signal routing of the fan-out area 22 extends to the display area 21, that is, the signal routing 41 in the fourth sub-fan-out area Fanout4 extends to the display area 21, which can further reduce the size of the fourth sub-fan-out area Fanout4, or reduce the size of the fan-out area 22, that is, or Figure 6The size D3 of the fan-out area is less than Figure 2 The size D2 of the middle fan-out area is increased, thereby reducing the size of the bottom border of the display screen.

[0052] Figure 7 7 is a block diagram of an electronic device according to an exemplary embodiment. For example, the electronic device 700 may be a smart phone, a computer, a digital broadcast terminal, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0053] Reference Figure 7 The electronic device 700 may include one or more of the following components: a processing component 702 , a memory 704 , a power component 706 , a multimedia component 708 , an audio component 710 , an input / output (I / O) interface 712 , a sensor component 714 , a communication component 716 , and an image acquisition component 718 .

[0054] The processing component 702 generally controls the overall operation of the electronic device 700, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 702 may include one or more processors 720 to execute computer programs. In addition, the processing component 702 may include one or more modules to facilitate interaction between the processing component 702 and other components. For example, the processing component 702 may include a multimedia module to facilitate interaction between the multimedia component 708 and the processing component 702. In an example, the processor 720 may implement the scheme of the above-mentioned power supply control method.

[0055] The memory 704 is configured to store various types of data to support operations on the electronic device 700. Examples of such data include computer programs for any application or method operating on the electronic device 700, contact data, phone book data, messages, pictures, videos, etc. The memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0056] The power supply component 706 provides power to various components of the electronic device 700. The power supply component 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 700. The power supply component 706 may include a power supply chip, and the controller may communicate with the power supply chip to control the power supply chip to turn on or off the first switching device, so that the battery supplies power to the mainboard circuit or does not supply power.

[0057] The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and the target object. In some embodiments, the screen includes Figure 2 to Figure 6 The display panel shown is an example.

[0058] In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input information from a target object. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation.

[0059] The audio component 710 is configured to output and / or input audio file information. For example, the audio component 710 includes a microphone (MIC), and when the electronic device 700 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive external audio file information. The received audio file information can be further stored in the memory 704 or sent via the communication component 716. In some embodiments, the audio component 710 also includes a speaker for outputting audio file information.

[0060] The I / O interface 712 provides an interface between the processing component 702 and a peripheral interface module, such as a keyboard, a click wheel, a button, etc.

[0061] The sensor component 714 includes one or more sensors for providing various aspects of status assessment for the electronic device 700. For example, the sensor component 714 can detect the open / closed state of the electronic device 700, the relative positioning of components, such as the display screen and keypad of the electronic device 700, and the sensor component 714 can also detect the position change of the electronic device 700 or a component, the presence or absence of contact between the target object and the electronic device 700, the orientation or acceleration / deceleration of the electronic device 700, and the temperature change of the electronic device 700. In this example, the sensor component 714 can include a magnetic sensor, a gyroscope, and a magnetic field sensor, and can also include an inertial sensor, an image sensor, etc., wherein the magnetic field sensor includes at least one of the following: a Hall sensor, a thin film magnetoresistive sensor, and a magnetic liquid acceleration sensor.

[0062] The communication component 716 is configured to facilitate wired or wireless communication between the electronic device 700 and other devices. The electronic device 700 can access a wireless network based on a communication standard, such as WiFi, 2G, 3G, 4G, 5G, or a combination thereof. In an exemplary embodiment, the communication component 716 receives broadcast information or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 716 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0063] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0064] In an exemplary embodiment, the present disclosure also provides a non-transitory computer-readable storage medium, and when an executable computer program in the storage medium is executed by a processor, the above-mentioned method can be implemented.

[0065] In an exemplary embodiment, a chip is also provided, the chip including a processor and an interface for reading a computer program through the interface to implement the above method. The chip may be a conventional CPU (central processing unit) chip, a GPU (graphics processing unit) chip, etc., or an acceleration chip dedicated to artificial intelligence technology, such as an AI (Artificial Intelligence) accelerator, etc.

[0066] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the disclosure disclosed herein. The present disclosure is intended to cover any variations, uses, or adaptations that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0067] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A display panel, characterized in that: include: A display area, a fan-out area and a bending area; the display area is provided with a plurality of data lines, and the bending area is provided with a data driving chip; The data driving chip is electrically connected to the plurality of data lines through a signal line; the signal line is arranged in the bending area and the fan-out area; A first selection circuit is provided in the bending area, the input end of the first selection circuit is electrically connected to the data driving chip, and the output end of the first selection circuit is electrically connected to the first group of data lines in the display area; a second selection circuit is provided in the fan-out area, the input end of the second selection circuit is electrically connected to the data driving chip, and the output end of the second selection circuit is electrically connected to the second group of data lines in the display area; the ratio of the number of input ends to the output ends of the first selection circuit and the second selection circuit is 1:N, where N is a positive integer greater than or equal to 2.

2. The display panel according to claim 1, characterized in that: The connection line between the first selection circuit and the first group of data lines passes through at least one of the following layers: a first gate layer, a second gate layer, a first source-drain layer, and a second source-drain layer. and / or, The connection line between the second selection circuit and the second group of data lines passes through at least one of the following layers: a first gate layer, a second gate layer, a first source-drain layer, and a second source-drain layer; The gate of the switching device of the pixel unit in the display area is electrically connected to the first gate layer and / or the second gate layer, the source is electrically connected to one of the first source-drain layer and the second source-drain layer, and the drain is electrically connected to the other of the first source-drain layer and the second source-drain layer.

3. The display panel according to claim 1, characterized in that: The first selection circuit includes a first group of switch devices and a second group of switch devices; the first group of switch devices is electrically connected to the data line connected to the first color sub-pixel; the second group of switch devices is electrically connected to the data line connected to the second color sub-pixel.

4. The display panel according to claim 1, characterized in that: The second selection circuit includes a third group of switch devices and a fourth group of switch devices; the third group of switch devices is electrically connected to the data line connected to the third color sub-pixel; the fourth group of switch devices is electrically connected to the data line connected to the fourth color sub-pixel.

5. The display panel according to claim 1, characterized in that: The bending area includes a test sub-area for setting a test circuit for testing whether the pixels in the display area work normally and a fixed sub-area for fixing the data driving chip; The first selection circuit is disposed between the test sub-region and the fixed sub-region, and a first sub-fan-out region is formed between the first selection circuit and the fixed sub-region.

6. The display panel according to claim 5, characterized in that: The bending area also includes a binding sub-area; a second sub-fan-out area is arranged between the binding sub-area and the testing sub-area; and the binding sub-area is used to realize electrical connection between the devices in the bending area and the devices in the fan-out area.

7. The display panel according to claim 1, characterized in that: The fan-out area also includes a third sub-fan-out area and a fourth sub-fan-out area; the second selection circuit is electrically connected to the signal routing lines in the third sub-fan-out area and the fourth sub-fan-out area respectively.

8. The display panel according to claim 7, characterized in that: The signal routing of the third sub-fan-out region is electrically connected to the signal routing of the binding sub-region of the bending region.

9. The display panel according to claim 1, characterized in that: A portion of the signal routing line in the fan-out area extends to the display area.

10. An electronic device, characterized in that: It comprises the display panel as claimed in any one of claims 1 to 9.

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