Silicon-on-insulator structure and preparation method thereof

Abstract

The invention relates to a silicon-on-insulator structure and a preparation method thereof. The silicon-on-insulator structure comprises a substrate; a porous silicon structure, an oxide layer and a top silicon layer with different porosities are sequentially arranged on the substrate from bottom to top. The preparation method comprises the following steps: (1) providing two substrates, namely a first substrate and a second substrate; (2) performing anodic oxidation on the first substrate, and forming porous silicon structures with different porosities on the first substrate by changing process parameters; (3) performing heat treatment on the first substrate to stabilize the porous silicon structure; (4) bonding the first substrate and the second substrate, and separating through heat treatment to form a silicon-on-insulator substrate; (5) carrying out thermal oxidation treatment on the surface of the silicon-on-insulator substrate, and removing an oxide layer by using an etching agent so as to reduce the thickness of top silicon; and (6) performing high-temperature heat treatment on the surface of the silicon-on-insulator substrate to obtain flat top silicon. The silicon-on-insulator structure prepared by the invention realizes monolithic integration of radio frequency and optical communication technologies.

Description

Technical Field

[0001] The invention belongs to the field of semiconductors, and in particular relates to a silicon-on-insulator structure and a preparation method thereof. Background Art

[0002] RF-SOI (Radio Frequency Silicon-On-Insulator) in RF applications is a semiconductor technology designed specifically for manufacturing radio frequency (RF) chips. This technology combines the advantages of the SOI (Silicon-On-Insulator) structure, that is, an insulating layer is embedded between a thin silicon top layer and the substrate. This insulator is usually made of silicon dioxide. RF-SOI is particularly optimized for RF front-end components in wireless communications, such as RF switches, low noise amplifiers (LNAs), antenna tuners, etc.

[0003] An optical waveguide is a structure or device used to transmit and control light waves, which enables light to propagate along a specific path. The working principle of an optical waveguide is based on the phenomenon of total internal reflection of light, that is, when light enters a low refractive index medium from a high refractive index medium, it will be totally reflected within a certain angle range without leaking into the external environment, so that the light is confined to propagate inside the waveguide. In some special application scenarios, such as long-distance, high-bandwidth communication links, RF-to-optical conversion technology (such as RF-over-Fiber) can be used to modulate the RF signal onto an optical carrier, transmit it over long distances through optical fiber (a special optical waveguide), and convert it back to an RF signal after reaching the other end, thus realizing the combined application of RF and optical communication technologies. To realize the function of optical communication simultaneously on an RF-SOI substrate can further promote the combination of optoelectronic technologies, and by combining some or all of the functions of the RF front-end module (such as LNA, PA, filter, etc.) with photonic technology, a more compact and low-power solution can be achieved.

[0004] Prior art CN117594522A discloses a novel silicon-on-insulator wafer and a method for preparing the same. The novel RFSOI wafer structure with low substrate leakage has lower back-gate leakage capability, but has not been combined with applications in the field of optical communications. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a silicon-on-insulator structure to realize the combined application of radio frequency and optical communication technologies.

[0006] To solve the above problems, the present invention provides a silicon-on-insulator structure, comprising a substrate; the substrate is provided with a porous silicon structure with different porosities, an oxide layer, and a top silicon layer in sequence from bottom to top.

[0007] Preferably, the substrate is P-type single crystal silicon or heavily doped P-type single crystal silicon.

[0008] Preferably, the porosity of the upper and lower layers in the porous silicon structure is higher than 50%, and the porosity of the middle layer is lower than 30%.

[0009] More preferably, the porosity of the upper and lower layers in the porous silicon structure is higher than 70%, and the porosity of the middle layer is lower than 20%.

[0010] The present invention also provides a method for preparing a silicon-on-insulator structure, comprising the following steps:

[0011] (1) providing two substrates, namely a first substrate and a second substrate;

[0012] (2) performing anodization on the first substrate to form a porous silicon structure with different porosities on the first substrate by changing process parameters;

[0013] (3) heat treating the first substrate to stabilize the porous silicon structure;

[0014] (4) bonding the first substrate and the second substrate, and separating them by heat treatment to form a silicon-on-insulator substrate;

[0015] (5) thermally oxidizing the surface of the silicon-on-insulator substrate and removing the oxide layer with an etchant to reduce the thickness of the top silicon layer;

[0016] (6) The surface of the silicon-on-insulator substrate is subjected to high-temperature heat treatment to obtain a flat top layer of silicon.

[0017] Preferably, the second substrate in step (1) is a single crystal silicon substrate with an oxide layer, and an ion implantation layer exists below the interface between the oxide layer and the substrate.

[0018] More preferably, the ions implanted into the ion implantation layer are hydrogen or helium.

[0019] Preferably, the electrolyte solution used for the anodization in step (2) is a mixed solution of hydrofluoric acid solution and anhydrous ethanol or a mixed solution of hydrofluoric acid solution, anhydrous ethanol and acetic acid.

[0020] More preferably, the electrolyte solution in step (2) is a mixed solution of 49 wt % hydrofluoric acid solution and anhydrous ethanol, with a volume ratio of 1:1.

[0021] Furthermore, the process parameters for forming the porous silicon structure with different porosities in step (2) are as follows: when the first layer is formed, the current density is 30-70 mA / cm 2 , the oxidation time is 10-60min; when the second layer is formed, the current density is 5-20mA / cm 2, the oxidation time is 10-30min; when the third layer is formed, the current density is 30-70mA / cm 2 , oxidation time is 10-60min.

[0022] Preferably, the heat treatment temperature in step (3) is 300-500°C, the atmosphere is pure oxygen or pure nitrogen, and the gas flow rate is 10-80slm; the heat treatment temperature in step (4) is 300-500°C.

[0023] Preferably, the thermal oxidation temperature in step (5) is 900-1100°C.

[0024] Preferably, the etchant in step (5) is an aqueous solution of hydrofluoric acid.

[0025] Preferably, the heat treatment method in step (6) is rapid thermal annealing, high temperature and long time annealing, or a combination of rapid thermal annealing and high temperature and long time annealing.

[0026] Preferably, the heat treatment temperature in step (6) is 1000-1200° C., the atmosphere is pure argon, pure hydrogen or a mixture of argon and hydrogen, and the gas flow rate is 10-80 slm.

[0027] Beneficial Effects

[0028] The porous silicon in the silicon-on-insulator structure prepared by the present invention can serve as a charge trapping layer to significantly reduce the loss of the radio frequency substrate, and can also serve as an optical waveguide channel, thereby realizing the monolithic integration of radio frequency and optical communication technologies. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the silicon-on-insulator structure.

[0030] Figure 2 Schematic diagram of anodization of the first substrate.

[0031] Figure 3 A schematic diagram of bonding and peeling a first substrate to a second substrate to form a silicon-on-insulator structure. DETAILED DESCRIPTION

[0032] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall within the scope limited by the appended claims of the application equally.

[0033] Example

[0034] Follow the steps below to prepare Figure 1 The silicon-on-insulator structure shown:

[0035] Two substrates are provided, namely a first substrate S1 and a second substrate S2, wherein the first substrate S1 is a single crystal silicon substrate; the second substrate S2 is a single crystal silicon substrate with an oxide layer S3, wherein an ion implantation layer exists below the interface between the oxide layer and the substrate, and the implanted ions are hydrogen or helium;

[0036] The surface of the first substrate S1 is anodized, and the electrolyte solution is a mixed solution of 49wt% hydrofluoric acid solution and anhydrous ethanol, with a volume ratio of 1:1. The process is as follows Figure 2 As shown, a porous silicon layer S4 with high porosity is formed, and the current density is 50 mA / cm 2 , the oxidation time is 30min; continue to perform anodization on the surface of the first substrate S1 to form a porous silicon layer S5 with low porosity under the porous silicon layer S4, and the current density is 10mA / cm 2 , the oxidation time is 20min; continue to perform anodization to form a porous silicon layer S6 with a high porosity similar to that of the first substrate S1 layer, and the current density is 50mA / cm 2 , oxidation time is 30min;

[0037] The first substrate S1 with the porous silicon structure is heat-treated at a temperature of 400° C., in an atmosphere of pure oxygen, with a gas flow rate of 40 slm.

[0038] like Figure 3 As shown, the first substrate and the second substrate are bonded; the bonded substrates are separated by heat treatment to form a silicon-on-insulator substrate W1 and a single crystal silicon substrate W2, and the heat treatment temperature is 500° C.;

[0039] The surface S7 of the separated silicon-on-insulator substrate W1 is thermally oxidized to form an oxide layer S8, wherein the thermal oxidation temperature is 900° C. The oxide layer S8 is etched and removed to obtain a thinned top silicon layer, wherein the etchant is a hydrofluoric acid aqueous solution;

[0040] The surface of the silicon-on-insulator substrate W1 is subjected to high-temperature heat treatment to obtain a flat top layer of silicon. The treatment temperature is 1100° C., the atmosphere is pure argon gas, and the gas flow rate is 40 slm.

Claims

1. A silicon-on-insulator structure, characterized in that: The invention comprises a substrate; the substrate is provided with a porous silicon structure with different porosities, an oxide layer and a top silicon layer in sequence from bottom to top.

2. The silicon-on-insulator structure according to claim 1, characterized in that: The porosity of the upper and lower layers in the porous silicon structure is higher than 50%, and the porosity of the middle layer is lower than 30%.

3. A method for preparing a silicon-on-insulator structure as claimed in claim 1, comprising the following steps: (1) providing two substrates, namely a first substrate and a second substrate; (2) performing anodization on the first substrate to form a porous silicon structure with different porosities on the first substrate by changing process parameters; (3) heat treating the first substrate to stabilize the porous silicon structure; (4) bonding the first substrate and the second substrate, and separating them by heat treatment to form a silicon-on-insulator substrate; (5) thermally oxidizing the surface of the silicon-on-insulator substrate and removing the oxide layer with an etchant to reduce the thickness of the top silicon layer; (6) The surface of the silicon-on-insulator substrate is subjected to high-temperature heat treatment to obtain a flat top layer of silicon.

4. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The second substrate in step (1) is a single crystal silicon substrate with an oxide layer, and an ion implantation layer exists below the interface between the oxide layer and the substrate.

5. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The electrolyte solution used for the anodic oxidation in step (2) is a mixed solution of hydrofluoric acid solution and anhydrous ethanol or a mixed solution of hydrofluoric acid solution, anhydrous ethanol and acetic acid.

6. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The process parameters for forming the porous silicon structure with different porosities in step (2) are as follows: when the first layer is formed, the current density is 30-70 mA / cm 2 , the oxidation time is 10-60min; when the second layer is formed, the current density is 5-20mA / cm 2 , the oxidation time is 10-30min; when the third layer is formed, the current density is 30-70mA / cm 2 , oxidation time is 10-60min.

7. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The heat treatment temperature in step (3) is 300-500°C, the atmosphere is pure oxygen or pure nitrogen, and the gas flow rate is 10-80slm; the heat treatment temperature in step (4) is 300-500°C.

8. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The thermal oxidation temperature in step (5) is 900-1100°C.

9. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The heat treatment method in step (6) is rapid thermal annealing, high temperature and long time annealing, or a combination of rapid thermal annealing and high temperature and long time annealing.

10. The method for preparing a silicon-on-insulator structure according to claim 3, characterized in that: The heat treatment temperature in step (6) is 1000-1200° C., the atmosphere is pure argon, pure hydrogen or a mixture of argon and hydrogen, and the gas flow rate is 10-80 slm.

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