New energy station electromagnetic transient model conversion method and related device
By obtaining and converting FPGA model files or CPU model files from different manufacturers in the emulator, the problem of manual reconstruction model in the existing technology is solved, and efficient electromagnetic transient model conversion of new energy stations is achieved, which improves the efficiency of grid-connected detection services.
Patent Information
- Application Number
- CN202411851042.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2044-12-16
AI Technical Summary
When the existing technology combines equipment models from different manufacturers into the overall model of new energy stations, it is necessary to manually remodel several equipment models under a hardware-in-ring simulation platform, which is a large workload, which reduces the efficiency of batches of new energy station grid-connected inspection services.
A new energy station electromagnetic transient model conversion method is provided. By obtaining the FPGA model file or CPU model file selected by the user in the emulator, and converting the model components based on the preset FPGA model conversion strategy or CPU model conversion strategy, generating the FPGA model file or CPU model file based on the preset format.
It realizes batch conversion of simulation models provided by different manufacturers into file formats available to the simulator, saving testers' workload of manual modeling and engineering configuration, and improving the working efficiency of grid-connected testing of new energy stations.
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Figure CN119623104A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electromagnetic transient simulation, and in particular to a method for converting an electromagnetic transient model of a new energy station and related devices. Background Art
[0002] There are many electromagnetic transient simulation platforms used in electrical engineering, such as RTDS, RT-LAB, MATLAB, PSCAD, etc. These platforms have corresponding hardware-in-the-loop modeling and simulation solutions for new energy stations, and occupy a considerable market share among users. However, these platforms are competitors to each other, and the models and engineering configuration files used by the platforms are not universal. When it is necessary to combine equipment models from different manufacturers into an overall model of a new energy station, it is often necessary to manually re-model several equipment models under a hardware-in-the-loop simulation platform to unify the model and engineering configuration file format, which is a large workload and reduces the efficiency of batch-based new energy station grid-connected testing services. Summary of the invention
[0003] The present invention provides a method and related devices for converting an electromagnetic transient model of a new energy station, which are used to solve the technical problem that in the prior art, when combining equipment models of different manufacturers into an overall model of a new energy station, it is necessary to manually remodel several equipment models on a hardware-in-the-loop simulation platform, which results in a large workload and reduces the efficiency of carrying out grid-connected detection services for new energy stations in batches.
[0004] In view of this, a first aspect of the present invention provides a method for converting an electromagnetic transient model of a new energy station, comprising the following steps:
[0005] S1. Obtaining a model file to be converted selected by a user in a simulator, wherein the model file to be converted is an FPGA model file or a CPU model file, wherein the FPGA model file is a circuit model file running in an FPGA, and the CPU model file is a circuit model file running in a CPU;
[0006] S2. If the model file to be converted is an FPGA model file, based on a preset FPGA model conversion strategy, the model elements in the model file to be converted are converted to generate an FPGA model file based on a preset format;
[0007] S3. If the model file to be converted is a CPU model file, based on a preset CPU model conversion strategy, the model elements in the model file to be converted are converted to generate a CPU model file based on the preset format.
[0008] Optionally, step S2 includes:
[0009] S21, if the model file to be converted is an FPGA model file, then search whether there is an AC voltage source, an AC current source or a DC voltage source in the model file to be converted, if so, replace the AC voltage source, the AC current source and the DC voltage source with a controlled source form, and jump to step S22, if not, do not make any adjustment, and jump to step S22;
[0010] S22, determining whether there are annotated components in the model file to be converted, if yes, deleting the annotated components and jumping to step S23, if no, no adjustment is made and jumping to step S23;
[0011] S23, searching for the connection status of all electrical ports of the electrical components in the model file to be converted and electrical components other than the electrical components, and when an electrical component with a dangling electrical port is found, the entire branch is indexed through the electrical component with the dangling electrical port, and the entire branch is deleted. After traversing all electrical components, jump to step S24;
[0012] S24, searching for the control signal ports of all electrical components in the model file to be converted, adding Inport elements to each port in turn and automatically numbering them, searching for the measurement signal ports of all electrical components in the model file to be converted, adding Outport elements to each port in turn and automatically numbering them, and jumping to step S25;
[0013] S25, retrieving the model attributes of the model file to be converted, extracting the m file defining the model parameters, saving each parameter name and the corresponding parameter value in the m file as a preset format, and jumping to step S26;
[0014] S26. Search whether there are parameters defined by formulas in the model file to be converted. If yes, calculate the actual value of the parameter according to the formula, assign the actual value to the original parameter value position, and obtain an FPGA model file based on a preset format. If no, directly obtain an FPGA model file based on a preset format.
[0015] Optionally, in step S25, the storing of each parameter name and corresponding parameter value in the m file in a preset format includes:
[0016] Determine whether the parameter values corresponding to the parameter names in the m file need to be calculated through parameters other than the parameter itself. If so, first calculate the parameter values for the parameters that need to be calculated, and then save the parameter names and corresponding parameter values as the preset format. If not, directly save the parameter names and corresponding parameter values as the preset format.
[0017] Optionally, step S3 includes:
[0018] S31, if the model file to be converted is a CPU model file, find out the three-phase voltage source in the model file to be converted, and jump to step S32;
[0019] S32, taking the three-phase voltage source as the root node, searching for the branches of each component step by step downward until the entire connected component tree is searched, and then jumping to step S33;
[0020] S33, copying the component tree to the newly created model file, searching for the SVG module in the newly created model file, replacing the SVG module with the current source, and jumping to step S34;
[0021] S34, creating a new FPGA model file based on the SVG module, setting the model parameters of the FPGA model file based on the SVG module according to the SVG module parameters in the CPU model file, mapping the IO signals of the FPGA model file based on the SVG module to the CPU model file, and jumping to step S35;
[0022] S35, reading the IO interface configuration of the CPU model file from the simulator hardware-in-the-loop interface configuration file, obtaining the mapping relationship between the analog digital signal and the IO interface, and jumping to step S36;
[0023] S36. Re-compile the mapping relationship between the analog-to-digital signal and the IO interface into a file in the preset format, delete all the elements recording the mapping relationship between the analog-to-digital signal and the IO interface, and obtain a CPU model file based on the preset format.
[0024] Optionally, in step S35, the mapping relationship between the analog digital signal and the IO interface includes the mapping relationship between the analog output signal of the SVG module-based FPGA model file and the IO interface, the mapping relationship between the digital input signal of the SVG module-based FPGA model file and the IO interface, the mapping relationship between the analog output signal of the CPU model file and the IO interface, and the mapping relationship between the digital input signal of the CPU model file and the IO interface.
[0025] Optionally, in step S35, the mapping relationship between the analog output signal and the IO interface of the FPGA model file based on the SVG module is obtained by retrieving the channel tab of the Analog Output Mapping and Resacling block Control Panel element in the CPU model file;
[0026] Obtaining a mapping relationship between a digital quantity input signal and an IO interface in the FPGA model file based on the SVG module by retrieving a Gates object in an eHS CPU Block in the CPU model file;
[0027] Taking the OpFcnCommonAnalogOut object in the CPU model file as the parent node, indexing to the first complete component tree for configuring the analog output signal of the CPU model file, parsing the first complete component tree, and obtaining the mapping relationship between the analog output signal of the CPU model file and the IO interface;
[0028] Taking the OpFcnCommonDigitalIn object in the CPU model file as the parent node, indexing to the second complete component tree for configuring the digital input signal of the CPU model file, parsing the second complete component tree, and obtaining the mapping relationship between the digital input signal of the CPU model file and the IO interface.
[0029] Optionally, the preset format is CSV format.
[0030] The second aspect of the present invention provides a new energy station electromagnetic transient model conversion device, comprising the following modules:
[0031] An acquisition module, used for acquiring a model file to be converted selected by a user in the simulator, wherein the model file to be converted is an FPGA model file or a CPU model file, wherein the FPGA model file is a circuit model file running in the FPGA, and the CPU model file is a circuit model file running in the CPU;
[0032] An FPGA model conversion module, for converting the model elements in the model file to be converted based on a preset FPGA model conversion strategy to generate an FPGA model file based on a preset format if the model file to be converted is an FPGA model file;
[0033] The CPU model conversion module is used to convert the model elements in the model file to be converted based on a preset CPU model conversion strategy if the model file to be converted is a CPU model file, so as to generate a CPU model file based on the preset format.
[0034] A third aspect of the present invention provides a new energy station electromagnetic transient model conversion device, the device comprising a processor and a memory:
[0035] The memory is used to store program codes and transmit the program codes to the processor;
[0036] The processor is used to execute the electromagnetic transient model conversion method of the new energy station described in any one of the first aspects according to the instructions in the program code.
[0037] A fourth aspect of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store program code, and the program code is used to execute the electromagnetic transient model conversion method of the new energy station described in any one of the first aspects.
[0038] It can be seen from the above technical solutions that the electromagnetic transient model conversion method of the new energy station provided by the present invention has the following advantages:
[0039] The electromagnetic transient model conversion method for a new energy station provided by the present invention obtains an FPGA model file or a CPU model file selected by a user in a simulator. For an FPGA model file, based on a preset FPGA model conversion strategy, the model elements in the model file to be converted are converted to generate an FPGA model file based on a preset format; for a CPU model file, based on a preset CPU model conversion strategy, the model elements in the model file to be converted are converted to generate a CPU model file based on a preset format. The electromagnetic transient model conversion method for a new energy station provided by the present invention can batch convert simulation models provided by different manufacturers into a file format that can be used by the simulator, saving the workload of test personnel manually remodeling and reconfiguring the project, improving the work efficiency of the grid-connected test of the new energy station, and solving the technical problem that the prior art needs to manually remodel several device models under a hardware-in-the-loop simulation platform when combining device models of different manufacturers into an overall model of a new energy station, which is labor-intensive and reduces the efficiency of batch-carrying out grid-connected detection services for new energy stations. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0041] Figure 1 A schematic diagram of a flow chart of a method for converting an electromagnetic transient model of a new energy station provided in an embodiment of the present invention;
[0042] Figure 2 A schematic diagram of the FPGA model conversion strategy flow provided in an embodiment of the present invention;
[0043] Figure 3 A schematic diagram of adding an Inport element provided in an embodiment of the present invention;
[0044] Figure 4 A schematic diagram of adding an Outport element provided in an embodiment of the present invention;
[0045] Figure 5 A schematic diagram of a CPU model conversion strategy provided in an embodiment of the present invention;
[0046] Figure 6 A schematic diagram of replacing an SVG module with a current source provided in an embodiment of the present invention;
[0047] Figure 7 A schematic diagram of obtaining a mapping relationship between an analog output signal and an IO interface of an FPGA model file based on an SVG module in an embodiment of the present invention;
[0048] Figure 8 A schematic diagram of obtaining a mapping relationship between an analog output signal and an IO interface of an FPGA model file based on an SVG module provided in an embodiment of the present invention;
[0049] Fig. 9 A schematic diagram of obtaining a mapping relationship between an analog output signal of a CPU model file and an IO interface provided in an embodiment of the present invention;
[0050] Fig.10 A schematic diagram of obtaining a mapping relationship between a digital quantity input signal of a CPU model file and an IO interface provided in an embodiment of the present invention;
[0051] Fig.11 It is a structural schematic diagram of an electromagnetic transient model conversion device for a new energy station provided in an embodiment of the present invention;
[0052] Fig.12 It is a structural schematic diagram of an electromagnetic transient model conversion device for a new energy station provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0053] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0054] For easier understanding, see Figure 1 The present invention provides an embodiment of a method for converting an electromagnetic transient model of a new energy station, comprising the following steps:
[0055] Step S1, obtaining a model file to be converted selected by a user in a simulator, where the model file to be converted is an FPGA model file or a CPU model file, where the FPGA model file is a circuit model file running in an FPGA, and the CPU model file is a circuit model file running in a CPU.
[0056] It should be noted that in the electromagnetic transient simulation of new energy stations, some circuit models run in FPGA chips, and some circuit models run in CPU chips. Specifically, the MMC (Modular Multilevel Converter) model runs in the FPGA chip, and the circuit models other than the MMC model run in the CPU chip. The circuit model in the FPGA chip and the circuit model in the CPU chip perform signal association based on the source file. In an embodiment of the present invention, the user first selects the model file to be converted and the path to save the converted file in the simulator. After the user sends a start conversion instruction to the simulator, the simulator can obtain the model file to be converted selected by the user and identify whether the model file to be converted selected by the user is an FPGA model file or a CPU model file.
[0057] Step S2: If the model file to be converted is an FPGA model file, based on a preset FPGA model conversion strategy, the model elements in the model file to be converted are converted to generate an FPGA model file based on a preset format.
[0058] It should be noted that the simulator has a preset FPGA model conversion strategy for converting FPGA model files of other platforms (such as RT-LAB platform) into FPGA model files in a preset format that can be used by the simulator.
[0059] In one embodiment, Figure 2 As shown, the preset FPGA model conversion strategy specifically includes the following steps:
[0060] Step S21: If the model file to be converted is an FPGA model file, search whether there is an AC voltage source, AC current source or DC voltage source in the model file to be converted. If so, replace the AC voltage source, AC current source and DC voltage source with a controlled source form and jump to step S22. If not, do not make any adjustment and jump to step S22.
[0061] It should be noted that after starting the model conversion, the simulator first searches whether the model in the model file to be converted has an AC voltage source, an AC current source or a DC voltage source. If so, the AC voltage source, the AC current source and the DC voltage source are replaced with controlled source forms, that is, if there is an AC voltage source, the AC voltage source is converted into the corresponding controlled voltage source; if there is an AC current source, the AC current source is converted into the corresponding controlled current source; if there is a DC voltage source, the DC voltage source is converted into the corresponding controlled current source.
[0062] Step S22, determine whether there are annotated components in the model file to be converted, if yes, delete the annotated components and jump to step S23, if no, do not make any adjustments and jump to step S23.
[0063] It should be noted that the annotated component is an isolated component, so the annotated component needs to be deleted.
[0064] Step S23, retrieve the connection status of all electrical ports of the electrical components in the model file to be converted and the electrical components other than themselves. When an electrical component with a dangling electrical port is retrieved, the entire branch where the electrical component with the dangling electrical port is located is indexed, and the entire branch is deleted. After traversing all electrical components, jump to step S24.
[0065] It should be noted that when searching for all electrical ports of the electrical components in the model file canvas to be converted, whether they are connected to electrical components other than themselves, when an electrical component with a dangling electrical port is found, the entire branch where the component is located is indexed through the component and the entire branch is deleted.
[0066] Step S24, search for the control signal ports of all electrical components in the model file to be converted, add Inport components to each port in turn and automatically number them, search for the measurement signal ports of all electrical components in the model file to be converted, add Outport components to each port in turn and automatically number them, and jump to step S25.
[0067] It should be noted that the control signal ports of all electrical components in the model file to be converted are retrieved, and Inport components are added to each port in turn and automatically numbered, such as Figure 3 The numbers 16 and 17 are shown. Search for the measurement signal ports of all electrical components in the model file to be converted, add Outport components to each port in turn and automatically number them, such as Figure 4 Number 13, number 14 and number 15 shown.
[0068] Step S25, retrieve the model attributes of the model file to be converted, extract the m file that defines the model parameters, save each parameter name and corresponding parameter value in the m file as a preset format, and jump to step S26.
[0069] It should be noted that the Model Properties of the model file to be converted are retrieved, i.e., the model properties, the m file defining the model parameters is extracted, and each parameter name and the corresponding parameter value in the m file are saved in a preset format (such as CSV format). When saving each parameter name and the corresponding parameter value in the m file in a preset format, it is determined whether the parameter value corresponding to each parameter name in the m file has a parameter that needs to be calculated by parameters other than the parameter itself. If so, the parameter value of the parameter to be calculated is calculated first (for example, there is a parameter in the software expressed as a*b / c, and by searching the m file, it is known that a = 0.5, b = 0.2, c = 0.1, then the parameter will be converted to 10), and then each parameter name and the corresponding parameter value are saved in a preset format. If not, each parameter name and the corresponding parameter value are directly saved in a preset format.
[0070] Step S26, search whether there are parameters defined by formulas in the model file to be converted. If so, calculate the actual value of the parameter according to the formula, assign the actual value to the original parameter value position, and obtain an FPGA model file based on the preset format. If not, directly obtain an FPGA model file based on the preset format.
[0071] It should be noted that it is necessary to search whether there are parameters defined by formulas in the model file to be converted. If so, the actual value of the parameter will be calculated based on the formula (for example, if a parameter is expressed as "10*0.2 / 5" in the model, then the parameter will be converted to 0.4), and the actual value will be assigned to the original parameter value position to obtain an FPGA model file based on a preset format. That is, the final FPGA model file based on a preset format is a file in a preset format that contains an FPGA model and records the model parameters.
[0072] Step S3: If the model file to be converted is a CPU model file, based on a preset CPU model conversion strategy, the model elements in the model file to be converted are converted to generate a CPU model file based on a preset format.
[0073] It should be noted that the simulator has a preset CPU model conversion strategy for converting CPU model files of other platforms (such as RT-LAB platform) into CPU model files in a preset format that can be used by the simulator.
[0074] In one embodiment, Figure 5 As shown, the preset CPU model conversion strategy specifically includes the following steps:
[0075] Step S31: If the model file to be converted is a CPU model file, find out the three-phase voltage source in the model file to be converted, and jump to step S32.
[0076] It should be noted that if the model file to be converted is a CPU model file, the three-phase voltage source in the circuit model of the model file to be converted is retrieved.
[0077] Step S32, taking the three-phase voltage source as the root node, searching for the branches of each component step by step downward until the entire connected component tree is searched, and then jumping to step S33.
[0078] Step S33, copy the component tree to the newly created model file, search for the SVG module in the newly created model file, replace the SVG module with the current source, and jump to step S34.
[0079] It should be noted that, copy the component tree to the newly created model file, find the SVG (Static Var Generator) module in the newly created model file, and replace the SVG module with a current source, such as Figure 6 shown.
[0080] Step S34, create a new FPGA model file based on the SVG module, set the model parameters of the FPGA model file based on the SVG module according to the SVG module parameters in the CPU model file, map the IO signals of the FPGA model file based on the SVG module to the CPU model file, and jump to step S35.
[0081] It should be noted that a new FPGA model file based on the SVG module is created in the simulator, the model parameters of the new FPGA model file based on the SVG module are set according to the SVG module parameters in the CPU model file (i.e., the original model file to be converted), and the IO signals of the FPGA model file based on the SVG module are mapped to the CPU model file (i.e., the original model file to be converted).
[0082] Step S35, read the IO interface configuration of the CPU model file from the simulator hardware-in-the-loop interface configuration file, obtain the mapping relationship between the analog digital signal and the IO interface, and jump to step S36.
[0083] It should be noted that the IO interface configuration of the CPU model file (i.e., the original model file to be converted) is read from the simulator hardware-in-the-loop interface configuration file (i.e., the conf file of the RT-LAB platform) to obtain the mapping relationship between the analog digital signal and the IO interface in the CPU model file (i.e., the original model file to be converted).
[0084] In one embodiment, the mapping relationship between analog quantity digital quantity signals and IO interfaces includes the mapping relationship between analog quantity output signals of FPGA model files based on SVG modules and IO interfaces, the mapping relationship between digital quantity input signals of FPGA model files based on SVG modules and IO interfaces, the mapping relationship between analog quantity output signals of CPU model files and IO interfaces, and the mapping relationship between digital quantity input signals of CPU model files and IO interfaces. Figure 7 As shown in the figure, by retrieving the channel tab of the Analog Output Mapping and Resacling block Control Panel component in the CPU model file, the mapping relationship between the analog output signal and the IO interface of the FPGA model file based on the SVG module is obtained. Figure 8 As shown, by retrieving the Gates object in the eHS CPU Block in the CPU model file, the mapping relationship between the digital input signal and the IO interface in the FPGA model file based on the SVG module is obtained. Fig. 9 As shown, the OpFcnCommonAnalogOut object in the CPU model file is used as the parent node, and the first complete component tree for configuring the analog output signal of the CPU model file is indexed, and the first complete component tree is parsed to obtain the mapping relationship between the analog output signal of the CPU model file and the IO interface. Fig.10 As shown, the OpFcnCommonDigitalIn object in the CPU model file is used as the parent node, the second complete component tree for configuring the digital input signal of the CPU model file is indexed, the second complete component tree is parsed, and the mapping relationship between the digital input signal of the CPU model file and the IO interface is obtained.
[0085] Step S36, re-compiling the mapping relationship between the analog digital signal and the IO interface into a file in a preset format, deleting all the elements recording the mapping relationship between the analog digital signal and the IO interface, and obtaining a CPU model file based on the preset format.
[0086] It should be noted that the mapping relationship between the analog digital signal and the IO interface obtained in step S35 is re-compiled into a file in a preset format. The elements that record these mapping relationships will cause the simulator to report an error when loading the model. Therefore, it is necessary to delete all the elements that record the mapping relationship between the analog digital signal and the IO interface to obtain a CPU model file based on the preset format, which includes an FPGA model based on the SVG module, a CPU model without various components required for compilation of the original simulation platform (i.e., RT-LAB platform) except the SVG module, and a preset format file that records the mapping relationship between analog digital signals.
[0087] The electromagnetic transient model conversion method for a new energy station provided by the present invention obtains an FPGA model file or a CPU model file selected by a user in a simulator. For an FPGA model file, based on a preset FPGA model conversion strategy, the model elements in the model file to be converted are converted to generate an FPGA model file based on a preset format; for a CPU model file, based on a preset CPU model conversion strategy, the model elements in the model file to be converted are converted to generate a CPU model file based on a preset format. The electromagnetic transient model conversion method for a new energy station provided by the present invention can batch convert simulation models provided by different manufacturers into a file format that can be used by the simulator, saving the workload of test personnel manually remodeling and reconfiguring the project, improving the work efficiency of the grid-connected test of the new energy station, and solving the technical problem that the prior art needs to manually remodel several device models under a hardware-in-the-loop simulation platform when combining device models of different manufacturers into an overall model of a new energy station, which is labor-intensive and reduces the efficiency of batch-carrying out grid-connected detection services for new energy stations.
[0088] For easier understanding, see Fig.11 The present invention provides an embodiment of a new energy station electromagnetic transient model conversion device, including the following modules:
[0089] An acquisition module is used to acquire a model file to be converted selected by a user in the simulator, where the model file to be converted is an FPGA model file or a CPU model file, where the FPGA model file is a circuit model file running in the FPGA, and the CPU model file is a circuit model file running in the CPU;
[0090] The FPGA model conversion module is used for converting the model elements in the model file to be converted based on a preset FPGA model conversion strategy to generate an FPGA model file based on a preset format if the model file to be converted is an FPGA model file;
[0091] The CPU model conversion module is used to convert the model elements in the model file to be converted based on a preset CPU model conversion strategy if the model file to be converted is a CPU model file, so as to generate a CPU model file based on a preset format.
[0092] In one embodiment, the FPGA model conversion module is specifically used to perform the following steps:
[0093] S21, if the model file to be converted is an FPGA model file, search whether there is an AC voltage source, an AC current source or a DC voltage source in the model file to be converted, if so, replace the AC voltage source, the AC current source and the DC voltage source with a controlled source form, and jump to step S22, if not, do not make any adjustment, and jump to step S22;
[0094] S22, determining whether there are annotated components in the model file to be converted, if yes, deleting the annotated components and jumping to step S23, if no, no adjustment is made and jumping to step S23;
[0095] S23, searching for the connection status of all electrical ports of the electrical components in the model file to be converted with electrical components other than the electrical components themselves, and when an electrical component with a dangling electrical port is found, the entire branch where the electrical component with the dangling electrical port is located is indexed, and the entire branch is deleted. After traversing all electrical components, jump to step S24;
[0096] S24, searching for control signal ports of all electrical components in the model file to be converted, adding Inport components to each port in turn and automatically numbering them, searching for measurement signal ports of all electrical components in the model file to be converted, adding Outport components to each port in turn and automatically numbering them, and jumping to step S25;
[0097] S25, searching for the model attributes of the model file to be converted, extracting the m file defining the model parameters, saving each parameter name and the corresponding parameter value in the m file as a preset format, and jumping to step S26;
[0098] S26. Search whether there are parameters defined by formulas in the model file to be converted. If yes, calculate the actual value of the parameter according to the formula, assign the actual value to the original parameter value position, and obtain an FPGA model file based on a preset format. If no, directly obtain an FPGA model file based on a preset format.
[0099] In one embodiment, in step S25, each parameter name and corresponding parameter value in the m file is saved in a preset format, including:
[0100] Determine whether the parameter values corresponding to the parameter names in the m file need to be calculated through parameters other than the parameter itself. If so, first calculate the parameter values for the parameters that need to be calculated, and then save the parameter names and corresponding parameter values as the preset format. If not, directly save the parameter names and corresponding parameter values as the preset format.
[0101] In one embodiment, the CPU model conversion module is specifically used to perform the following steps:
[0102] S31, if the model file to be converted is a CPU model file, find out the three-phase voltage source in the model file to be converted, and jump to step S32;
[0103] S32, taking the three-phase voltage source as the root node, searching for the branches of each component step by step downward until the entire connected component tree is searched, and then jumping to step S33;
[0104] S33, copy the component tree to the newly created model file, search for the SVG module in the newly created model file, replace the SVG module with the current source, and jump to step S34;
[0105] S34, create a new FPGA model file based on the SVG module, set the model parameters of the FPGA model file based on the SVG module according to the SVG module parameters in the CPU model file, map the IO signals of the FPGA model file based on the SVG module to the CPU model file, and jump to step S35;
[0106] S35, reading the IO interface configuration of the CPU model file from the simulator hardware-in-the-loop interface configuration file, obtaining the mapping relationship between the analog digital signal and the IO interface, and jumping to step S36;
[0107] S36, re-compiling the mapping relationship between the analog digital signal and the IO interface into a file of a preset format, deleting all the elements recording the mapping relationship between the analog digital signal and the IO interface, and obtaining a CPU model file based on the preset format.
[0108] In one embodiment, in step S35, the mapping relationship between the analog digital signal and the IO interface includes a mapping relationship between an analog output signal of an FPGA model file based on an SVG module and the IO interface, a mapping relationship between a digital input signal of an FPGA model file based on an SVG module and the IO interface, a mapping relationship between an analog output signal of a CPU model file and the IO interface, and a mapping relationship between a digital input signal of a CPU model file and the IO interface;
[0109] By retrieving the Gates object in the eHS CPU Block in the CPU model file, the mapping relationship between the digital input signal and the IO interface in the FPGA model file based on the SVG module is obtained;
[0110] Taking the OpFcnCommonAnalogOut object in the CPU model file as the parent node, indexing to the first complete component tree for configuring the analog output signal of the CPU model file, parsing the first complete component tree, and obtaining the mapping relationship between the analog output signal of the CPU model file and the IO interface;
[0111] Taking the OpFcnCommonDigitalIn object in the CPU model file as the parent node, indexing to the second complete component tree for configuring the digital input signal of the CPU model file, parsing the second complete component tree, and obtaining the mapping relationship between the digital input signal of the CPU model file and the IO interface.
[0112] In one embodiment, the preset format is a CSV format.
[0113] For easier understanding, see Fig.12 The present invention also provides an embodiment of a new energy station electromagnetic transient model conversion device, the device comprising a processor and a memory:
[0114] The memory is used to store the program code and transmit the program code to the processor;
[0115] The processor is used to execute any one of the aforementioned implementation methods of the electromagnetic transient model conversion method for the new energy station according to the instructions in the program code.
[0116] The present invention also provides an embodiment of a computer-readable storage medium, which is used to store program code, and the program code is used to execute any one of the aforementioned embodiments of the electromagnetic transient model conversion method for new energy stations.
[0117] The present invention also provides an embodiment of a computer program product including instructions, which, when executed on a computer, enables the computer to execute any one of the aforementioned embodiments of the electromagnetic transient model conversion method for a new energy station.
[0118] The electromagnetic transient model conversion device, equipment, computer-readable storage medium and computer program product including instructions provided in the present invention are all used to execute the electromagnetic transient model conversion method of the new energy station provided in the present invention. The principles and technical effects achieved are the same as those of the electromagnetic transient model conversion method of the new energy station provided in the present invention, and will not be repeated here.
[0119] The terms "first", "second", etc. in the specification of the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0120] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for converting electromagnetic transient models of new energy stations, characterized in that: The following steps are involved: S1. Obtaining a model file to be converted selected by a user in a simulator, wherein the model file to be converted is an FPGA model file or a CPU model file, wherein the FPGA model file is a circuit model file running in an FPGA, and the CPU model file is a circuit model file running in a CPU; S2. If the model file to be converted is an FPGA model file, based on a preset FPGA model conversion strategy, the model elements in the model file to be converted are converted to generate an FPGA model file based on a preset format; S3. If the model file to be converted is a CPU model file, based on a preset CPU model conversion strategy, the model elements in the model file to be converted are converted to generate a CPU model file based on the preset format.
2. The method for converting electromagnetic transient model of new energy station according to claim 1 is characterized in that: Step S2 includes: S21, if the model file to be converted is an FPGA model file, then search whether there is an AC voltage source, an AC current source or a DC voltage source in the model file to be converted, if so, replace the AC voltage source, the AC current source and the DC voltage source with a controlled source form, and jump to step S22, if not, do not make any adjustment, and jump to step S22; S22, determining whether there are annotated components in the model file to be converted, if yes, deleting the annotated components and jumping to step S23, if no, no adjustment is made and jumping to step S23; S23, searching for the connection status of all electrical ports of the electrical components in the model file to be converted and electrical components other than the electrical components, and when an electrical component with a dangling electrical port is found, the entire branch is indexed through the electrical component with the dangling electrical port, and the entire branch is deleted. After traversing all electrical components, jump to step S24; S24, searching for the control signal ports of all electrical components in the model file to be converted, adding Inport elements to each port in turn and automatically numbering them, searching for the measurement signal ports of all electrical components in the model file to be converted, adding Outport elements to each port in turn and automatically numbering them, and jumping to step S25; S25, retrieving the model attributes of the model file to be converted, extracting the m file defining the model parameters, saving each parameter name and the corresponding parameter value in the m file as a preset format, and jumping to step S26; S26. Search whether there are parameters defined by formulas in the model file to be converted. If yes, calculate the actual value of the parameter according to the formula, assign the actual value to the original parameter value position, and obtain an FPGA model file based on a preset format. If no, directly obtain an FPGA model file based on a preset format.
3. The method for converting the electromagnetic transient model of a new energy station according to claim 2 is characterized in that: In step S25, the parameter names and corresponding parameter values in the m file are stored in a preset format, including: Determine whether the parameter values corresponding to the parameter names in the m file need to be calculated through parameters other than the parameter itself. If so, first calculate the parameter values for the parameters that need to be calculated, and then save the parameter names and corresponding parameter values as the preset format. If not, directly save the parameter names and corresponding parameter values as the preset format.
4. The method for converting electromagnetic transient model of new energy station according to claim 1 is characterized in that: Step S3 includes: S31, if the model file to be converted is a CPU model file, find out the three-phase voltage source in the model file to be converted, and jump to step S32; S32, taking the three-phase voltage source as the root node, searching for the branches of each component step by step downward until the entire connected component tree is searched, and then jumping to step S33; S33, copying the component tree to the newly created model file, searching for the SVG module in the newly created model file, replacing the SVG module with the current source, and jumping to step S34; S34, creating a new FPGA model file based on the SVG module, setting the model parameters of the FPGA model file based on the SVG module according to the SVG module parameters in the CPU model file, mapping the IO signals of the FPGA model file based on the SVG module to the CPU model file, and jumping to step S35; S35, reading the IO interface configuration of the CPU model file from the simulator hardware-in-the-loop interface configuration file, obtaining the mapping relationship between the analog digital signal and the IO interface, and jumping to step S36; S36. Re-compile the mapping relationship between the analog-to-digital signal and the IO interface into a file in the preset format, delete all the elements recording the mapping relationship between the analog-to-digital signal and the IO interface, and obtain a CPU model file based on the preset format.
5. The method for converting electromagnetic transient model of new energy station according to claim 4 is characterized in that: In step S35, the mapping relationship between the analog digital signal and the IO interface includes the mapping relationship between the analog output signal of the FPGA model file based on the SVG module and the IO interface, the mapping relationship between the digital input signal of the FPGA model file based on the SVG module and the IO interface, the mapping relationship between the analog output signal of the CPU model file and the IO interface, and the mapping relationship between the digital input signal of the CPU model file and the IO interface.
6. The method for converting electromagnetic transient models of new energy stations according to claim 5 is characterized in that: In step S35, the mapping relationship between the analog output signal and the IO interface of the FPGA model file based on the SVG module is obtained by retrieving the channel tab of the Analog Output Mapping and Resacling block ControlPanel element in the CPU model file; Obtaining a mapping relationship between a digital quantity input signal and an IO interface in the FPGA model file based on the SVG module by retrieving a Gates object in an eHS CPU Block in the CPU model file; Taking the OpFcnCommonAnalogOut object in the CPU model file as the parent node, indexing to the first complete component tree for configuring the analog output signal of the CPU model file, parsing the first complete component tree, and obtaining the mapping relationship between the analog output signal of the CPU model file and the IO interface; Taking the OpFcnCommonDigitalIn object in the CPU model file as the parent node, indexing to the second complete component tree for configuring the digital input signal of the CPU model file, parsing the second complete component tree, and obtaining the mapping relationship between the digital input signal of the CPU model file and the IO interface.
7. The method for converting the electromagnetic transient model of a new energy station according to any one of claims 1 to 6, characterized in that: The preset format is CSV format.
8. A new energy station electromagnetic transient model conversion device, characterized in that: Includes the following modules: An acquisition module is used to acquire a model file to be converted selected by a user in the simulator, wherein the model file to be converted is an FPGA model file or a CPU model file, wherein the FPGA model file is a circuit model file running in the FPGA, and the CPU model file is a circuit model file running in the CPU; An FPGA model conversion module, for converting the model elements in the model file to be converted based on a preset FPGA model conversion strategy to generate an FPGA model file based on a preset format if the model file to be converted is an FPGA model file; The CPU model conversion module is used to convert the model elements in the model file to be converted based on a preset CPU model conversion strategy if the model file to be converted is a CPU model file, so as to generate a CPU model file based on the preset format.
9. A new energy station electromagnetic transient model conversion device, characterized in that: The device comprises a processor and a memory: The memory is used to store program codes and transmit the program codes to the processor; The processor is used to execute the electromagnetic transient model conversion method of the new energy station according to any one of claims 1-7 according to the instructions in the program code.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store program code, and the program code is used to execute the electromagnetic transient model conversion method of the new energy station described in any one of claims 1-7.
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