Core board with anti-reverse-plugging function

Abstract

The utility model discloses a core board with an anti-reverse-plugging function, which relates to the technical field of electronic board cards and comprises a board card and four board-to-board connectors, a control module, a memory module, a storage module, a starting module and a power supply module are sequentially arranged in the board card, and the four board-to-board connectors are connected with a mainboard interface of the board card. Through the arrangement of horizontal dislocation and height difference of the four board-to-board connectors, an anti-reverse-insertion function is realized, even if a user neglects an arrow mounting mark on a board card, the board card cannot be reversely inserted on a matched bottom plate, the defects in design, compatibility and reliability in the prior art can be overcome, and the board card is prevented from being reversely inserted into the matched bottom plate. And the performance and reliability of the intelligent module board card in the application of the Internet of Things and artificial intelligence are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic boards and cards, in particular to a core board with an anti-reverse insertion function. Background Art

[0002] With the rapid development of Internet technology and the continuous growth of demand for smart products, the application of smart module boards in the fields of Internet of Things (IoT) and artificial intelligence is becoming more and more extensive. These smart module boards are usually integrated with high-performance CPU controllers to meet the needs of complex data processing and intelligent decision-making. However, due to the differences in structural dimensions, chip pin definition and sorting, interface functions, etc., boards produced by different manufacturers face compatibility and interoperability issues in actual applications. In addition, the current connection design is prone to damage to the board due to incorrect installation direction, which not only increases the difficulty of development, but also greatly increases costs and maintenance losses.

[0003] These problems highlight the shortcomings of the existing technology in terms of design, compatibility and reliability, and there is an urgent need for a new technical solution that can overcome these limitations and improve the performance and reliability of smart module boards in Internet of Things and artificial intelligence applications. Therefore, the present invention aims to propose a smart module board and its connection method that are highly compatible, easy to install and reduce the risk of damage through innovative design ideas and technical means to solve the above-mentioned problems of the prior art. Utility Model Content

[0004] The utility model aims to provide a core board with an anti-reverse insertion function to solve the problems raised in the above background technology.

[0005] To achieve the above object, the utility model provides the following technical solution: a core board with an anti-reverse insertion function, comprising a board card, wherein the board card is provided with a control module, a memory module, a storage module, a startup module, a power module and four board-to-board connectors in sequence, and the memory module, the storage module, the startup module and the power module are all electrically connected to the control module, and the four board-to-board connectors are connected to the mainboard interface of the board card;

[0006] The board-to-board connector includes a connector P1, a connector P2, a connector P3, and a connector P4, and the connector P1 and the connector P2 are located on the same side of the board, and the connector P3 and the connector P4 are located on the other side of the board;

[0007] The connector P1 and the connector P3 form a first connection group A. The connector P1 and the connector P3 are horizontally staggered, with a horizontal distance of n1, parallel to each other, and P1 is higher than P3;

[0008] The connector P2 and the connector P4 form a second connection group B. The connector P2 and the connector P4 are horizontally staggered, with a horizontal distance of n2, parallel to each other, and P4 is higher than P2;

[0009] The connector P1 is parallel to the connector P2, and the entirety of the connector P1 and the connector P2 is set to a wide distance; the connector P3 is parallel to the connector P4, and the entirety of the connector P3 and the connector P4 is set to a narrow distance.

[0010] Furthermore, the connector P1 is located above the connector P3, the connector P1 is 0.5 mm higher than the connector P3, and the connector P4 is 0.5 mm higher than the connector P2.

[0011] Furthermore, a diode is provided in the path of the positive voltage of the power supply in the board-to-board connector.

[0012] Furthermore, the boards corresponding to area A and area B can be separately arranged, that is, connector P1, connector P2, connector P3, and connector P4 each have an independent corresponding card board, and the boards in area A and area B are split in a splicable manner.

[0013] Furthermore, contacts are provided on both sides of the insertion slot of the board-to-board connector, and the contacts on both sides are symmetrical to each other. A first positioning end face and a second positioning end face are respectively provided at both ends of the insertion slot of the board-to-board connector. The distances between the first positioning end face and the second positioning end face and the contact pieces close to them are b1 and a1 respectively. The distance between two adjacent contact pieces is c1, and the difference distance between b1 and a1 is greater than the width of the contact piece and less than the distance c1.

[0014] Beneficial effects:

[0015] Compared with the prior art, the beneficial effects of the utility model are as follows: by bringing out all the pins of the processor, it is convenient for users to design and wire boards based on this solution, which is convenient for users to develop and design products with different needs, reduce design costs, and shorten development cycles; the board layout provided in this solution is reasonable and has good scalability, and the board-to-board connector is arranged according to a preset pin arrangement to ensure the rationality of the pin spacing between interfaces of different speeds, and by reasonably staggering the placement of the four connectors, anti-reverse insertion protection can be increased. Even if the user ignores the arrow installation mark on the board, the board will not be reversely inserted on the matching baseplate. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a module schematic diagram of a core board with anti-reverse insertion function proposed by the utility model;

[0017] Figure 2This is a structural schematic diagram of a back-board-to-board connector in a core board with an anti-reverse insertion function proposed by the utility model;

[0018] Figure 3 This is a schematic diagram of the circuit structure of a connector P1 in a core board with an anti-reverse insertion function proposed by the utility model;

[0019] Figure 4 This is a schematic diagram of the circuit structure of a connector P2 in a core board with an anti-reverse insertion function proposed by the utility model;

[0020] Figure 5 This is a schematic diagram of the circuit structure of a connector P3 in a core board with an anti-reverse insertion function proposed by the utility model;

[0021] Figure 6 This is a schematic diagram of the circuit structure of a connector P4 in a core board with an anti-reverse insertion function proposed by the utility model;

[0022] Figure 7 The utility model provides a schematic diagram of the structure of a connector in a core board with an anti-reverse insertion function. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0024] See also Figure 1-Figure 7 The utility model provides an embodiment: a core board with anti-reverse insertion function, including a board card 6, wherein the board card 6 is provided with a control module 1, a memory module 2, a storage module 3, a startup module 4, a power module 5 and four board-to-board connectors 7 in sequence, and the memory module 2, the storage module 3, the startup module 4, the power module 5 are all electrically connected to the control module 1, and the four board-to-board connectors 7 are connected to the mainboard interface of the board card 6.

[0025] The control module 1 is a LS2K0500 processor, the storage module 3 is a Nand Flash, the startup module 4 is a Nor Flash, and the power module 5 is a discrete power management module.

[0026] In one embodiment, the board-to-board connector 7 includes a connector P1, a connector P2, a connector P3, and a connector P4, and the connector P1 and the connector P2 are located on the same side of the board 6, and the connector P3 and the connector P4 are located on the other side of the board 6.

[0027] The connector P1 and the connector P3 form a first connection group A, the horizontal distance between the connector P1 and the connector P3 is n1, the first connection group A is provided with a board card corresponding thereto, the board card is provided with an insertion end matching the connector P1 and the connector P3, the two parts of the insertion end are staggered, the horizontal distance is n1, they are parallel to each other, and the horizontal distance is the same as the distance between the connector P1 and the connector P3;

[0028] The connector P2 and the connector P4 form a second connection group B, the horizontal distance between the connector P2 and the connector P4 is n1, the second connection group B is provided with a board card corresponding thereto, the board card is provided with an insertion end matching the connector P2 and the connector P4, the two parts of the insertion end are staggered, the horizontal distance is n2, they are parallel to each other, and the horizontal distance is the same as the distance between the connector P2 and the connector P4;

[0029] Furthermore, the insertion end may be a gold finger, a power strip, a terminal, etc.

[0030] Furthermore, connector P1 and connector P3 are located at the upper end of the back of the board, and connector P1 is located above connector P3, and connector P1 is 0.5 mm higher than connector P3. In this way, if the board is reversely inserted, the pins of connector P1 and connector P3 will be misaligned with the interface of the baseboard and cannot be inserted.

[0031] Connector P2 and connector P4 are located at the lower back of the board, and connector P2 is located below connector P4, and connector P4 is 0.5mm higher than connector P2. In this way, if the board is inserted in reverse, the pins of connector P2 and connector P4 will also be misaligned with the interface of the baseboard and cannot be inserted.

[0032] Connector P1 is parallel to connector P2, and the overall distance between connectors P1 and P2 is set to be wide. Connector P3 is parallel to connector P4, and the overall distance between connectors P3 and P4 is set to be narrow. The overall wide distance is 1mm longer than the narrow distance. In this way, if the board is inserted in reverse, the pins of P1 and P2 will be misaligned with the interfaces of P3 and P4 and cannot be inserted.

[0033] Furthermore, a diode can be arranged in the path of the positive voltage of the power supply, and the power supply can be prevented from being plugged in reverse by the unidirectional conductivity of the diode. This method is simple, reliable and low-cost.

[0034] In the following embodiment, the boards and cards corresponding to area A and area B can be separately arranged, that is, connector P1, connector P2, connector P3, and connector P4 each have an independent corresponding card board. It can be understood that the separation of the boards and cards in area A and area B can be carried out in a splicing manner, so that a suitable combination method can be selected according to needs. Contact pieces 71 are provided on both sides of the insertion slot of the board-to-board connector 7, and the contact pieces 71 on both sides are symmetrical to each other. The first positioning end face 72 and the second positioning end face 73 are respectively provided at both ends of the insertion slot of the board-to-board connector 7. The distances between the first positioning end face 72 and the second positioning end face 73 and the contact piece 71 close to them are b1 and a1 respectively. The two adjacent contacts The distance between the contact pieces 71 is c1, and the connectors P1, P2, P3, and P4 are respectively provided with different b1 and a1, and the difference distance between b1 and a1 is greater than the width of the contact piece 71 and less than the distance of c1. In this way, the distance between b1 and a1 can be set to ensure that the width of each installation insertion slot of the connectors P1, P2, P3, and P4 is not the same, so as to ensure that the connectors P1, P2, P3, and P4 will not be misplaced during installation. It is understandable that the distance between b1 and a1 of the connectors P1, P2, P3, and P4 can also be set to be the same to ensure the standardization of accessories;

[0035] At the same time, through such a design, only when the gold finger of the card board is inserted in the correct direction, the contact of the gold finger can interfere with the contact piece 71 and conduct. When the gold finger of the card board is inserted in the wrong direction, the c1 position between the contact of the gold finger and the contact piece 71 will interfere, so all the contacts of the finger will not be conductive, avoiding damage and failure of the system due to the opposite direction.

[0036] The four board-to-board connectors 7 are arranged according to a preset pin arrangement to ensure the rationality of the pin spacing between interfaces of different speeds. By reasonably staggering the positions of the four connectors, anti-reverse insertion protection can be increased. Even if the user ignores the arrow installation mark on the board, the board will not be reversely inserted into the matching baseboard.

[0037] The connectors P1 and P3 are located at the upper end of the back of the board, and the connector P1 is located above the connector P3, and P1 is 0.5 mm higher than P3; the connectors P2 and P4 are located at the lower end of the back of the board, and the connector P2 is located below the connector P4, and P4 is 0.5 mm higher than P2;

[0038] Connector P1 is parallel to connector P2, and the overall distance between connectors P1 and P2 is set to be wide. Connector P3 is parallel to connector P4, and the overall distance between connectors P3 and P4 is set to be narrow. The overall wide distance is 1 mm longer than the narrow distance.

[0039] In one embodiment, the connector P1 is provided with a plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces, and the plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces are all matched and connected with the pins of the control module 1;

[0040] The connector P2 is provided with a plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces, and the plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces are all matched and connected with the pins of the control module 1;

[0041] The connector P3 is provided with a plurality of LCD interfaces, VGA interfaces, GMAC interfaces, UART interfaces, PWM interfaces, Nand_CLE and Nand_RDN interfaces, and the plurality of LCD interfaces, VGA interfaces, GMAC interfaces, UART interfaces, PWM interfaces, Nand_CLE and Nand_RDN interfaces are matched and connected with the pins of the control module 1;

[0042] The connector P4 is provided with multiple SATA interfaces, USB interfaces, LPC interfaces, PCIE interfaces, SPI interfaces, CAN interfaces, AC interfaces, and DDR interfaces, and the multiple SATA interfaces, USB interfaces, LPC interfaces, PCIE interfaces, SPI interfaces, CAN interfaces, AC interfaces, DDR interfaces, and EJTAG interfaces are all matched and connected with the pins of the control module 1.

[0043] In one embodiment, pin 2, pin 3 to pin 10, pin 11, pin 13 to pin 18, pin 20 to pin 25, pin 27 to pin 33, pin 35, pin 36, pin 38, pin 39, pin 41 to pin 45, pin 47 to pin 51, pin 53, pin 54, pin 57, pin 59, pin 61, pin 63, pin 65, pin 67, pin 69, and pin 71 of the connector P1 are PCI interfaces;

[0044] Pin 54, pin 56, pin 58, pin 60, pin 62, pin 64, pin 66, pin 68 and pin 70 of the connector P1 are SPI interfaces;

[0045] Pins 76 and 78 of the connector P1 are USB interfaces;

[0046] Pins 75 and 77 of the connector P1 are I2C interfaces;

[0047] The 74 pins of the connector P1 are DDR interfaces;

[0048] Pins 12, 19, 26, 34, 37, 40, 46, 52, 55, 62, 72, 73, 79 and 80 of the connector P1 are connected to ground in series.

[0049] In one embodiment, pins 3, 4, 5, 6, 10, 12, 17, 69, 70, 71, 72, 75, 76, 77, and 78 of the connector P2 are PCIE interfaces;

[0050] Pins 11, 15, 19 and 21 of the connector P2 are USB interfaces;

[0051] Pins 7 and 9 of the connector P2 are SATA interfaces;

[0052] Pins 16, 18, 20, 24, 26 and 28 of the connector P2 are SDIO interfaces;

[0053] Pins 25, 27, 29, 31, 33, 35, 37, 39, 41, 45, 47, 49, 51, 53, 55, 57 and 59 of the connector P2 are ACPI interfaces;

[0054] Pin 63 of the connector P2 is the RTC interface;

[0055] Pin 65 of the connector P2 is an RST interface; pins 38, 40, 42, 44, 46, 48, 52, 56, 58, 60, 62, 64 and 66 are GMAC pins;

[0056] Pins 8, 13, 14, 22, 23, 30, 36, 43, 50, 54, 61, 67, 68, 73, 74, 79 and 80 of the connector P2 are connected to ground in series.

[0057] In one embodiment, pin 3, pin 5, pin 7, pin 9, pin 13, pin 15, pin 17, pin 19, pin 21, pin 23, pin 25, pin 27, pin 31, pin 33, pin 35, pin 37, pin 39, pin 41, pin 43, pin 45, pin 49, pin 51, pin 53, pin 55, pin 57, pin 59, pin 61, and pin 63 of the connector P3 are LCD interfaces;

[0058] Pins 67, 69, 71, 73, 75 and 77 of the connector P3 are VGA interfaces; pins 4, 6, 10, 12, 14, 16, 18, 20, 24, 28, 30, 32, 34, 36 and 38 are GMAC interfaces;

[0059] Pins 42, 44, 46 and 48 of the connector P3 are UART interfaces;

[0060] Pins 52 and 54 of the connector P3 are SYS interfaces;

[0061] Pins 56, 58, 60 and 62 of the connector P3 are PWM interfaces;

[0062] Pin 64 of the connector P3 is a NAND_CLE interface;

[0063] Pin 66 of the connector P3 is a NAND_RDN interface;

[0064] Pins 8, 11, 22, 26, 29, 40, 47, 50, 65, 68, 72, 74, 76, 78, 79 and 80 of the connector P3 are connected to ground in series.

[0065] In one embodiment, pins 3, 5, 9, 10, 11, 12, 15, 16, 17, and 18 of the connector P4 are SATA interfaces;

[0066] Pins 21, 23, 27, 28, 29, 30, 34 and 36 of the connector P4 are DDR interfaces;

[0067] Pins 33, 35, 39, 40, 41, 42, 46 and 48 of the connector P4 are USB interfaces;

[0068] Pins 45, 47, 51, 53, 55 and 57 of the connector P4 are LPC interfaces;

[0069] Pins 61, 63, 65, 67 and 69 of the connector P4 are AC interfaces;

[0070] Pin 71 of the connector P4 is the SYS interface;

[0071] Pins 75, 76, 77 and 78 of the connector P4 are CAN interfaces;

[0072] Pins 2 and 4 of the connector P4 are PCIE interfaces;

[0073] Pins 52, 54, 56, 58, 60 and 62 of the connector P4 are EJTAG interfaces;

[0074] Pins 66, 68, 70 and 72 of the connector P4 are SPI interfaces;

[0075] Pin 7, pin 8, pin 13, pin 14, pin 19, pin 20, pin 25, pin 26, pin 31, pin 32, pin 37, pin 38, pin 43, pin 44, pin 49, pin 50, pin 59, pin 64, pin 73, pin 74, pin 79, and pin 80 of the connector P4 are grounded in series.

[0076] In one embodiment, the connectors P1, P2, P3 and P4 have 80 pins, which is convenient for connection and use.

[0077] Further, the board-to-board connection is explained as follows. The board-to-board connector usually consists of two parts: a base and a plug. The base has needle-shaped pins arranged in rows, and the plug also has a corresponding number of seat-shaped holes for the pins to insert. When the plug is inserted into the base, the pins will establish electrical contact with the holes on the base, thereby realizing the connection of the circuit.

[0078] The basic structural components of board-to-board connectors are: contacts, insulators, shells and accessories. Contacts are the core components of connectors to complete the electrical connection function. Generally, the contact pair is composed of a positive contact and a negative contact, and the electrical connection is completed by the insertion of the negative and positive contacts. The insulator is also called a base or mounting plate. Its function is to arrange the contacts according to the required position and spacing to ensure the insulation performance between the contacts and between the contacts and the shell. The shell, also known as the shell, is the outer cover of the board-to-board connector. It provides mechanical protection for the built-in insulating mounting plate and pins, and provides alignment when the plug and socket are inserted, thereby fixing the board-to-board connector to the device. Accessories are divided into structural accessories and installation accessories. Structural accessories include clamps, positioning keys, positioning pins, guide pins, coupling rings, cable clamps, sealing rings, sealing pads, etc. Installation accessories include screws, nuts, screws, spring coils, etc.

[0079] The press-type is a method of using components such as a pressure piece or a spring to press the contacts of two board-to-board connectors together, which can achieve a connection without welding. This method is convenient and fast, and is suitable for frequent plugging and unplugging, but it requires uniform and lasting pressure, and may be affected by vibration and impact.

[0080] In summary, this solution brings out all the pins of the processor, which makes it convenient for users to design and wire boards based on this solution, and is convenient for users to develop and design products with different needs, reduce design costs, and shorten development cycles; the board layout provided in this solution is reasonable and has good scalability. The board-to-board connector is set according to the preset pin arrangement to ensure the rationality of the pin spacing between interfaces of different speeds, and the anti-reverse insertion protection can be increased by reasonably staggering the four connectors. Even if the user ignores the arrow installation mark on the board, the board will not be reversely inserted on the matching baseboard.

[0081] It is obvious to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential features of the present invention. Therefore, the embodiments should be regarded as exemplary and non-restrictive from any point of view, and the scope of the present invention is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present invention. Any reference numeral in a claim should not be regarded as limiting the claim to which it relates.

Claims

1. A core board with anti-reverse insertion function, comprising a board card, characterized in that: The board is provided with a control module, a memory module, a storage module, a startup module, a power module and four board-to-board connectors in sequence, and the memory module, the storage module, the startup module and the power module are all electrically connected to the control module, and the four board-to-board connectors are connected to the mainboard interface of the board; The board-to-board connector includes a connector P1, a connector P2, a connector P3, and a connector P4, and the connector P1 and the connector P2 are located on the same side of the board, and the connector P3 and the connector P4 are located on the other side of the board; The connector P1 and the connector P3 form a first connection group A. The connector P1 and the connector P3 are horizontally staggered with a horizontal distance n1, parallel to each other, and the connector P1 is higher than the connector P3. The connector P2 and the connector P4 form a second connection group B. The connector P2 and the connector P4 are horizontally staggered with a horizontal distance of n2, parallel to each other, and the connector P4 is higher than the connector P2. The connector P1 is parallel to the connector P2, and the entirety of the connector P1 and the connector P2 is set to a wide distance; the connector P3 is parallel to the connector P4, and the entirety of the connector P3 and the connector P4 is set to a narrow distance.

2. The core board with anti-reverse insertion function according to claim 1, characterized in that: The connector P1 is located above the connector P3 , the connector P1 is 0.5 mm higher than the connector P3 , and the connector P4 is 0.5 mm higher than the connector P2 .

3. The core board with anti-reverse insertion function according to claim 1, characterized in that: A diode is arranged in the path of the positive voltage of the power supply in the board-to-board connector.

4. The core board with anti-reverse insertion function according to claim 1, characterized in that: The boards corresponding to area A and area B can be separately arranged, that is, connector P1, connector P2, connector P3, and connector P4 each have an independent corresponding card board, and the boards in area A and area B are split in a splicable manner.

5. The core board with anti-reverse insertion function according to claim 1, characterized in that: The insertion slot of the board-to-board connector is provided with contact pieces on both sides, and the contact pieces on both sides are symmetrical to each other. The insertion slot of the board-to-board connector is provided with a first positioning end face and a second positioning end face at both ends, respectively. The distances between the first positioning end face and the second positioning end face and the contact pieces close to them are b1 and a1, respectively. The distance between two adjacent contact pieces is c1, and the difference distance between b1 and a1 is greater than the width of the contact piece and less than the distance c1.

6. The core board with anti-reverse insertion function according to claim 5, characterized in that: The connector P1 is provided with a plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces, and the plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces are matched and connected with the pins of the control module; The connector P2 is provided with a plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces, and the plurality of PCIE interfaces, USB interfaces, ACPI interfaces, RTC interfaces, RST interfaces, SDIO interfaces, and GMAC interfaces are matched and connected with the control module pins; The connector P3 is provided with a plurality of LCD interfaces, VGA interfaces, GMAC interfaces, UART interfaces, PWM interfaces, Nand_CLE and Nand_RDN interfaces, and the plurality of LCD interfaces, VGA interfaces, GMAC interfaces, UART interfaces, PWM interfaces, Nand_CLE and Nand_RDN interfaces are matched and connected with the pins of the control module; The connector P4 is provided with multiple SATA interfaces, USB interfaces, LPC interfaces, PCIE interfaces, SPI interfaces, CAN interfaces, AC interfaces, and DDR interfaces, and the multiple SATA interfaces, USB interfaces, LPC interfaces, PCIE interfaces, SPI interfaces, CAN interfaces, AC interfaces, DDR interfaces, and EJTAG interfaces are all matched and connected with the control module pins.

7. The core board with anti-reverse insertion function according to claim 6, characterized in that: Pin 2, pin 3 to pin 10, pin 11, pin 13 to pin 18, pin 20 to pin 25, pin 27 to pin 33, pin 35, pin 36, pin 38, pin 39, pin 41 to pin 45, pin 47 to pin 51, pin 53, pin 54, pin 57, pin 59, pin 61, pin 63, pin 65, pin 67, pin 69, and pin 71 of the connector P1 are PCI interfaces; Pin 54, pin 56, pin 58, pin 60, pin 62, pin 64, pin 66, pin 68 and pin 70 of the connector P1 are SPI interfaces; Pins 76 and 78 of the connector P1 are USB interfaces; Pins 75 and 77 of the connector P1 are I2C interfaces; Pin 74 of the connector P1 is a DDR interface; Pins 12, 19, 26, 34, 37, 40, 46, 52, 55, 62, 72, 73, 79 and 80 of the connector P1 are connected to ground in series.

8. The core board with anti-reverse insertion function according to claim 6, characterized in that: Pins 3, 4, 5, 6, 10, 12, 17, 69, 70, 71, 72, 75, 76, 77 and 78 of the connector P2 are PCIE interfaces; Pins 11, 15, 19 and 21 of the connector P2 are USB interfaces; Pins 7 and 9 of the connector P2 are SATA interfaces; Pins 16, 18, 20, 24, 26 and 28 of the connector P2 are SDIO interfaces; Pins 25, 27, 29, 31, 33, 35, 37, 39, 41, 45, 47, 49, 51, 53, 55, 57 and 59 of the connector P2 are ACPI interfaces; Pin 63 of the connector P2 is the RTC interface; Pin 65 of the connector P2 is an RST interface; pins 38, 40, 42, 44, 46, 48, 52, 56, 58, 60, 62, 64 and 66 are GMAC pins; Pins 8, 13, 14, 22, 23, 30, 36, 43, 50, 54, 61, 67, 68, 73, 74, 79 and 80 of the connector P2 are connected to ground in series.

9. The core board with anti-reverse insertion function according to claim 6, characterized in that: Pin 3, pin 5, pin 7, pin 9, pin 13, pin 15, pin 17, pin 19, pin 21, pin 23, pin 25, pin 27, pin 31, pin 33, pin 35, pin 37, pin 39, pin 41, pin 43, pin 45, pin 49, pin 51, pin 53, pin 55, pin 57, pin 59, pin 61, and pin 63 of the connector P3 are LCD interfaces; Pins 67, 69, 71, 73, 75 and 77 of the connector P3 are VGA interfaces; pins 4, 6, 10, 12, 14, 16, 18, 20, 24, 28, 30, 32, 34, 36 and 38 are GMAC interfaces; Pins 42, 44, 46 and 48 of the connector P3 are UART interfaces; Pins 52 and 54 of the connector P3 are SYS interfaces; Pins 56, 58, 60 and 62 of the connector P3 are PWM interfaces; Pin 64 of the connector P3 is a NAND_CLE interface; Pin 66 of the connector P3 is a NAND_RDN interface; Pins 8, 11, 22, 26, 29, 40, 47, 50, 65, 68, 72, 74, 76, 78, 79 and 80 of the connector P3 are connected to ground in series.

10. The core board with anti-reverse insertion function according to claim 6, characterized in that: Pins 3, 5, 9, 10, 11, 12, 15, 16, 17 and 18 of the connector P4 are SATA interfaces; Pins 21, 23, 27, 28, 29, 30, 34 and 36 of the connector P4 are DDR interfaces; Pins 33, 35, 39, 40, 41, 42, 46 and 48 of the connector P4 are USB interfaces; Pins 45, 47, 51, 53, 55 and 57 of the connector P4 are LPC interfaces; Pins 61, 63, 65, 67 and 69 of the connector P4 are AC interfaces; Pin 71 of the connector P4 is the SYS interface; Pins 75, 76, 77 and 78 of the connector P4 are CAN interfaces; Pins 2 and 4 of the connector P4 are PCIE interfaces; Pins 52, 54, 56, 58, 60 and 62 of the connector P4 are EJTAG interfaces; Pins 66, 68, 70 and 72 of the connector P4 are SPI interfaces; Pin 7, pin 8, pin 13, pin 14, pin 19, pin 20, pin 25, pin 26, pin 31, pin 32, pin 37, pin 38, pin 43, pin 44, pin 49, pin 50, pin 59, pin 64, pin 73, pin 74, pin 79, and pin 80 of the connector P4 are grounded in series.

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