Novel semiconductor heat dissipation integrated structure
By designing the S-shaped runner in the semiconductor heat dissipation structure and introducing coolant, combined with the vacuum brazing process, the problem of low heat dissipation efficiency of the existing semiconductor heat dissipation structure in high temperature environments is solved, and a more efficient heat dissipation effect is achieved.
Patent Information
- Application Number
- CN202420190686.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-25
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2034-01-25
AI Technical Summary
The heat dissipation efficiency of the existing semiconductor heat dissipation structure still needs to be improved in high temperature environments, especially the heat dissipation of ceramic copper clad plates mainly relies on the copper layer, and the efficiency is limited.
A new integrated semiconductor heat dissipation structure is designed, including a copper foil layer, a copper substrate, a ceramic substrate, a copper foil layer and a chip layer that are soldered from bottom to top in sequence. The copper substrate is equipped with an S-shaped runner and is in the S-shaped Coolant is introduced into the runner, and the density and heat transfer effect of the solder layer are improved through vacuum brazing process.
Through the design of the S-type runner and coolant, the heat dissipation efficiency is significantly improved, the module is overheated, and the voids in the solder layer are reduced through the vacuum brazing process, further improving the heat transfer effect.
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Figure CN222462906U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductors, and particularly to a novel semiconductor heat dissipation integrated structure. Background Art
[0002] As the semiconductor market continues to expand, there are more and more high-power devices, and the demand for high-power packaging modules is becoming more urgent. The emergence of high power also places higher and higher demands on heat dissipation. The current popular packaging model in the market needs to be updated in terms of heat dissipation.
[0003] The patent number is CN202011306255.2, which discloses a new type of integrated base plate structure for SiC IGBT devices, including a base plate body, a ceramic substrate connected to the upper surface of the base plate body, a copper layer connected to the upper surface of the ceramic substrate, and the base plate body and the ceramic substrate, as well as the ceramic substrate and the copper layer are connected by an active metal brazing process to form an integrated base plate structure. The base plate body and the ceramic substrate, as well as the ceramic substrate and the copper layer are connected by an active brazing process, and the melting point is determined by the active metal used, which solves the problem of low melting point of the welding layer between the existing base plate and the ceramic copper-clad plate, and can effectively give play to the application advantages of SiC IGBT devices in high-temperature environments above 178°C; compared with the traditional "base plate + DBC structure", the copper layer under the DBC is removed, a lower thermal expansion coefficient, a higher thermal conductivity, reduced thermal resistance, and improved heat dissipation efficiency are obtained; however, the heat dissipation of the ceramic copper-clad plate mainly relies on the copper layer for heat dissipation, and the heat dissipation efficiency needs to be improved. Utility Model Content
[0004] The utility model provides a novel semiconductor heat dissipation integrated structure with good heat dissipation effect in order to solve the problems of the prior art.
[0005] The purpose of the utility model can be achieved through the following technical solutions: a novel semiconductor heat dissipation integrated structure includes a copper foil layer 1, a copper substrate, a ceramic substrate, a copper foil layer 2 and a chip layer which are welded and connected in sequence from bottom to top, the copper foil layer 2 is evenly distributed and welded and fixed on the ceramic substrate at intervals, an S-shaped flow channel is provided inside the copper substrate, the bottom of the S-shaped flow channel is set to penetrate downward, and the two sides of the S-shaped flow channel are connected to a coolant inlet and a coolant outlet.
[0006] As a further improvement, two groups of the S-shaped flow channels are symmetrically arranged in the copper substrate.
[0007] As a further improvement, the copper foil layer 1, the copper substrate, the ceramic substrate and the copper foil layer 2 are connected by vacuum brazing.
[0008] Compared with the prior art, the novel semiconductor heat dissipation integrated structure of the utility model has the following beneficial effects:
[0009] The heat generated by the chip is transferred along the copper foil layer 2 and the ceramic substrate to the copper substrate in turn. The S-shaped flow channel design inside the copper substrate enables the module with a large specific surface area to dissipate heat. By introducing coolant into the S-shaped flow channel, the heat transferred from the chip to the copper substrate can be quickly cooled to prevent the module from overheating. The vacuum brazing process reduces the voids in the solder layer of the overall module, thereby improving the heat transfer effect and further improving the heat dissipation effect. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 This is a schematic diagram of the structure of the utility model
[0011] Figure 2 The schematic diagram of the structure of the cross section of the utility model
[0012] Figure 3 This is a schematic diagram of the structure of the copper substrate in the utility model
[0013] In the figure, 1-copper foil layer one, 2-copper substrate, 21-S-shaped flow channel, 22-coolant inlet, 23-coolant outlet, 3-ceramic substrate, 4-copper foil layer two, 5-chip layer. DETAILED DESCRIPTION
[0014] In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they cannot be understood as limitations on the present invention.
[0015] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0016] The following is combined with the embodiments and attached Figures 1 to 3 , the technical solution of the utility model is further elaborated.
[0017] Example 1
[0018] A novel semiconductor heat dissipation integrated structure comprises a copper foil layer 1, a copper substrate 2, a ceramic substrate 3, a copper foil layer 4 and a chip layer 5 which are welded and connected in sequence from bottom to top. The copper foil layer 4 is evenly distributed and welded and fixed on the ceramic substrate 3 at intervals. An S-shaped flow channel 21 is provided inside the copper substrate 2. The bottom of the S-shaped flow channel 21 is set to penetrate downward. A coolant inlet 22 and a coolant outlet 23 are connected to the two sides of the S-shaped flow channel 21.
[0019] As a further preferred embodiment, two groups of the S-shaped flow channels 21 are symmetrically arranged in the copper substrate 2 to increase the unilateral flow speed of the cooling water.
[0020] As a further preferred embodiment, the copper foil layer 1, the copper substrate 2, the ceramic substrate 3 and the copper foil layer 2 4 are connected by vacuum brazing.
[0021] like Figure 1 to Figure 3 As shown, the use principle of the utility model is as follows: an S-shaped flow channel 21 is formed on the copper substrate 2 by machining or chemical etching, a layer of solder A is printed on the copper substrate 2, and a layer of solder B is printed on both sides of the ceramic substrate 3. After printing, the copper foil layer 1, the copper substrate 2, the ceramic substrate 3, and the copper foil layer 4 are placed in the order from bottom to top through a vacuum brazing process, and then vacuum brazing is performed once, and finally the chip layer 5 is welded to the copper foil layer 4, thus forming the core of a complete packaging module.
[0022] High vacuum brazing can reduce the number of voids in the solder layer, thus improving the heat transfer effect; high temperature brazing can make the later chip welding temperature range wider, and the cooling liquid inlet 22 and the cooling liquid outlet 23 of the copper substrate 2 are welded to the copper tube, and the cooling purpose of the module is achieved by pumping in circulating cooling water.
[0023] The new module packaging mode provided by the utility model is applied to the semiconductor packaging structure. The heat generated by the chip is sequentially conducted along the copper foil layer 2 and the ceramic substrate to the copper substrate. The design of the S-shaped flow channel inside the copper substrate enables the module with a large specific surface area to dissipate heat. By introducing a coolant into the S-shaped flow channel, the heat conducted from the chip to the copper substrate is quickly cooled, thereby preventing the module from overheating. In addition, the vacuum brazing process is used to reduce the number of voids in the solder layer, thereby improving the heat transfer effect, thereby further improving the heat dissipation effect.
[0024] The preferred specific embodiments of the utility model are described in detail above. It should be understood that ordinary technicians in this field can make many modifications and changes based on the concept of the utility model without creative work. Therefore, all technical solutions that can be obtained by technicians in this technical field based on the concept of the utility model through logical analysis, reasoning or limited experiments on the basis of the existing technology should be within the scope of protection determined by the claims.
Claims
1. A novel semiconductor heat dissipation integrated structure, characterized in that: It includes a copper foil layer 1, a copper substrate, a ceramic substrate, a copper foil layer 2 and a chip layer which are welded and connected in sequence from bottom to top. The copper foil layer 2 is evenly distributed and welded and fixed on the ceramic substrate at intervals. An S-shaped flow channel is arranged inside the copper substrate. The bottom of the S-shaped flow channel is set to penetrate downwards. A coolant inlet and a coolant outlet are connected to both sides of the S-shaped flow channel.
2. A novel semiconductor heat dissipation integrated structure according to claim 1, characterized in that: Two groups of the S-shaped flow channels are symmetrically arranged in the copper substrate.
3. A novel semiconductor heat dissipation integrated structure according to claim 1, characterized in that: The first copper foil layer, the copper substrate, the ceramic substrate and the second copper foil layer are connected by vacuum brazing.
Citation Information
Patent Citations
Novel integrated bottom plate structure of SiC IGBT device
CN112447616A