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Circuit network topology matching inspection method and device

A technology for network topology and matching inspection, applied in electrical digital data processing, instrumentation, computing, etc., to achieve the effect of improving traversal speed and inspection efficiency

Active Publication Date: 2016-08-24
MAIPU COMM TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a circuit network topology matching inspection method and device for the shortcomings of manual inspection of network topology matching in circuit design, which can automatically check the network topology matching of signals in circuit design

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  • Circuit network topology matching inspection method and device
  • Circuit network topology matching inspection method and device
  • Circuit network topology matching inspection method and device

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Embodiment Construction

[0039] The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0040] In circuit design, the circuit design software will generate a netlist file according to the circuit network. The netlist file is composed of countless networks. Each network topology can define a name according to its network characteristics. For example, the defined name of the power supply network is: NET_NAME='Gp_3v3 ','Gp_2v5','Gp_1v2','Vdd','Vac',….; ground net definition names are: NET_NAME='GND','PGND','AGND',...; non-critical net definition names are : NET_NAME = 'N0000001', 'N0000002', 'N0000003', .....; bus net definition name: NET_NAME = 'SCL_OUT', 'SDA_OUT' ... etc. The circuit design software can automatically generate a named network, and can also be named by the designer, such as a power network and a ground network.

[0041] The flow chart of the circuit network topology matching check in the embodiment...

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Abstract

The invention relates to a checking method and device for a circuit network topology during a design process of a circuit schematic diagram. In order to overcome the defects of manual check for network topology matching in the circuit design, the invention discloses the checking method and device for the circuit network topology matching, so as to automatically check the network topology matching attribute of a signal in the circuit design. The checking method for the circuit network topology matching provided by the invention comprises the following steps: reading a circuit network table file; extracting a topological structure of a key to-be-checked network and traversing; searching for the quantity of power networks and / or local networks connected with the other ends of all discrete devices in each key to-be-checked network; and if two or more than two power networks and / or local networks exist, judging the network topology matching is in fault and checking all the key to-be-checked networks and then outputting a fault report. The checking device for the circuit network topology matching provided by the invention comprises a network topology reading module, a network topology searching module and a network topology matching checking module.

Description

technical field [0001] The invention relates to hardware circuit design technology, in particular to a method and device for checking circuit network topology in the process of hardware circuit schematic diagram design. Background technique [0002] In hardware circuit design, the characteristics of various aspects such as signal level characteristics, transmission distance, driving capability, and signal integrity must be considered. Therefore, in the design of the hardware circuit schematic diagram, most bus signals, clock signals, control signals, etc. must be designed for network matching. Network matching includes: signal pull-up to power matching, signal pull-down to ground matching, and signal series matching. Figure 1~14 Several typical network matching diagrams are shown, where Figure 1~8 Match the normal network topology for the network, Figure 9~14 There is a problem with network matching. in, Figure 9 It is the topological diagram of parallel resistor pul...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 胡现辉唐仁圣
Owner MAIPU COMM TECH CO LTD
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