Universal processor-based LDPC (Low Density Parity Check) encoding and decoding method

A general-purpose processor and coding method technology, applied in the application of multi-bit parity error detection coding, error correction/detection using block codes, data representation error detection/correction, etc., can solve the lack of programming environment and debugging Tools, general applicability, complex FPGA programming, etc.

Active Publication Date: 2015-05-13
BEIJING UNIV OF POSTS & TELECOMM
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Problems solved by technology

Although the previous methods can meet the processing and delay requirements of modern high-speed wireless LAN protocols, FPGA progra...

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  • Universal processor-based LDPC (Low Density Parity Check) encoding and decoding method
  • Universal processor-based LDPC (Low Density Parity Check) encoding and decoding method
  • Universal processor-based LDPC (Low Density Parity Check) encoding and decoding method

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Embodiment Construction

[0092]In order to make the purpose, technical means and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings.

[0093] This application provides an LDPC encoding method and a decoding method suitable for implementation in a general-purpose processor. The encoding method and decoding method in this application are described in detail below.

[0094] According to the LDPC PPDU generation method in the IEEE 802.11n protocol, the encoded codeword vector is denoted as c=(S,p 1 ,p 2 ), where S is the information vector, p 1 and p 2 As the codeword check vector, the check matrix H is simplified into six parts H A B T F D E ...

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Abstract

The invention discloses an LDPC (Low Density Parity Check) encoding method. The method comprises the following steps: determining vectors p1 and p2 and obtaining an encoding result vector, wherein multiplication processing of any matrix and any vector during determination of the vectors p1 and p2 comprises the steps of taking each row of any matrix as a thread, multiplying the corresponding row of the matrix by any vector and constituting the multiplication results of all rows into a result vector; the multiplication operation of any row of any matrix by any vector comprises the steps of determining a vector starting position corresponding to each element j of the ith row of the matrix, performing left shift on data of length Z-Ai, j from a starting position in any vector through a single-instruction multiple-data stream mode, shifting the data of length Ai, j in front of the starting position to the space after the data subjected to left shift to obtain a vector shift result corresponding to the element j and adding the vector shift result of each element. Through the method, the encoding speed can be improved in a universal processor by using multi-thread and SIMD (Single Instruction Multiple Data) processing.

Description

technical field [0001] The present application relates to LDPC encoding and decoding technology, in particular to an LDPC encoding and decoding method based on a general-purpose processor. Background technique [0002] LDPC code is a linear block code with a large code length. The check matrix is ​​also relatively large, and there are very few non-zero elements in the check matrix, that is, the number of "1" is very small, so it is called low density. [0003] In the process of implementing the IEEE 802.11n wireless LAN transmission protocol, LDPC coding and decoding technology is required. According to the protocol requirements, the generation process of LDPC PPDU (Presentation Protocol Data Unit, presentation layer protocol data unit) is as follows, see figure 1 : [0004] (1) Calculate the shortened bits [0005] (1a) Calculate the number of available bits N avbits , the formula is: [0006] N pld =length×8+16, [0007] Among them, if there is STBC (Space-time bl...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 牛凯贺志强张竟意
Owner BEIJING UNIV OF POSTS & TELECOMM
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