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A ldpc encoding and decoding method based on a general-purpose processor

A technology of a general-purpose processor and a coding method, which is applied in the directions of applying multi-bit parity error detection coding, using block codes for error correction/detection, data representation error detection/correction, etc., and can solve general applicability, lack Programming environment and debugging tools, FPGA programming complexity and other issues

Active Publication Date: 2017-09-05
BEIJING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although the previous methods can meet the processing and delay requirements of modern high-speed wireless LAN protocols, FPGA programming and professional DSP are relatively complicated, lacking rich programming environments and debugging tools, and general applicability

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  • A ldpc encoding and decoding method based on a general-purpose processor
  • A ldpc encoding and decoding method based on a general-purpose processor
  • A ldpc encoding and decoding method based on a general-purpose processor

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Embodiment Construction

[0092] In order to make the purpose, technical means, and advantages of this application clearer, the following further describes this application in detail with reference to the accompanying drawings.

[0093] This application provides an LDPC encoding method and a decoding method suitable for implementation in a general-purpose processor. The encoding method and decoding method in this application are described in detail below.

[0094] According to the LDPC PPDU generation method in the IEEE 802.11n protocol, the codeword vector after encoding is recorded as c=(S, p 1 ,p 2 ), where S is the information vector, p 1 And p 2 Is the codeword check vector, simplifying the check matrix H to six parts It is divided into six sub-matrices: matrix A, matrix B, matrix D, matrix E, matrix F, and matrix T. Before decoding, the code length L must be input from outside LDPC , Encoding rate R and information vector S. According to the characteristics of the general-purpose processor (GPP) ch...

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Abstract

The present application discloses an LDPC encoding method, which determines the vectors p1 and p2, and obtains the encoding result vector; when determining the vectors p1 and p2, the multiplication process of any matrix and any vector includes: taking each row of any matrix as a The thread performs the multiplication of the corresponding row of the matrix with any vector, and forms the result vector of the multiplication results of all rows; the multiplication operation of each row of any matrix with any vector includes: determining each row of the ith row of the matrix The starting position of the vector corresponding to element j, the data of the length Z-Ai, j from the starting position in any vector is left-shifted by means of SIMD, and the front position starting from the starting position is shifted to the left After the data of length Ai, j is moved to the left-shifted data, the vector shift result corresponding to element j is obtained; then the vector shift results of each element are added. By the method described above, it is possible to increase the encoding speed in a general-purpose processor by utilizing multi-threading and SIMD processing.

Description

Technical field [0001] This application relates to LDPC encoding and decoding technology, and in particular to an LDPC encoding and decoding method based on a general-purpose processor. Background technique [0002] LDPC code is a linear block code with a larger code length. The check matrix is ​​also large, and there are few non-zero elements in the check matrix, that is, the number of "1" is very small, so it is called low density. [0003] In the process of implementing the IEEE 802.11n wireless local area network transmission protocol, LDPC encoding and decoding technology needs to be used. According to the protocol requirements, the generation process of LDPC PPDU (Presentation Protocol Data Unit) is as follows, see figure 1 : [0004] (1) Calculate shortened bits [0005] (1a) Calculate the number of available bits N avbits , The formula is: [0006] N pld =length×8+16, [0007] Among them, if there is STBC (Space-time block code) precoding, the flag bit m STBC 2 or 1 otherwi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
Inventor 牛凯贺志强张竟意
Owner BEIJING UNIV OF POSTS & TELECOMM
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